Searched refs:A1 (Results 51 - 75 of 76) sorted by relevance

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/freebsd-12-stable/contrib/ntp/include/
H A Dmbg_gps166.h802 * t0t, A0 and A1 contain fractional correction parameters for the current
827 * @note In the original code the type of A0 and A1 is double.
836 l_fp A1; ///< +- Clock Correction Coefficient 1 [sec/sec] member in struct:__anon6180
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/MCTargetDesc/
H A DSystemZMCTargetDesc.cpp114 SystemZ::A0, SystemZ::A1, SystemZ::A2, SystemZ::A3,
/freebsd-12-stable/sys/mips/mips/
H A Dswtch.S105 RESTORE_U_PCB_REG(a1, A1, k1)
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsMCCodeEmitter.cpp1084 if (MI.getOperand(0).getReg() == Mips::A1 &&
1087 else if (MI.getOperand(0).getReg() == Mips::A1 &&
1100 MI.getOperand(1).getReg() == Mips::A1)
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZRegisterInfo.cpp245 // A0 and A1 hold the thread pointer.
247 Reserved.set(SystemZ::A1);
H A DSystemZInstrInfo.cpp233 .addReg(SystemZ::A1);
H A DSystemZISelLowering.cpp3074 SDValue TPLo = DAG.getCopyFromReg(Chain, DL, SystemZ::A1, MVT::i32);
/freebsd-12-stable/contrib/llvm-project/compiler-rt/lib/fuzzer/
H A DFuzzerTracePC.cpp319 const uint8_t *A1 = reinterpret_cast<const uint8_t *>(s1);
327 B1[i] = A1[i];
/freebsd-12-stable/crypto/openssl/crypto/ec/asm/
H A Decp_nistz256-armv4.pl965 my ($A0,$A1,$A2,$A3,$Bi,$zero,$temp)=map("d$_",(0..7));
994 vmull.u32 @AxB[2],$Bi,${A1}[0]
995 vmull.u32 @AxB[3],$Bi,${A1}[1]
1021 vmlal.u32 @AxB[2],$Bi,${A1}[0]
1022 vmlal.u32 @AxB[3],$Bi,${A1}[1]
H A Decp_nistz256-armv8.pl493 // |A7|A6|A5|A4|A3|A2|A1|A0|, where Ax is $accx, i.e. follow $accx
1514 // |A7|A6|A5|A4|A3|A2|A1|A0|, where Ax is $accx, i.e. follow $accx
H A Decp_nistz256-sparcv9.pl1910 ! |A7|A6|A5|A4|A3|A2|A1|A0|, where Ax is $accx, i.e. follow $accx
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMips16InstrInfo.cpp261 adjustStackPtrBig(SP, Remainder, MBB, I, Mips::A0, Mips::A1);
H A DMipsISelLowering.h365 return ABI.IsN64() ? Mips::A1_64 : Mips::A1;
H A DMipsISelLowering.cpp2838 // i32 - Passed in A0, A1, A2, A3 and stack
2840 // an argument. Otherwise, passed in A1, A2, A3 and stack.
2842 // yet to hold an argument. Otherwise, use A2, A3 and stack. If A1 is
2846 // vXf32 - Passed in either a pair of registers {A0, A1}, {A2, A3} or {A0 - A3}
2848 // vXf64 - Passed in either {A0, A1, A2, A3} or {A2, A3} and in both cases
2851 // For vararg functions, all arguments are passed in A0, A1, A2, A3 and stack.
2860 static const MCPhysReg IntRegs[] = { Mips::A0, Mips::A1, Mips::A2, Mips::A3 };
2898 // f32 and f64 are allocated in A0, A1, A2, A3 when either of the following
2916 State.AllocateReg(Mips::A1);
2929 if (isI64 && (Reg == Mips::A1 || Re
[all...]
H A DMipsFastISel.cpp1190 VA.convertToReg(Mips::A1);
1334 std::array<MCPhysReg, 4> GPR32ArgRegs = {{Mips::A0, Mips::A1, Mips::A2,
/freebsd-12-stable/contrib/dialog/
H A Ddlg_keys.c356 CURSES_NAME(A1),
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Mips/Disassembler/
H A DMipsDisassembler.cpp2507 Inst.addOperand(MCOperand::createReg(Mips::A1));
2511 Inst.addOperand(MCOperand::createReg(Mips::A1));
2528 Inst.addOperand(MCOperand::createReg(Mips::A1));
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/
H A DMipsAsmParser.cpp2290 bool RegPair = ((R0 == Mips::A1 && R1 == Mips::A2) ||
2291 (R0 == Mips::A1 && R1 == Mips::A3) ||
2295 (R0 == Mips::A0 && R1 == Mips::A1) ||
3203 case Mips::A0: return Mips::A1;
3204 case Mips::A1: return Mips::A2;
5353 return Mips::A1;
5392 case Mips::F5: return Mips::A1;
5431 case Mips::COP05: return Mips::A1;
/freebsd-12-stable/contrib/llvm-project/libcxx/src/
H A Dlocale.cpp94 template <class T, class A0, class A1>
97 make(A0 a0, A1 a1)
104 template <class T, class A0, class A1, class A2>
107 make(A0 a0, A1 a1, A2 a2)
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/Vectorize/
H A DSLPVectorizer.cpp6030 auto *A1 = dyn_cast<BinaryOperator>(A->getOperand(1));
6033 if (A1 && A1->getParent() == P && tryToVectorizePair(A1, B, R))
/freebsd-12-stable/crypto/openssl/crypto/bn/asm/
H A Dx86_64-mont.pl831 my @A1=("%r12","%r13");
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineAddSub.cpp160 static unsigned drillValueDownOneStep(Value* V, FAddend &A0, FAddend &A1);
/freebsd-12-stable/contrib/llvm-project/clang/lib/CodeGen/
H A DCGExpr.cpp627 llvm::Value *A1 = Builder.CreateXor(Builder.CreateLShr(A0, K47), A0); local
628 llvm::Value *B0 = Builder.CreateMul(Builder.CreateXor(High, A1), KMul);
/freebsd-12-stable/contrib/amd/doc/
H A Dtexinfo.tex1576 <3C> <00A1>
1664 <3C> <00A1>
1726 <0E> <00A1>
3138 \def\aogonek{{\ecfont \char"A1}}\def\macrochara{a}
9258 \DeclareUnicodeCharacter{00A1}{\exclamdown}
/freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp7172 SDValue A0 = A.getOperand(0), A1 = A.getOperand(1); local
7174 if ((A0 == S && A1 == S0) || (A1 == S && A0 == S0)) {

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