/freebsd-12-stable/contrib/ntp/include/ |
H A D | mbg_gps166.h | 802 * t0t, A0 and A1 contain fractional correction parameters for the current 827 * @note In the original code the type of A0 and A1 is double. 836 l_fp A1; ///< +- Clock Correction Coefficient 1 [sec/sec] member in struct:__anon6180
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/MCTargetDesc/ |
H A D | SystemZMCTargetDesc.cpp | 114 SystemZ::A0, SystemZ::A1, SystemZ::A2, SystemZ::A3,
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/freebsd-12-stable/sys/mips/mips/ |
H A D | swtch.S | 105 RESTORE_U_PCB_REG(a1, A1, k1)
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
H A D | MipsMCCodeEmitter.cpp | 1084 if (MI.getOperand(0).getReg() == Mips::A1 && 1087 else if (MI.getOperand(0).getReg() == Mips::A1 && 1100 MI.getOperand(1).getReg() == Mips::A1)
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZRegisterInfo.cpp | 245 // A0 and A1 hold the thread pointer. 247 Reserved.set(SystemZ::A1);
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H A D | SystemZInstrInfo.cpp | 233 .addReg(SystemZ::A1);
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H A D | SystemZISelLowering.cpp | 3074 SDValue TPLo = DAG.getCopyFromReg(Chain, DL, SystemZ::A1, MVT::i32);
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/freebsd-12-stable/contrib/llvm-project/compiler-rt/lib/fuzzer/ |
H A D | FuzzerTracePC.cpp | 319 const uint8_t *A1 = reinterpret_cast<const uint8_t *>(s1); 327 B1[i] = A1[i];
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/freebsd-12-stable/crypto/openssl/crypto/ec/asm/ |
H A D | ecp_nistz256-armv4.pl | 965 my ($A0,$A1,$A2,$A3,$Bi,$zero,$temp)=map("d$_",(0..7)); 994 vmull.u32 @AxB[2],$Bi,${A1}[0] 995 vmull.u32 @AxB[3],$Bi,${A1}[1] 1021 vmlal.u32 @AxB[2],$Bi,${A1}[0] 1022 vmlal.u32 @AxB[3],$Bi,${A1}[1]
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H A D | ecp_nistz256-armv8.pl | 493 // |A7|A6|A5|A4|A3|A2|A1|A0|, where Ax is $accx, i.e. follow $accx 1514 // |A7|A6|A5|A4|A3|A2|A1|A0|, where Ax is $accx, i.e. follow $accx
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H A D | ecp_nistz256-sparcv9.pl | 1910 ! |A7|A6|A5|A4|A3|A2|A1|A0|, where Ax is $accx, i.e. follow $accx
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | Mips16InstrInfo.cpp | 261 adjustStackPtrBig(SP, Remainder, MBB, I, Mips::A0, Mips::A1);
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H A D | MipsISelLowering.h | 365 return ABI.IsN64() ? Mips::A1_64 : Mips::A1;
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H A D | MipsISelLowering.cpp | 2838 // i32 - Passed in A0, A1, A2, A3 and stack 2840 // an argument. Otherwise, passed in A1, A2, A3 and stack. 2842 // yet to hold an argument. Otherwise, use A2, A3 and stack. If A1 is 2846 // vXf32 - Passed in either a pair of registers {A0, A1}, {A2, A3} or {A0 - A3} 2848 // vXf64 - Passed in either {A0, A1, A2, A3} or {A2, A3} and in both cases 2851 // For vararg functions, all arguments are passed in A0, A1, A2, A3 and stack. 2860 static const MCPhysReg IntRegs[] = { Mips::A0, Mips::A1, Mips::A2, Mips::A3 }; 2898 // f32 and f64 are allocated in A0, A1, A2, A3 when either of the following 2916 State.AllocateReg(Mips::A1); 2929 if (isI64 && (Reg == Mips::A1 || Re [all...] |
H A D | MipsFastISel.cpp | 1190 VA.convertToReg(Mips::A1); 1334 std::array<MCPhysReg, 4> GPR32ArgRegs = {{Mips::A0, Mips::A1, Mips::A2,
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/freebsd-12-stable/contrib/dialog/ |
H A D | dlg_keys.c | 356 CURSES_NAME(A1),
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Mips/Disassembler/ |
H A D | MipsDisassembler.cpp | 2507 Inst.addOperand(MCOperand::createReg(Mips::A1)); 2511 Inst.addOperand(MCOperand::createReg(Mips::A1)); 2528 Inst.addOperand(MCOperand::createReg(Mips::A1));
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/ |
H A D | MipsAsmParser.cpp | 2290 bool RegPair = ((R0 == Mips::A1 && R1 == Mips::A2) || 2291 (R0 == Mips::A1 && R1 == Mips::A3) || 2295 (R0 == Mips::A0 && R1 == Mips::A1) || 3203 case Mips::A0: return Mips::A1; 3204 case Mips::A1: return Mips::A2; 5353 return Mips::A1; 5392 case Mips::F5: return Mips::A1; 5431 case Mips::COP05: return Mips::A1;
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/freebsd-12-stable/contrib/llvm-project/libcxx/src/ |
H A D | locale.cpp | 94 template <class T, class A0, class A1> 97 make(A0 a0, A1 a1) 104 template <class T, class A0, class A1, class A2> 107 make(A0 a0, A1 a1, A2 a2)
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
H A D | SLPVectorizer.cpp | 6030 auto *A1 = dyn_cast<BinaryOperator>(A->getOperand(1)); 6033 if (A1 && A1->getParent() == P && tryToVectorizePair(A1, B, R))
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/freebsd-12-stable/crypto/openssl/crypto/bn/asm/ |
H A D | x86_64-mont.pl | 831 my @A1=("%r12","%r13");
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineAddSub.cpp | 160 static unsigned drillValueDownOneStep(Value* V, FAddend &A0, FAddend &A1);
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/freebsd-12-stable/contrib/llvm-project/clang/lib/CodeGen/ |
H A D | CGExpr.cpp | 627 llvm::Value *A1 = Builder.CreateXor(Builder.CreateLShr(A0, K47), A0); local 628 llvm::Value *B0 = Builder.CreateMul(Builder.CreateXor(High, A1), KMul);
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/freebsd-12-stable/contrib/amd/doc/ |
H A D | texinfo.tex | 1576 <3C> <00A1> 1664 <3C> <00A1> 1726 <0E> <00A1> 3138 \def\aogonek{{\ecfont \char"A1}}\def\macrochara{a} 9258 \DeclareUnicodeCharacter{00A1}{\exclamdown}
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | DAGCombiner.cpp | 7172 SDValue A0 = A.getOperand(0), A1 = A.getOperand(1); local 7174 if ((A0 == S && A1 == S0) || (A1 == S && A0 == S0)) {
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