Searched refs:getReservedRegs (Results 26 - 41 of 41) sorted by relevance

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/freebsd-11.0-release/contrib/llvm/lib/Target/Hexagon/
H A DHexagonRegisterInfo.cpp97 BitVector HexagonRegisterInfo::getReservedRegs(const MachineFunction &MF) function in class:HexagonRegisterInfo
H A DHexagonFrameLowering.cpp1220 BitVector Reserved = TRI->getReservedRegs(MF);
/freebsd-11.0-release/contrib/llvm/lib/Target/Sparc/
H A DSparcRegisterInfo.cpp55 BitVector SparcRegisterInfo::getReservedRegs(const MachineFunction &MF) const { function in class:SparcRegisterInfo
/freebsd-11.0-release/contrib/llvm/include/llvm/CodeGen/
H A DMachineRegisterInfo.h684 /// getReservedRegs - Returns a reference to the frozen set of reserved
686 /// TRI::getReservedRegs() when possible.
687 const BitVector &getReservedRegs() const { function in class:llvm::MachineRegisterInfo
690 "Use TRI::getReservedRegs().");
700 return getReservedRegs().test(PhysReg);
/freebsd-11.0-release/contrib/llvm/lib/Target/Mips/
H A DMips16InstrInfo.cpp202 const BitVector Reserved = RI.getReservedRegs(MF);
232 const BitVector Reserved = RI.getReservedRegs(*MF);
H A DMipsRegisterInfo.cpp142 getReservedRegs(const MachineFunction &MF) const { function in class:MipsRegisterInfo
/freebsd-11.0-release/contrib/llvm/lib/CodeGen/
H A DTargetRegisterInfo.cpp178 BitVector Reserved = getReservedRegs(MF);
H A DMachineRegisterInfo.cpp412 ReservedRegs = getTargetRegisterInfo()->getReservedRegs(MF);
H A DMachineVerifier.cpp470 regsReserved = MRI->getReservedRegs();
/freebsd-11.0-release/contrib/llvm/lib/Target/AArch64/
H A DAArch64RegisterInfo.cpp104 AArch64RegisterInfo::getReservedRegs(const MachineFunction &MF) const { function in class:AArch64RegisterInfo
/freebsd-11.0-release/contrib/llvm/include/llvm/Target/
H A DTargetRegisterInfo.h471 virtual BitVector getReservedRegs(const MachineFunction &MF) const = 0;
/freebsd-11.0-release/contrib/llvm/lib/Target/XCore/
H A DXCoreRegisterInfo.cpp231 BitVector XCoreRegisterInfo::getReservedRegs(const MachineFunction &MF) const { function in class:XCoreRegisterInfo
/freebsd-11.0-release/contrib/llvm/lib/Target/AMDGPU/
H A DSIRegisterInfo.cpp84 BitVector SIRegisterInfo::getReservedRegs(const MachineFunction &MF) const { function in class:SIRegisterInfo
/freebsd-11.0-release/contrib/llvm/lib/Target/X86/
H A DX86RegisterInfo.cpp402 BitVector X86RegisterInfo::getReservedRegs(const MachineFunction &MF) const { function in class:X86RegisterInfo
/freebsd-11.0-release/contrib/llvm/lib/Target/ARM/
H A DARMBaseRegisterInfo.cpp151 getReservedRegs(const MachineFunction &MF) const { function in class:ARMBaseRegisterInfo
/freebsd-11.0-release/contrib/llvm/lib/Target/PowerPC/
H A DPPCRegisterInfo.cpp165 BitVector PPCRegisterInfo::getReservedRegs(const MachineFunction &MF) const { function in class:PPCRegisterInfo

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