Searched refs:READ4 (Results 26 - 47 of 47) sorted by relevance

12

/freebsd-11.0-release/sys/mips/mediatek/
H A Dmtk_intr_v2.c99 #define READ4(_sc, _reg) bus_read_4((_sc)->pic_res[0], _reg) macro
229 intr = READ4(sc, MTK_IRQ1STAT);
246 intr = READ4(sc, MTK_IRQ0STAT);
H A Dmtk_intr_gic.c106 #define READ4(_sc, _reg) bus_read_4((_sc)->gic_res[0], (_reg)) macro
242 intr = READ4(sc, MTK_INTSTAT) & READ4(sc, MTK_INTMASK);
/freebsd-11.0-release/sys/arm/samsung/exynos/
H A Dexynos5_pad.c81 #define READ4(_sc, _port, _reg) \ macro
375 reg = READ4(sc, sc->gpio_map[i].port, sc->gpio_map[i].pend);
441 reg = READ4(sc, bank.port, bank.con);
459 reg = READ4(sc, bank.port, bank.ext_con);
464 reg = READ4(sc, bank.port, bank.mask);
556 reg = READ4(sc, bank.port, bank.con);
693 if (READ4(sc, bank.port, bank.con + 0x4) & (1 << pin_shift))
724 reg = READ4(sc, bank.port, bank.con + 0x4);
763 reg = READ4(sc, bank.port, bank.con);
769 reg = READ4(s
[all...]
H A Dexynos5_combiner.c281 intrs = READ4(sc, CIPSR);
287 cirq = READ4(sc, ISTR(n));
H A Dexynos5_fimd.c293 reg = READ4(sc, SHADOWCON);
/freebsd-11.0-release/sys/arm/freescale/imx/
H A Dimx6_ssi.c64 #define READ4(_sc, _reg) \ macro
546 reg = READ4(sc, SSI_SIER);
667 READ4(sc, SSI_SISR));
676 reg = READ4(sc, SSI_STCCR);
687 reg = READ4(sc, SSI_SFCSR);
692 reg = READ4(sc, SSI_STCR);
705 reg = READ4(sc, SSI_SCR);
H A Dimx6_audmux.c56 #define READ4(_sc, _reg) \ macro
/freebsd-11.0-release/sys/dev/hatm/
H A Dif_hatm.c519 while (((v = READ4(sc, HE_REGO_RESET_CNTL)) & HE_REGM_RESET_STATE) == 0) {
538 v = READ4(sc, HE_REGO_HOST_CNTL);
567 v = READ4(sc, HE_REGO_LB_SWAP);
602 val = READ4(sc, HE_REGO_HOST_CNTL);
639 tmp_read = READ4(sc, HE_REGO_HOST_CNTL);
847 lbufd_addr = READ4(sc, HE_REGO_RCMLBM_BA) + lbufd_index * 2;
900 lbufd_addr = READ4(sc, HE_REGO_RCMLBM_BA) + lbufd_index * 2;
1026 uint32_t base = READ4(sc, HE_REGO_RCMABR_BA);
1288 sc->istats.mcc += READ4(sc, HE_REGO_MCC);
1289 sc->istats.oec += READ4(s
[all...]
H A Dif_hatm_rx.c319 v = READ4(sc, HE_REGO_RCCSTAT);
321 (READ4(sc, HE_REGO_RCCSTAT) & HE_REGM_RCCSTAT_PROG))
H A Dif_hatm_intr.c322 rbp->head = (READ4(sc, HE_REGO_RBP_S(large, group)) >> HE_REGS_RBP_HEAD)
545 (void)READ4(sc, HE_REGO_INT_FIFO);
553 tail = READ4(sc, HE_REGO_IRQ_BASE(q->group)) &
687 READ4(sc, HE_REGO_ABORT_ADDR));
727 (void)READ4(sc, HE_REGO_INT_FIFO);
H A Dif_hatm_tx.c187 (READ4(sc, HE_REGO_TPDRQ_H) >> HE_REGS_TPDRQ_H_H) &
/freebsd-11.0-release/sys/arm/freescale/vybrid/
H A Dvf_port.c118 reg = READ4(sc, PORT_PCR(i));
176 reg = READ4(sc, PORT_PCR(pnum));
H A Dvf_gpio.c146 (READ4(sc, GPIO_PDOR(i)) & (1 << (i % 32))) ?
262 *val = (READ4(sc, GPIO_PDIR(i)) & (1 << (i % 32))) ? 1 : 0;
H A Dvf_dcu4.c230 reg = READ4(sc, DCU_INT_STATUS);
352 reg = READ4(sc, DCU_DCU_MODE);
/freebsd-11.0-release/sys/dev/beri/
H A Dberi_ring.c64 #define READ4(_sc, _reg) \ macro
121 ((uint32_t *)dst)[0] = READ4(sc, offset);
122 ((uint32_t *)dst)[1] = READ4(sc, offset + 4);
/freebsd-11.0-release/sys/arm/altera/socfpga/
H A Dsocfpga_rstmgr.c150 reg = READ4(sc, RSTMGR_BRGMODRST);
/freebsd-11.0-release/sys/dev/agp/
H A Dagp_amd.c57 #define READ4(off) bus_space_read_4(sc->bst, sc->bsh, off) macro
374 } while (READ4(AGP_AMD751_TLBCTRL));
H A Dagp_ati.c58 #define READ4(off) bus_space_read_4(sc->bst, sc->bsh, off) macro
348 (void)READ4(ATI_GART_CACHE_CNTRL);
/freebsd-11.0-release/sys/dev/beri/virtio/network/
H A Dif_vtbe.c93 #define READ4(_sc, _reg) \ macro
353 reg = READ4(sc, VIRTIO_MMIO_QUEUE_PFN);
479 reg = READ4(sc, VIRTIO_MMIO_QUEUE_SEL);
/freebsd-11.0-release/sys/dev/fatm/
H A Dif_fatm.c373 h = READ4(sc, FATMO_HEARTBEAT);
444 val = READ4(sc, FATMO_BOOT_STATUS);
577 c = READ4(sc, FATMO_UART_TO_HOST);
612 c1 = READ4(sc, FATMO_UART_TO_960);
663 val = READ4(sc, FATMO_BOOT_STATUS);
780 c = READ4(sc, FATMO_INIT + FATMOI_STATUS);
800 off = READ4(sc, FATMO_COMMAND_QUEUE);
823 READ4(sc, FATMO_TRANSMIT_QUEUE),
828 READ4(sc, FATMO_RECEIVE_QUEUE),
833 READ4(s
[all...]
H A Dif_fatmvar.h329 #define READ4(SC, OFF) bus_space_read_4(SC->memt, SC->memh, OFF) macro
/freebsd-11.0-release/sys/dev/beri/virtio/
H A Dvirtio_block.c321 reg = READ4(sc, VIRTIO_MMIO_QUEUE_PFN);

Completed in 120 milliseconds

12