1263426Sbr/*- 2263426Sbr * Copyright (c) 2014 Ruslan Bukin <br@bsdpad.com> 3263426Sbr * All rights reserved. 4263426Sbr * 5263426Sbr * Redistribution and use in source and binary forms, with or without 6263426Sbr * modification, are permitted provided that the following conditions 7263426Sbr * are met: 8263426Sbr * 1. Redistributions of source code must retain the above copyright 9263426Sbr * notice, this list of conditions and the following disclaimer. 10263426Sbr * 2. Redistributions in binary form must reproduce the above copyright 11263426Sbr * notice, this list of conditions and the following disclaimer in the 12263426Sbr * documentation and/or other materials provided with the distribution. 13263426Sbr * 14263426Sbr * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15263426Sbr * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16263426Sbr * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17263426Sbr * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18263426Sbr * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19263426Sbr * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20263426Sbr * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21263426Sbr * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22263426Sbr * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23263426Sbr * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24263426Sbr * SUCH DAMAGE. 25263426Sbr */ 26263426Sbr 27263426Sbr/* 28263426Sbr * Samsung Exynos 5 Display Controller 29263426Sbr * Chapter 15, Exynos 5 Dual User's Manual Public Rev 1.00 30263426Sbr */ 31263426Sbr 32263426Sbr#include <sys/cdefs.h> 33263426Sbr__FBSDID("$FreeBSD: releng/11.0/sys/arm/samsung/exynos/exynos5_fimd.c 269702 2014-08-08 06:29:30Z nwhitehorn $"); 34263426Sbr 35263426Sbr#include <sys/param.h> 36263426Sbr#include <sys/systm.h> 37263426Sbr#include <sys/bus.h> 38263426Sbr#include <sys/kernel.h> 39263426Sbr#include <sys/module.h> 40263426Sbr#include <sys/malloc.h> 41263426Sbr#include <sys/rman.h> 42263426Sbr#include <sys/timeet.h> 43263426Sbr#include <sys/timetc.h> 44263426Sbr#include <sys/watchdog.h> 45263426Sbr#include <sys/fbio.h> 46263426Sbr#include <sys/consio.h> 47263426Sbr#include <sys/eventhandler.h> 48263426Sbr#include <sys/gpio.h> 49263426Sbr 50263934Sbr#include <vm/vm.h> 51263934Sbr#include <vm/vm_extern.h> 52263934Sbr#include <vm/vm_kern.h> 53269702Snwhitehorn#include <vm/pmap.h> 54263934Sbr 55263426Sbr#include <dev/ofw/openfirm.h> 56263426Sbr#include <dev/ofw/ofw_bus.h> 57263426Sbr#include <dev/ofw/ofw_bus_subr.h> 58263426Sbr 59263426Sbr#include <dev/vt/vt.h> 60263426Sbr#include <dev/vt/colors/vt_termcolors.h> 61263426Sbr 62263426Sbr#include <arm/samsung/exynos/exynos5_common.h> 63263426Sbr 64263426Sbr#include "gpio_if.h" 65263426Sbr 66263426Sbr#include <machine/bus.h> 67263426Sbr#include <machine/cpu.h> 68263426Sbr#include <machine/intr.h> 69263426Sbr 70263426Sbr#include "fb_if.h" 71263426Sbr 72263426Sbr#define FIMDBYPASS_DISP1 (1 << 15) 73263426Sbr 74263426Sbr#define VIDCON0 (0x0) 75263426Sbr#define VIDCON0_ENVID (1 << 1) 76263426Sbr#define VIDCON0_ENVID_F (1 << 0) 77263426Sbr#define CLKVAL_F 0xb 78263426Sbr#define CLKVAL_F_OFFSET 6 79263426Sbr 80263426Sbr#define WINCON0 0x0020 81263426Sbr#define WINCON1 0x0024 82263426Sbr#define WINCON2 0x0028 83263426Sbr#define WINCON3 0x002C 84263426Sbr#define WINCON4 0x0030 85263426Sbr 86263426Sbr#define ENLOCAL_F (1 << 22) 87263426Sbr#define BPPMODE_F_RGB_16BIT_565 0x5 88263426Sbr#define BPPMODE_F_OFFSET 2 89263426Sbr#define ENWIN_F_ENABLE (1 << 0) 90263426Sbr#define HALF_WORD_SWAP_EN (1 << 16) 91263426Sbr 92263426Sbr#define SHADOWCON 0x0034 93263426Sbr#define CHANNEL0_EN (1 << 0) 94263426Sbr 95263426Sbr#define VIDOSD0A 0x0040 96263426Sbr#define VIDOSD0B 0x0044 97263426Sbr#define VIDOSD0C 0x0048 98263426Sbr 99263426Sbr#define VIDW00ADD0B0 0x00A0 100263426Sbr#define VIDW00ADD0B1 0x00A4 101263426Sbr#define VIDW00ADD0B2 0x20A0 102263426Sbr#define VIDW00ADD1B0 0x00D0 103263426Sbr#define VIDW00ADD1B1 0x00D4 104263426Sbr#define VIDW00ADD1B2 0x20D0 105263426Sbr 106263426Sbr#define VIDW00ADD2 0x0100 107263426Sbr#define VIDW01ADD2 0x0104 108263426Sbr#define VIDW02ADD2 0x0108 109263426Sbr#define VIDW03ADD2 0x010C 110263426Sbr#define VIDW04ADD2 0x0110 111263426Sbr 112263426Sbr#define VIDCON1 (0x04) 113263426Sbr#define VIDTCON0 0x0010 114263426Sbr#define VIDTCON1 0x0014 115263426Sbr#define VIDTCON2 0x0018 116263426Sbr#define VIDTCON3 0x001C 117263426Sbr 118263426Sbr#define VIDINTCON0 0x0130 119263426Sbr#define VIDINTCON1 0x0134 120263426Sbr 121263426Sbr#define VSYNC_PULSE_WIDTH_VAL 0x3 122263426Sbr#define VSYNC_PULSE_WIDTH_OFFSET 0 123263426Sbr#define V_FRONT_PORCH_VAL 0x3 124263426Sbr#define V_FRONT_PORCH_OFFSET 8 125263426Sbr#define V_BACK_PORCH_VAL 0x3 126263426Sbr#define V_BACK_PORCH_OFFSET 16 127263426Sbr 128263426Sbr#define HSYNC_PULSE_WIDTH_VAL 0x3 129263426Sbr#define HSYNC_PULSE_WIDTH_OFFSET 0 130263426Sbr#define H_FRONT_PORCH_VAL 0x3 131263426Sbr#define H_FRONT_PORCH_OFFSET 8 132263426Sbr#define H_BACK_PORCH_VAL 0x3 133263426Sbr#define H_BACK_PORCH_OFFSET 16 134263426Sbr 135263426Sbr#define HOZVAL_OFFSET 0 136263426Sbr#define LINEVAL_OFFSET 11 137263426Sbr 138263426Sbr#define OSD_RIGHTBOTX_F_OFFSET 11 139263426Sbr#define OSD_RIGHTBOTY_F_OFFSET 0 140263426Sbr 141263426Sbr#define DPCLKCON 0x27c 142263426Sbr#define DPCLKCON_EN (1 << 1) 143263426Sbr 144263426Sbr#define DREAD4(_sc, _reg) \ 145263426Sbr bus_space_read_4(_sc->bst_disp, _sc->bsh_disp, _reg) 146263426Sbr#define DWRITE4(_sc, _reg, _val) \ 147263426Sbr bus_space_write_4(_sc->bst_disp, _sc->bsh_disp, _reg, _val) 148263426Sbr 149263426Sbrstruct panel_info { 150263426Sbr uint32_t width; 151263426Sbr uint32_t height; 152263426Sbr uint32_t h_back_porch; 153263426Sbr uint32_t h_pulse_width; 154263426Sbr uint32_t h_front_porch; 155263426Sbr uint32_t v_back_porch; 156263426Sbr uint32_t v_pulse_width; 157263426Sbr uint32_t v_front_porch; 158263426Sbr uint32_t clk_div; 159263426Sbr uint32_t backlight_pin; 160263426Sbr uint32_t fixvclk; 161263426Sbr uint32_t ivclk; 162263426Sbr uint32_t clkval_f; 163263426Sbr}; 164263426Sbr 165263426Sbrstruct fimd_softc { 166263426Sbr struct resource *res[3]; 167263426Sbr bus_space_tag_t bst; 168263426Sbr bus_space_handle_t bsh; 169263426Sbr bus_space_tag_t bst_disp; 170263426Sbr bus_space_handle_t bsh_disp; 171263426Sbr bus_space_tag_t bst_sysreg; 172263426Sbr bus_space_handle_t bsh_sysreg; 173263426Sbr 174263426Sbr void *ih; 175263426Sbr device_t dev; 176263426Sbr device_t sc_fbd; /* fbd child */ 177263426Sbr struct fb_info sc_info; 178263426Sbr struct panel_info *panel; 179263426Sbr}; 180263426Sbr 181263426Sbrstatic struct resource_spec fimd_spec[] = { 182263426Sbr { SYS_RES_MEMORY, 0, RF_ACTIVE }, /* Timer registers */ 183263426Sbr { SYS_RES_MEMORY, 1, RF_ACTIVE }, /* FIMD */ 184263426Sbr { SYS_RES_MEMORY, 2, RF_ACTIVE }, /* DISP */ 185263426Sbr { -1, 0 } 186263426Sbr}; 187263426Sbr 188263426Sbrstatic int 189263426Sbrfimd_probe(device_t dev) 190263426Sbr{ 191263426Sbr 192263426Sbr if (!ofw_bus_status_okay(dev)) 193263426Sbr return (ENXIO); 194263426Sbr 195263426Sbr if (!ofw_bus_is_compatible(dev, "exynos,fimd")) 196263426Sbr return (ENXIO); 197263426Sbr 198263426Sbr device_set_desc(dev, "Samsung Exynos 5 Display Controller"); 199263426Sbr return (BUS_PROBE_DEFAULT); 200263426Sbr} 201263426Sbr 202263426Sbrstatic int 203263426Sbrget_panel_info(struct fimd_softc *sc, struct panel_info *panel) 204263426Sbr{ 205263426Sbr phandle_t node; 206263426Sbr pcell_t dts_value[3]; 207263426Sbr int len; 208263426Sbr 209263426Sbr if ((node = ofw_bus_get_node(sc->dev)) == -1) 210263426Sbr return (ENXIO); 211263426Sbr 212263426Sbr /* panel size */ 213263426Sbr if ((len = OF_getproplen(node, "panel-size")) <= 0) 214263426Sbr return (ENXIO); 215269702Snwhitehorn OF_getencprop(node, "panel-size", dts_value, len); 216269702Snwhitehorn panel->width = dts_value[0]; 217269702Snwhitehorn panel->height = dts_value[1]; 218263426Sbr 219263426Sbr /* hsync */ 220263426Sbr if ((len = OF_getproplen(node, "panel-hsync")) <= 0) 221263426Sbr return (ENXIO); 222269702Snwhitehorn OF_getencprop(node, "panel-hsync", dts_value, len); 223269702Snwhitehorn panel->h_back_porch = dts_value[0]; 224269702Snwhitehorn panel->h_pulse_width = dts_value[1]; 225269702Snwhitehorn panel->h_front_porch = dts_value[2]; 226263426Sbr 227263426Sbr /* vsync */ 228263426Sbr if ((len = OF_getproplen(node, "panel-vsync")) <= 0) 229263426Sbr return (ENXIO); 230269702Snwhitehorn OF_getencprop(node, "panel-vsync", dts_value, len); 231269702Snwhitehorn panel->v_back_porch = dts_value[0]; 232269702Snwhitehorn panel->v_pulse_width = dts_value[1]; 233269702Snwhitehorn panel->v_front_porch = dts_value[2]; 234263426Sbr 235263426Sbr /* clk divider */ 236263426Sbr if ((len = OF_getproplen(node, "panel-clk-div")) <= 0) 237263426Sbr return (ENXIO); 238269702Snwhitehorn OF_getencprop(node, "panel-clk-div", dts_value, len); 239269702Snwhitehorn panel->clk_div = dts_value[0]; 240263426Sbr 241263426Sbr /* backlight pin */ 242263426Sbr if ((len = OF_getproplen(node, "panel-backlight-pin")) <= 0) 243263426Sbr return (ENXIO); 244269702Snwhitehorn OF_getencprop(node, "panel-backlight-pin", dts_value, len); 245269702Snwhitehorn panel->backlight_pin = dts_value[0]; 246263426Sbr 247263426Sbr return (0); 248263426Sbr} 249263426Sbr 250263426Sbrstatic int 251263426Sbrfimd_init(struct fimd_softc *sc) 252263426Sbr{ 253263426Sbr struct panel_info *panel; 254263426Sbr int reg; 255263426Sbr 256263426Sbr panel = sc->panel; 257263426Sbr 258263426Sbr /* fb_init */ 259263426Sbr reg = panel->ivclk | panel->fixvclk; 260263426Sbr DWRITE4(sc,VIDCON1,reg); 261263426Sbr 262263426Sbr reg = (VIDCON0_ENVID | VIDCON0_ENVID_F); 263263426Sbr reg |= (panel->clkval_f << CLKVAL_F_OFFSET); 264263426Sbr WRITE4(sc,VIDCON0,reg); 265263426Sbr 266263426Sbr reg = (panel->v_pulse_width << VSYNC_PULSE_WIDTH_OFFSET); 267263426Sbr reg |= (panel->v_front_porch << V_FRONT_PORCH_OFFSET); 268263426Sbr reg |= (panel->v_back_porch << V_BACK_PORCH_OFFSET); 269263426Sbr DWRITE4(sc,VIDTCON0,reg); 270263426Sbr 271263426Sbr reg = (panel->h_pulse_width << HSYNC_PULSE_WIDTH_OFFSET); 272263426Sbr reg |= (panel->h_front_porch << H_FRONT_PORCH_OFFSET); 273263426Sbr reg |= (panel->h_back_porch << H_BACK_PORCH_OFFSET); 274263426Sbr DWRITE4(sc,VIDTCON1,reg); 275263426Sbr 276263426Sbr reg = ((panel->width - 1) << HOZVAL_OFFSET); 277263426Sbr reg |= ((panel->height - 1) << LINEVAL_OFFSET); 278263426Sbr DWRITE4(sc,VIDTCON2,reg); 279263426Sbr 280264150Sbr reg = sc->sc_info.fb_pbase; 281264150Sbr WRITE4(sc, VIDW00ADD0B0, reg); 282264150Sbr reg += (sc->sc_info.fb_stride * (sc->sc_info.fb_height + 1)); 283264150Sbr WRITE4(sc, VIDW00ADD1B0, reg); 284264150Sbr WRITE4(sc, VIDW00ADD2, sc->sc_info.fb_stride); 285263426Sbr 286263426Sbr reg = ((panel->width - 1) << OSD_RIGHTBOTX_F_OFFSET); 287263426Sbr reg |= ((panel->height - 1) << OSD_RIGHTBOTY_F_OFFSET); 288263426Sbr WRITE4(sc,VIDOSD0B,reg); 289263426Sbr 290263426Sbr reg = panel->width * panel->height; 291263426Sbr WRITE4(sc,VIDOSD0C,reg); 292263426Sbr 293263426Sbr reg = READ4(sc, SHADOWCON); 294263426Sbr reg |= CHANNEL0_EN; 295263426Sbr reg &= ~(1 << 5); /* disable local path for channel0 */ 296263426Sbr WRITE4(sc,SHADOWCON,reg); 297263426Sbr 298263426Sbr reg = BPPMODE_F_RGB_16BIT_565 << BPPMODE_F_OFFSET; 299263426Sbr reg |= ENWIN_F_ENABLE | HALF_WORD_SWAP_EN; /* Note: swap=0 when ENLOCAL==1 */ 300263426Sbr reg &= ~ENLOCAL_F; /* use DMA */ 301263426Sbr WRITE4(sc,WINCON0,reg); 302263426Sbr 303263426Sbr /* Enable DisplayPort Clk */ 304263426Sbr WRITE4(sc, DPCLKCON, DPCLKCON_EN); 305263426Sbr 306263426Sbr return (0); 307263426Sbr} 308263426Sbr 309263426Sbrstatic int 310263426Sbrfimd_attach(device_t dev) 311263426Sbr{ 312263426Sbr struct panel_info panel; 313263426Sbr struct fimd_softc *sc; 314263426Sbr device_t gpio_dev; 315263426Sbr int reg; 316263426Sbr 317263426Sbr sc = device_get_softc(dev); 318263426Sbr sc->dev = dev; 319263426Sbr 320263426Sbr if (bus_alloc_resources(dev, fimd_spec, sc->res)) { 321263426Sbr device_printf(dev, "could not allocate resources\n"); 322263426Sbr return (ENXIO); 323263426Sbr } 324263426Sbr 325263426Sbr /* Memory interface */ 326263426Sbr sc->bst = rman_get_bustag(sc->res[0]); 327263426Sbr sc->bsh = rman_get_bushandle(sc->res[0]); 328263426Sbr sc->bst_disp = rman_get_bustag(sc->res[1]); 329263426Sbr sc->bsh_disp = rman_get_bushandle(sc->res[1]); 330263426Sbr sc->bst_sysreg = rman_get_bustag(sc->res[2]); 331263426Sbr sc->bsh_sysreg = rman_get_bushandle(sc->res[2]); 332263426Sbr 333263426Sbr if (get_panel_info(sc, &panel)) { 334263426Sbr device_printf(dev, "Can't get panel info\n"); 335263426Sbr return (ENXIO); 336263426Sbr } 337263426Sbr 338263426Sbr panel.fixvclk = 0; 339263426Sbr panel.ivclk = 0; 340263426Sbr panel.clkval_f = 2; 341263426Sbr 342263426Sbr sc->panel = &panel; 343263426Sbr 344263426Sbr /* Get the GPIO device, we need this to give power to USB */ 345263426Sbr gpio_dev = devclass_get_device(devclass_find("gpio"), 0); 346263426Sbr if (gpio_dev == NULL) { 347263426Sbr /* TODO */ 348263426Sbr } 349263426Sbr 350263426Sbr reg = bus_space_read_4(sc->bst_sysreg, sc->bsh_sysreg, 0x214); 351263426Sbr reg |= FIMDBYPASS_DISP1; 352263426Sbr bus_space_write_4(sc->bst_sysreg, sc->bsh_sysreg, 0x214, reg); 353263426Sbr 354263426Sbr sc->sc_info.fb_width = panel.width; 355263426Sbr sc->sc_info.fb_height = panel.height; 356263426Sbr sc->sc_info.fb_stride = sc->sc_info.fb_width * 2; 357263426Sbr sc->sc_info.fb_bpp = sc->sc_info.fb_depth = 16; 358263426Sbr sc->sc_info.fb_size = sc->sc_info.fb_height * sc->sc_info.fb_stride; 359263934Sbr sc->sc_info.fb_vbase = (intptr_t)kmem_alloc_contig(kernel_arena, 360263934Sbr sc->sc_info.fb_size, M_ZERO, 0, ~0, PAGE_SIZE, 0, VM_MEMATTR_UNCACHEABLE); 361263426Sbr sc->sc_info.fb_pbase = (intptr_t)vtophys(sc->sc_info.fb_vbase); 362263426Sbr 363263426Sbr#if 0 364263426Sbr printf("%dx%d [%d]\n", sc->sc_info.fb_width, sc->sc_info.fb_height, 365263426Sbr sc->sc_info.fb_stride); 366263426Sbr printf("pbase == 0x%08x\n", sc->sc_info.fb_pbase); 367263426Sbr#endif 368263426Sbr 369263426Sbr memset((int8_t *)sc->sc_info.fb_vbase, 0x0, sc->sc_info.fb_size); 370263426Sbr 371263426Sbr fimd_init(sc); 372263426Sbr 373263426Sbr sc->sc_info.fb_name = device_get_nameunit(dev); 374263426Sbr 375263426Sbr /* Ask newbus to attach framebuffer device to me. */ 376263426Sbr sc->sc_fbd = device_add_child(dev, "fbd", device_get_unit(dev)); 377263426Sbr if (sc->sc_fbd == NULL) 378263426Sbr device_printf(dev, "Can't attach fbd device\n"); 379263426Sbr 380263426Sbr if (device_probe_and_attach(sc->sc_fbd) != 0) { 381263426Sbr device_printf(sc->dev, "Failed to attach fbd device\n"); 382263426Sbr } 383263426Sbr 384263426Sbr return (0); 385263426Sbr} 386263426Sbr 387263426Sbrstatic struct fb_info * 388263426Sbrfimd_fb_getinfo(device_t dev) 389263426Sbr{ 390263426Sbr struct fimd_softc *sc = device_get_softc(dev); 391263426Sbr 392263426Sbr return (&sc->sc_info); 393263426Sbr} 394263426Sbr 395263426Sbrstatic device_method_t fimd_methods[] = { 396263426Sbr DEVMETHOD(device_probe, fimd_probe), 397263426Sbr DEVMETHOD(device_attach, fimd_attach), 398263426Sbr 399263426Sbr /* Framebuffer service methods */ 400263426Sbr DEVMETHOD(fb_getinfo, fimd_fb_getinfo), 401263426Sbr { 0, 0 } 402263426Sbr}; 403263426Sbr 404263426Sbrstatic driver_t fimd_driver = { 405263426Sbr "fb", 406263426Sbr fimd_methods, 407263426Sbr sizeof(struct fimd_softc), 408263426Sbr}; 409263426Sbr 410263426Sbrstatic devclass_t fimd_devclass; 411263426Sbr 412263426SbrDRIVER_MODULE(fb, simplebus, fimd_driver, fimd_devclass, 0, 0); 413