Searched refs:createReg (Results 26 - 50 of 65) sorted by relevance

123

/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCMCInstLower.cpp87 return MCOperand::createReg(MO.getReg());
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRMCInstLower.cpp76 MCOp = MCOperand::createReg(MO.getReg());
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/BPF/AsmParser/
H A DBPFAsmParser.cpp188 Inst.addOperand(MCOperand::createReg(getReg()));
204 static std::unique_ptr<BPFOperand> createReg(unsigned RegNo, SMLoc S, function in struct:__anon2197::BPFOperand
420 Operands.push_back(BPFOperand::createReg(RegNo, S, E));
459 Operands.push_back(BPFOperand::createReg(RegNo, NameLoc, E));
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/Disassembler/
H A DAArch64Disassembler.cpp321 Inst.addOperand(MCOperand::createReg(Register));
350 Inst.addOperand(MCOperand::createReg(Register));
371 Inst.addOperand(MCOperand::createReg(Register));
392 Inst.addOperand(MCOperand::createReg(Register));
413 Inst.addOperand(MCOperand::createReg(Register));
434 Inst.addOperand(MCOperand::createReg(Register));
445 Inst.addOperand(MCOperand::createReg(Register));
457 Inst.addOperand(MCOperand::createReg(Register));
478 Inst.addOperand(MCOperand::createReg(Register));
491 Inst.addOperand(MCOperand::createReg(Registe
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/AsmParser/
H A DPPCAsmParser.cpp415 Inst.addOperand(MCOperand::createReg(RRegs[getReg()]));
420 Inst.addOperand(MCOperand::createReg(RRegsNoR0[getReg()]));
425 Inst.addOperand(MCOperand::createReg(XRegs[getReg()]));
430 Inst.addOperand(MCOperand::createReg(XRegsNoX0[getReg()]));
449 Inst.addOperand(MCOperand::createReg(FRegs[getReg()]));
454 Inst.addOperand(MCOperand::createReg(FRegs[getReg()]));
459 Inst.addOperand(MCOperand::createReg(VFRegs[getReg()]));
464 Inst.addOperand(MCOperand::createReg(VRegs[getReg()]));
469 Inst.addOperand(MCOperand::createReg(VSRegs[getVSReg()]));
474 Inst.addOperand(MCOperand::createReg(VSFReg
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMAsmPrinter.cpp1402 TmpInst.addOperand(MCOperand::createReg(MI->getOperand(0).getReg()));
1423 TmpInst.addOperand(MCOperand::createReg(0));
1425 TmpInst.addOperand(MCOperand::createReg(0));
1434 TmpInst.addOperand(MCOperand::createReg(MI->getOperand(0).getReg()));
1435 TmpInst.addOperand(MCOperand::createReg(MI->getOperand(1).getReg()));
1455 TmpInst.addOperand(MCOperand::createReg(0));
1457 TmpInst.addOperand(MCOperand::createReg(0));
1760 TmpInst.addOperand(MCOperand::createReg(ARM::PC));
1761 TmpInst.addOperand(MCOperand::createReg(MI->getOperand(0).getReg()));
1764 TmpInst.addOperand(MCOperand::createReg(
[all...]
H A DARMMCInstLower.cpp81 MCOp = MCOperand::createReg(MO.getReg());
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsAsmPrinter.cpp145 TmpInst0.addOperand(MCOperand::createReg(ZeroReg));
870 I.addOperand(MCOperand::createReg(Reg));
889 I.addOperand(MCOperand::createReg(Reg1));
890 I.addOperand(MCOperand::createReg(Reg2));
899 I.addOperand(MCOperand::createReg(Reg1));
900 I.addOperand(MCOperand::createReg(Reg2));
901 I.addOperand(MCOperand::createReg(Reg3));
H A DMipsMCInstLower.cpp186 return MCOperand::createReg(MO.getReg());
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/
H A DARMDisassembler.cpp738 MI.insert(I, MCOperand::createReg(InITBlock ? 0 : ARM::CPSR));
743 MI.insert(I, MCOperand::createReg(InITBlock ? 0 : ARM::CPSR));
837 MI.insert(CCI, MCOperand::createReg(0));
839 MI.insert(CCI, MCOperand::createReg(ARM::CPSR));
854 MI.insert(VCCI, MCOperand::createReg(0));
856 MI.insert(VCCI, MCOperand::createReg(ARM::P0));
1133 Inst.addOperand(MCOperand::createReg(Register));
1147 Inst.addOperand(MCOperand::createReg(Register));
1171 Inst.addOperand(MCOperand::createReg(ARM::APSR_NZCV));
1186 Inst.addOperand(MCOperand::createReg(AR
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64MCInstLower.cpp261 MCOp = MCOperand::createReg(MO.getReg());
309 OutMI.addOperand(MCOperand::createReg(AArch64::LR));
314 OutMI.addOperand(MCOperand::createReg(AArch64::LR));
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/AsmParser/
H A DSystemZAsmParser.cpp169 createReg(RegisterKind Kind, unsigned Num, SMLoc StartLoc, SMLoc EndLoc) { function in class:__anon2401::SystemZOperand
297 Inst.addOperand(MCOperand::createReg(getReg()));
306 Inst.addOperand(MCOperand::createReg(Mem.Base));
312 Inst.addOperand(MCOperand::createReg(Mem.Base));
314 Inst.addOperand(MCOperand::createReg(Mem.Index));
319 Inst.addOperand(MCOperand::createReg(Mem.Base));
326 Inst.addOperand(MCOperand::createReg(Mem.Base));
328 Inst.addOperand(MCOperand::createReg(Mem.Length.Reg));
333 Inst.addOperand(MCOperand::createReg(Mem.Base));
335 Inst.addOperand(MCOperand::createReg(Me
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/Disassembler/
H A DHexagonDisassembler.cpp524 Inst.addOperand(MCOperand::createReg(Table[RegNo]));
668 Inst.addOperand(MCOperand::createReg(Register));
696 Inst.addOperand(MCOperand::createReg(Register));
714 Inst.addOperand(MCOperand::createReg(Register));
774 Inst.addOperand(MCOperand::createReg(Register));
800 Inst.addOperand(MCOperand::createReg(Register));
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonAsmPrinter.cpp285 Inst.addOperand(MCOperand::createReg(Hexagon::R0));
466 TmpInst.addOperand(MCOperand::createReg(High));
467 TmpInst.addOperand(MCOperand::createReg(Low));
544 MappedInst.addOperand(MCOperand::createReg(Low));
556 MappedInst.addOperand(MCOperand::createReg(Low));
570 MappedInst.addOperand(MCOperand::createReg(Low));
H A DHexagonMCInstLower.cpp127 MCO = MCOperand::createReg(MO.getReg());
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcAsmPrinter.cpp179 MCOperand MCRegOP = MCOperand::createReg(MO.getReg());
212 MCOperand RegO7 = MCOperand::createReg(SP::O7);
226 MCOperand RegO7 = MCOperand::createReg(SP::O7);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Lanai/AsmParser/
H A DLanaiAsmParser.cpp402 Inst.addOperand(MCOperand::createReg(getReg()));
433 Inst.addOperand(MCOperand::createReg(getMemBaseReg()));
441 Inst.addOperand(MCOperand::createReg(getMemBaseReg()));
443 Inst.addOperand(MCOperand::createReg(getMemOffsetReg()));
592 static std::unique_ptr<LanaiOperand> createReg(unsigned RegNum, SMLoc Start, function in struct:__anon2281::LanaiOperand
703 return LanaiOperand::createReg(RegNum, Start, End);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/MSP430/Disassembler/
H A DMSP430Disassembler.cpp80 MI.addOperand(MCOperand::createReg(Reg));
98 MI.addOperand(MCOperand::createReg(Reg));
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/MC/
H A DMCInst.h115 static MCOperand createReg(unsigned Reg) { function in class:llvm::MCOperand
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCMCInstLower.cpp173 OutMO = MCOperand::createReg(MO.getReg());
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/
H A DAMDGPUDisassembler.cpp410 MCOperand::createReg(MI.getOperand(Tied).getReg()),
574 MI.getOperand(VDataIdx) = MCOperand::createReg(NewVdata);
578 MI.getOperand(VDstIdx) = MCOperand::createReg(NewVdata);
583 MI.getOperand(VAddr0Idx) = MCOperand::createReg(NewVAddr0);
610 return MCOperand::createReg(AMDGPU::getMCReg(RegId, STI));
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Sparc/AsmParser/
H A DSparcAsmParser.cpp335 Inst.addOperand(MCOperand::createReg(getReg()));
357 Inst.addOperand(MCOperand::createReg(getMemBase()));
360 Inst.addOperand(MCOperand::createReg(getMemOffsetReg()));
366 Inst.addOperand(MCOperand::createReg(getMemBase()));
537 MCOperand PrevReg = MCOperand::createReg(Sparc::G0);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/
H A DMipsAsmParser.cpp1051 Inst.addOperand(MCOperand::createReg(getGPR32Reg()));
1056 Inst.addOperand(MCOperand::createReg(getGPR32Reg()));
1061 Inst.addOperand(MCOperand::createReg(getGPR32Reg()));
1066 Inst.addOperand(MCOperand::createReg(getGPRMM16Reg()));
1071 Inst.addOperand(MCOperand::createReg(getGPRMM16Reg()));
1076 Inst.addOperand(MCOperand::createReg(getGPRMM16Reg()));
1081 Inst.addOperand(MCOperand::createReg(getGPRMM16Reg()));
1087 Inst.addOperand(MCOperand::createReg(getGPRMM16Reg()));
1095 Inst.addOperand(MCOperand::createReg(getGPR64Reg()));
1100 Inst.addOperand(MCOperand::createReg(getAFGR64Re
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/MSP430/AsmParser/
H A DMSP430AsmParser.cpp129 Inst.addOperand(MCOperand::createReg(Reg));
153 Inst.addOperand(MCOperand::createReg(Mem.Reg));
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/AsmParser/
H A DHexagonAsmParser.cpp380 Inst.addOperand(MCOperand::createReg(getReg()));
1321 Inst.addOperand(MCOperand::createReg(Hexagon::R0));
1387 Inst.addOperand(MCOperand::createReg(matchRegister(Reg2)));
1402 Inst.addOperand(MCOperand::createReg(matchRegister(Reg2)));
1418 Inst.addOperand(MCOperand::createReg(matchRegister(Reg2)));
1433 Inst.addOperand(MCOperand::createReg(MatchRegisterName(R2)));
1753 TmpInst.addOperand(MCOperand::createReg(matchRegister(Reg2)));
1897 TmpInst.addOperand(MCOperand::createReg(matchRegister(Reg2)));

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