Searched refs:ST (Results 26 - 50 of 311) sorted by relevance

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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIFrameLowering.h58 void emitFlatScratchInit(const GCNSubtarget &ST,
63 const GCNSubtarget &ST,
70 const GCNSubtarget &ST, const SIInstrInfo *TII, const SIRegisterInfo *TRI,
74 void emitEntryFunctionScratchSetup(const GCNSubtarget &ST, MachineFunction &MF,
H A DGCNIterativeScheduler.cpp110 const auto &ST = MF.getSubtarget<GCNSubtarget>(); local
116 R->MaxPressure.print(OS, &ST);
134 const auto &ST = MF.getSubtarget<GCNSubtarget>(); local
136 Before.print(OS, &ST);
138 After.print(OS, &ST);
420 const auto &ST = MF.getSubtarget<GCNSubtarget>(); local
425 SchedMaxRP.print(dbgs(), &ST),
427 MaxRP.print(dbgs(), &ST),
429 RegionMaxRP.print(dbgs(), &ST),
435 const auto &ST local
452 const auto &ST = MF.getSubtarget<GCNSubtarget>(); local
489 const auto &ST = MF.getSubtarget<GCNSubtarget>(); local
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H A DSIFrameLowering.cpp27 static ArrayRef<MCPhysReg> getAllSGPR128(const GCNSubtarget &ST, argument
30 ST.getMaxNumSGPRs(MF) / 4);
33 static ArrayRef<MCPhysReg> getAllSGPRs(const GCNSubtarget &ST, argument
36 ST.getMaxNumSGPRs(MF));
187 void SIFrameLowering::emitFlatScratchInit(const GCNSubtarget &ST, argument
190 const SIInstrInfo *TII = ST.getInstrInfo();
222 if (ST.flatScratchIsPointer()) {
223 if (ST.getGeneration() >= AMDGPUSubtarget::GFX10) {
251 assert(ST.getGeneration() < AMDGPUSubtarget::GFX10);
270 const GCNSubtarget &ST,
269 getReservedPrivateSegmentBufferReg( const GCNSubtarget &ST, const SIInstrInfo *TII, const SIRegisterInfo *TRI, SIMachineFunctionInfo *MFI, MachineFunction &MF) const argument
319 getReservedPrivateSegmentWaveByteOffsetReg( const GCNSubtarget &ST, const SIInstrInfo *TII, const SIRegisterInfo *TRI, SIMachineFunctionInfo *MFI, MachineFunction &MF) const argument
404 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); local
533 emitEntryFunctionScratchSetup(const GCNSubtarget &ST, MachineFunction &MF, MachineBasicBlock &MBB, SIMachineFunctionInfo *MFI, MachineBasicBlock::iterator I, unsigned PreloadedPrivateBufferReg, unsigned ScratchRsrcReg) const argument
686 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); local
828 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); local
950 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); local
988 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); local
1062 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); local
1099 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); local
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H A DGCNHazardRecognizer.cpp44 ST(MF.getSubtarget<GCNSubtarget>()),
45 TII(*ST.getInstrInfo()),
50 TSchedModel.init(&ST);
146 if (ST.hasNSAtoVMEMBug() && checkNSAtoVMEMHazard(MI) > 0)
152 if (ST.hasNoDataDepHazard())
176 if (ST.hasReadM0MovRelInterpHazard() &&
181 if (ST.hasReadM0SendMsgHazard() && isSendMsgTraceDataOrGDS(TII, *MI) &&
257 if (ST.hasNSAtoVMEMBug())
262 if (ST.hasNoDataDepHazard())
289 if (ST
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H A DSIAddIMGInit.cpp64 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); local
65 const SIInstrInfo *TII = ST.getInstrInfo();
66 const SIRegisterInfo *RI = ST.getRegisterInfo();
118 bool Packed = !ST.hasUnpackedD16VMem();
139 unsigned SizeLeft = ST.usePRTStrictNull() ? InitIdx : 1;
140 unsigned CurrIdx = ST.usePRTStrictNull() ? 1 : InitIdx;
H A DSIOptimizeExecMasking.cpp60 static Register isCopyFromExec(const MachineInstr &MI, const GCNSubtarget &ST) { argument
69 Src.getReg() == (ST.isWave32() ? AMDGPU::EXEC_LO : AMDGPU::EXEC))
78 static Register isCopyToExec(const MachineInstr &MI, const GCNSubtarget &ST) { argument
85 Dst.getReg() == (ST.isWave32() ? AMDGPU::EXEC_LO : AMDGPU::EXEC) &&
240 const GCNSubtarget &ST,
248 Register CopyFromExec = isCopyFromExec(*I, ST);
272 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); local
273 const SIRegisterInfo *TRI = ST.getRegisterInfo();
274 const SIInstrInfo *TII = ST.getInstrInfo();
275 MCRegister Exec = ST
238 findExecCopy( const SIInstrInfo &TII, const GCNSubtarget &ST, MachineBasicBlock &MBB, MachineBasicBlock::reverse_iterator I, unsigned CopyToExec) argument
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H A DAMDGPUInstrInfo.cpp28 AMDGPUInstrInfo::AMDGPUInstrInfo(const GCNSubtarget &ST) { } argument
H A DAMDGPUMachineFunction.cpp26 const AMDGPUSubtarget &ST = AMDGPUSubtarget::get(MF); local
42 ExplicitKernArgSize = ST.getExplicitKernArgSize(F, MaxKernArgAlign);
H A DGCNRegPressure.h54 unsigned getOccupancy(const GCNSubtarget &ST) const {
55 return std::min(ST.getOccupancyWithNumSGPRs(getSGPRNum()),
56 ST.getOccupancyWithNumVGPRs(getVGPRNum()));
64 bool higherOccupancy(const GCNSubtarget &ST, const GCNRegPressure& O) const { argument
65 return getOccupancy(ST) > O.getOccupancy(ST);
68 bool less(const GCNSubtarget &ST, const GCNRegPressure& O,
79 void print(raw_ostream &OS, const GCNSubtarget *ST = nullptr) const;
H A DSIMachineFunctionInfo.cpp50 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); local
52 FlatWorkGroupSizes = ST.getFlatWorkGroupSizes(F);
53 WavesPerEU = ST.getWavesPerEU(F);
55 Occupancy = ST.computeOccupancy(MF, getLDSSize());
87 MaxKernArgAlign = std::max(ST.getAlignmentForImplicitArgPtr(),
122 if (ST.getGeneration() >= AMDGPUSubtarget::GFX9 &&
128 bool isAmdHsaOrMesa = ST.isAmdHsaOrMesa(F);
140 } else if (ST.isMesaGfxShader(F)) {
147 if (ST.hasFlatAddressSpace() && isEntryFunction() && isAmdHsaOrMesa) {
182 const GCNSubtarget& ST local
254 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); local
268 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); local
328 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); local
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXTargetTransformInfo.h32 const NVPTXSubtarget *ST; member in class:llvm::NVPTXTTIImpl
35 const NVPTXSubtarget *getST() const { return ST; };
40 : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl()),
41 TLI(ST->getTargetLowering()) {}
/freebsd-11-stable/crypto/openssl/crypto/des/
H A DDES.xs71 l=SvCUR(ST(0));
80 sv_setpvn(ST(2),(char *)c[len-8],8);
97 l=SvCUR(ST(0));
105 sv_setpvn(ST(3),(char *)ivec1,8);
106 sv_setpvn(ST(4),(char *)ivec2,8);
124 l=SvCUR(ST(0));
131 sv_setpvn(ST(2),(char *)c,8);
149 len=SvCUR(ST(0));
157 sv_setpvn(ST(3),(char *)ivec,8);
190 len=SvCUR(ST(
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/IR/
H A DSymbolTableListTraitsImpl.h68 if (ValueSymbolTable *ST = getSymTab(Owner))
69 ST->reinsertValue(V);
77 if (ValueSymbolTable *ST = getSymTab(getListOwner()))
78 ST->removeValueName(V->getValueName());
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMLegalizerInfo.h29 ARMLegalizerInfo(const ARMSubtarget &ST);
H A DARMLegalizerInfo.cpp62 static bool AEABI(const ARMSubtarget &ST) { argument
63 return ST.isTargetAEABI() || ST.isTargetGNUAEABI() || ST.isTargetMuslAEABI();
66 ARMLegalizerInfo::ARMLegalizerInfo(const ARMSubtarget &ST) { argument
77 if (ST.isThumb1Only()) {
80 verify(*ST.getInstrInfo());
93 if (ST.hasNEON())
107 bool HasHWDivide = (!ST.isThumb() && ST
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H A DARMTargetTransformInfo.cpp79 if (!ST->isThumb()) {
84 return ST->hasV6T2Ops() ? 2 : 3;
86 if (ST->isThumb2()) {
91 return ST->hasV6T2Ops() ? 2 : 3;
138 if (ST->isThumb2() && NegImm < 1<<12)
141 if (ST->isThumb() && NegImm < 1<<8)
166 if (Src->isVectorTy() && ST->hasNEON() && (ISD == ISD::FP_ROUND ||
207 if (SrcTy.isVector() && ST->hasMVEIntegerOps()) {
293 if (SrcTy.isVector() && ST->hasNEON()) {
323 if (SrcTy.isFloatingPoint() && ST
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiTargetTransformInfo.h33 const LanaiSubtarget *ST; member in class:llvm::LanaiTTIImpl
36 const LanaiSubtarget *getST() const { return ST; }
41 : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)),
42 TLI(ST->getTargetLowering()) {}
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64StorePairSuppress.cpp125 const TargetSubtargetInfo &ST = MF.getSubtarget(); local
126 TII = static_cast<const AArch64InstrInfo *>(ST.getInstrInfo());
127 TRI = ST.getRegisterInfo();
129 SchedModel.init(&ST);
H A DAArch64TargetTransformInfo.h47 const AArch64Subtarget *ST; member in class:llvm::AArch64TTIImpl
50 const AArch64Subtarget *getST() const { return ST; }
64 : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)),
65 TLI(ST->getTargetLowering()) {}
92 if (ST->hasNEON())
101 if (ST->hasNEON())
109 return ST->getMinVectorRegisterBitWidth();
153 if (!isa<VectorType>(DataType) || !ST->hasSVE())
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCTargetTransformInfo.cpp52 if (ST->hasPOPCNTD() != PPCSubtarget::POPCNTD_Unavailable && TyWidth <= 64)
53 return ST->hasPOPCNTD() == PPCSubtarget::POPCNTD_Slow ?
189 if (ST->isPPC64() &&
241 const PPCTargetMachine &TM = ST->getTargetMachine();
454 if (ST->useSoftFloat()) {
483 const PPCTargetMachine &TM = ST->getTargetMachine();
485 SchedModel.init(ST);
559 if (ST->getCPUDirective() == PPC::DIR_A2) {
585 if (ST->getCPUDirective() == PPC::DIR_A2)
606 if (ST
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/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/Linker/
H A DIRMover.h31 KeyTy(const StructType *ST);
38 static unsigned getHashValue(const StructType *ST);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCFrameLowering.h31 ST(st) {}
72 const ARCSubtarget &ST; member in class:llvm::ARCFrameLowering
/freebsd-11-stable/stand/efi/loader/
H A Defi_main.c84 ST = system_table;
85 BS = ST->BootServices;
86 RS = ST->RuntimeServices;
98 ST->ConOut->OutputString(ST->ConOut, (CHAR16 *)L"Failed to allocate memory for heap.\r\n");
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86TargetTransformInfo.cpp64 // call ST->hasSSE3() instead of ST->hasPOPCNT().
65 return ST->hasPOPCNT() ? TTI::PSK_FastHardware : TTI::PSK_Software;
121 if (Vector && !ST->hasSSE1())
124 if (ST->is64Bit()) {
125 if (Vector && ST->hasAVX512())
133 unsigned PreferVectorWidth = ST->getPreferVectorWidth();
135 if (ST->hasAVX512() && PreferVectorWidth >= 512)
137 if (ST->hasAVX() && PreferVectorWidth >= 256)
139 if (ST
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/freebsd-11-stable/crypto/openssl/crypto/rc4/asm/
H A Drc4-parisc.pl64 $ST="stb";
69 $ST="stw";
100 $ST $TX[0],0($ix)
104 $ST $TY,0($iy)
120 $ST $TX[0],0($iy)
122 $ST $TY,0($ix)
232 $ST $XX[0],`-2*$SZ`($key)
233 $ST $YY,`-1*$SZ`($key)
252 $ST %r0,`0*$SZ`($key)
253 $ST
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