11573Srgrimes//===--------------------- SIFrameLowering.h --------------------*- C++ -*-===//
21573Srgrimes//
31573Srgrimes// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
41573Srgrimes// See https://llvm.org/LICENSE.txt for license information.
51573Srgrimes// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
61573Srgrimes//
71573Srgrimes//===----------------------------------------------------------------------===//
81573Srgrimes
91573Srgrimes#ifndef LLVM_LIB_TARGET_AMDGPU_SIFRAMELOWERING_H
101573Srgrimes#define LLVM_LIB_TARGET_AMDGPU_SIFRAMELOWERING_H
111573Srgrimes
121573Srgrimes#include "AMDGPUFrameLowering.h"
131573Srgrimes
141573Srgrimesnamespace llvm {
151573Srgrimes
16251672Semasteclass SIInstrInfo;
171573Srgrimesclass SIMachineFunctionInfo;
181573Srgrimesclass SIRegisterInfo;
191573Srgrimesclass GCNSubtarget;
201573Srgrimes
211573Srgrimesclass SIFrameLowering final : public AMDGPUFrameLowering {
221573Srgrimespublic:
231573Srgrimes  SIFrameLowering(StackDirection D, Align StackAl, int LAO,
241573Srgrimes                  Align TransAl = Align::None())
251573Srgrimes      : AMDGPUFrameLowering(D, StackAl, LAO, TransAl) {}
261573Srgrimes  ~SIFrameLowering() override = default;
271573Srgrimes
281573Srgrimes  void emitEntryFunctionPrologue(MachineFunction &MF,
291573Srgrimes                                 MachineBasicBlock &MBB) const;
301573Srgrimes  void emitPrologue(MachineFunction &MF,
311573Srgrimes                    MachineBasicBlock &MBB) const override;
321573Srgrimes  void emitEpilogue(MachineFunction &MF,
3350476Speter                    MachineBasicBlock &MBB) const override;
341573Srgrimes  int getFrameIndexReference(const MachineFunction &MF, int FI,
3587738Sru                             unsigned &FrameReg) const override;
361573Srgrimes
371573Srgrimes  void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
381573Srgrimes                            RegScavenger *RS = nullptr) const override;
3987027Sfenner  void determineCalleeSavesSGPR(MachineFunction &MF, BitVector &SavedRegs,
4087738Sru                                RegScavenger *RS = nullptr) const;
4187738Sru  bool
4287738Sru  assignCalleeSavedSpillSlots(MachineFunction &MF,
4387738Sru                              const TargetRegisterInfo *TRI,
4487738Sru                              std::vector<CalleeSavedInfo> &CSI) const override;
4559460Sphantom
4659460Sphantom  bool isSupportedStackID(TargetStackID::Value ID) const override;
471573Srgrimes
4883206Sasmodai  void processFunctionBeforeFrameFinalized(
4983206Sasmodai    MachineFunction &MF,
501573Srgrimes    RegScavenger *RS = nullptr) const override;
51103012Stjr
5273152Sobrien  MachineBasicBlock::iterator
53103012Stjr  eliminateCallFramePseudoInstr(MachineFunction &MF,
5487027Sfenner                                MachineBasicBlock &MBB,
5587027Sfenner                                MachineBasicBlock::iterator MI) const override;
56103012Stjr
5783206Sasmodaiprivate:
5883206Sasmodai  void emitFlatScratchInit(const GCNSubtarget &ST,
5983206Sasmodai                           MachineFunction &MF,
601573Srgrimes                           MachineBasicBlock &MBB) const;
6124880Sbde
621573Srgrimes  unsigned getReservedPrivateSegmentBufferReg(
631573Srgrimes    const GCNSubtarget &ST,
641573Srgrimes    const SIInstrInfo *TII,
651573Srgrimes    const SIRegisterInfo *TRI,
661573Srgrimes    SIMachineFunctionInfo *MFI,
671573Srgrimes    MachineFunction &MF) const;
681573Srgrimes
6987738Sru  std::pair<unsigned, bool> getReservedPrivateSegmentWaveByteOffsetReg(
701573Srgrimes      const GCNSubtarget &ST, const SIInstrInfo *TII, const SIRegisterInfo *TRI,
711573Srgrimes      SIMachineFunctionInfo *MFI, MachineFunction &MF) const;
7273152Sobrien
7373152Sobrien  // Emit scratch setup code for AMDPAL or Mesa, assuming ResourceRegUsed is set.
7473152Sobrien  void emitEntryFunctionScratchSetup(const GCNSubtarget &ST, MachineFunction &MF,
7573152Sobrien      MachineBasicBlock &MBB, SIMachineFunctionInfo *MFI,
7673152Sobrien      MachineBasicBlock::iterator I, unsigned PreloadedPrivateBufferReg,
7787738Sru      unsigned ScratchRsrcReg) const;
7873152Sobrien
7973152Sobrienpublic:
8087027Sfenner  bool hasFP(const MachineFunction &MF) const override;
8187027Sfenner};
8287027Sfenner
8387027Sfenner} // end namespace llvm
8487027Sfenner
8587738Sru#endif // LLVM_LIB_TARGET_AMDGPU_SIFRAMELOWERING_H
8687027Sfenner