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Searched refs:RegClass (Results 51 - 55 of 55) sorted by relevance

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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
H A D	AArch64ISelLowering.cpp	`12846 SDValue RegClass = local 12850 const SDValue Ops[] = { RegClass, VLo, SubReg0, VHi, SubReg1 };`
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A D	SIISelLowering.cpp	`10457 if ((OpInfo[I].RegClass != llvm::AMDGPU::AV_64RegClassID && 10458 OpInfo[I].RegClass != llvm::AMDGPU::AV_32RegClassID) \|\|`
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/
H A D	ARMDisassembler.cpp	`736 if (OpInfo[i].isOptionalDef() && OpInfo[i].RegClass == ARM::CCRRegClassID) {`
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A D	ARMISelLowering.cpp	`9208 SDValue RegClass = local 9212 const SDValue Ops[] = { RegClass, VLo, SubReg0, VHi, SubReg1 };`
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/
H A D	ARMAsmParser.cpp	`10319 if (MCID.OpInfo[I].RegClass == ARM::rGPRRegClassID) {`

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