Searched refs:Op (Results 301 - 325 of 699) sorted by relevance

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/freebsd-11-stable/contrib/llvm-project/clang/lib/StaticAnalyzer/Core/
H A DExprEngineC.cpp61 BinaryOperator::Opcode Op = B->getOpcode(); local
63 if (Op == BO_Assign) {
100 SVal Result = evalBinOp(state, Op, LeftV, RightV, B->getType());
115 switch (Op) {
118 case BO_MulAssign: Op = BO_Mul; break;
119 case BO_DivAssign: Op = BO_Div; break;
120 case BO_RemAssign: Op = BO_Rem; break;
121 case BO_AddAssign: Op = BO_Add; break;
122 case BO_SubAssign: Op = BO_Sub; break;
123 case BO_ShlAssign: Op
1098 BinaryOperator::Opcode Op = U->isIncrementOp() ? BO_Add : BO_Sub; local
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AVR/AsmParser/
H A DAVRAsmParser.cpp73 unsigned validateTargetOperandClass(MCParsedAsmOperand &Op,
287 AVROperand const &Op = (AVROperand const &)*Operands[ErrorInfo]; local
290 if (Op.getStartLoc() != SMLoc()) {
291 ErrorLoc = Op.getStartLoc();
696 AVROperand &Op = static_cast<AVROperand &>(AsmOp); local
701 if (Op.isImm()) {
702 if (MCConstantExpr const *Const = dyn_cast<MCConstantExpr>(Op.getImm())) {
708 Op.makeReg(RegNum);
709 if (validateOperandClass(Op, Expected) == Match_Success) {
717 if (Op
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Analysis/
H A DScalarEvolutionExpander.cpp38 Instruction::CastOps Op,
57 if (CI->getOpcode() == Op) {
64 Ret = CastInst::Create(Op, V, Ty, "", &*IP);
75 Ret = CastInst::Create(Op, V, Ty, V->getName(), &*IP);
110 Instruction::CastOps Op = CastInst::getCastOpcode(V, false, Ty, false); local
111 assert((Op == Instruction::BitCast ||
112 Op == Instruction::PtrToInt ||
113 Op == Instruction::IntToPtr) &&
119 if (Op == Instruction::BitCast) {
128 if ((Op
37 ReuseOrCreateCast(Value *V, Type *Ty, Instruction::CastOps Op, BasicBlock::iterator IP) argument
596 expandAddToGEP(const SCEV *Op, PointerType *PTy, Type *Ty, Value *V) argument
709 const SCEV *Op = I->second; local
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H A DDivergenceAnalysis.cpp129 for (const auto &Op : I.operands()) {
130 if (isDivergent(*Op))
231 for (auto &Op : I.operands()) {
232 auto *OpInst = dyn_cast<Instruction>(&Op);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/AsmParser/
H A DX86AsmParser.cpp144 bool isUnaryOperator(const InfixCalculatorTok Op) { argument
145 return Op == IC_NEG || Op == IC_NOT;
151 ICToken Op = PostfixStack.pop_back_val(); local
152 if (!(Op.first == IC_IMM || Op.first == IC_REGISTER))
154 return Op.second;
156 void pushOperand(InfixCalculatorTok Op, int64_t Val = 0) { argument
157 assert ((Op == IC_IMM || Op
163 pushOperator(InfixCalculatorTok Op) argument
226 ICToken Op = PostfixStack[i]; local
2124 HandleAVX512Operand(OperandVector &Operands, const MCParsedAsmOperand &Op) argument
2780 X86Operand &Op = (X86Operand &)*Operands.back(); local
2789 X86Operand &Op = (X86Operand &)*Operands[1]; local
3115 MatchFPUWaitAlias(SMLoc IDLoc, X86Operand &Op, OperandVector &Operands, MCStreamer &Out, bool MatchingInlineAsm) argument
3211 X86Operand &Op = static_cast<X86Operand &>(*Operands[0]); local
3419 X86Operand &Op = static_cast<X86Operand &>(*Operands[0]); local
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Bitcode/Reader/
H A DValueList.cpp39 : ConstantExpr(Ty, Instruction::UserOp1, &Op<0>(), 1) {
40 Op<0>() = UndefValue::get(Type::getInt32Ty(Context));
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/Support/
H A DCheckedArithmetic.h30 checkedOp(T LHS, T RHS, F Op, bool Signed = true) {
34 llvm::APInt Out = (ALHS.*Op)(ARHS, Overflow);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/BPF/MCTargetDesc/
H A DBPFMCCodeEmitter.cpp57 uint64_t getMemoryOpValue(const MCInst &MI, unsigned Op,
158 uint64_t BPFMCCodeEmitter::getMemoryOpValue(const MCInst &MI, unsigned Op, argument
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/Analysis/
H A DIVUsers.h62 void setOperandValToReplace(Value *Op) { argument
63 OperandValToReplace = Op;
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/IR/
H A DGlobalVariable.h138 return static_cast<Constant*>(Op<0>().get());
142 return static_cast<Constant*>(Op<0>().get());
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUPrintfRuntimeBinding.cpp162 Value *Op = CI->getArgOperand(0); local
164 if (auto LI = dyn_cast<LoadInst>(Op)) {
165 Op = LI->getPointerOperand();
166 for (auto Use : Op->users()) {
168 Op = SI->getValueOperand();
174 if (auto I = dyn_cast<Instruction>(Op)) {
177 Op = Op_simplified;
180 ConstantExpr *ConstExpr = dyn_cast<ConstantExpr>(Op);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/Utils/
H A DCodeMoverUtils.cpp127 for (const Value *Op : I.operands())
128 if (auto *OpInst = dyn_cast<Instruction>(Op))
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DLowerConstantIntrinsics.cpp44 Value *Op = II->getOperand(0); local
46 return isa<Constant>(Op) ? ConstantInt::getTrue(II->getType())
/freebsd-11-stable/contrib/llvm-project/clang/lib/AST/Interp/
H A DByteCodeEmitter.cpp126 bool ByteCodeEmitter::emitOp(Opcode Op, const Tys &... Args, const SourceInfo &SI) { argument
140 emit(reinterpret_cast<const char *>(&Op), sizeof(Opcode));
H A DByteCodeEmitter.h101 bool emitOp(Opcode Op, const Tys &... Args, const SourceInfo &L);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
H A DX86MCCodeEmitter.cpp109 void emitMemModRMByte(const MCInst &MI, unsigned Op, unsigned RegOpcodeField,
181 /// \param Op operand # of the memory operand.
184 static bool is16BitMemOperand(const MCInst &MI, unsigned Op,
186 const MCOperand &BaseReg = MI.getOperand(Op + X86::AddrBaseReg);
187 const MCOperand &IndexReg = MI.getOperand(Op + X86::AddrIndexReg);
188 const MCOperand &Disp = MI.getOperand(Op + X86::AddrDisp);
201 /// \param Op operand # of the memory operand.
204 static bool is32BitMemOperand(const MCInst &MI, unsigned Op) {
205 const MCOperand &BaseReg = MI.getOperand(Op + X86::AddrBaseReg);
206 const MCOperand &IndexReg = MI.getOperand(Op
283 const MCOperand &Op = MI.getOperand(CurOp); local
368 emitMemModRMByte(const MCInst &MI, unsigned Op, unsigned RegOpcodeField, uint64_t TSFlags, bool Rex, unsigned &CurByte, raw_ostream &OS, SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI) const argument
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/freebsd-11-stable/sys/contrib/dev/acpica/include/
H A Damlresrc.h816 ACPI_PARSE_OBJECT *Op,
824 ACPI_PARSE_OBJECT *Op,
838 ACPI_PARSE_OBJECT *Op,
845 ACPI_PARSE_OBJECT *Op,
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DSafeStackColoring.cpp58 auto *Op = dyn_cast<Instruction>(I->getOperand(1)); local
61 if (Op && Op->use_empty())
62 Op->eraseFromParent();
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiISelDAGToDAG.cpp62 bool SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintCode,
252 const SDValue &Op, unsigned ConstraintCode, std::vector<SDValue> &OutOps) {
258 if (!selectAddrRr(Op, Op0, Op1, AluOp) &&
259 !selectAddrRi(Op, Op0, Op1, AluOp))
251 SelectInlineAsmMemoryOperand( const SDValue &Op, unsigned ConstraintCode, std::vector<SDValue> &OutOps) argument
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMAsmBackend.h57 unsigned getRelaxedOpcode(unsigned Op, const MCSubtargetInfo &STI) const;
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DGISelKnownBits.h61 /// \return true if the sign bit of Op is known to be zero. We use this
63 bool signBitIsZero(Register Op);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelDAGToDAG.cpp61 bool SelectInlineAsmMemoryOperand(const SDValue &Op,
307 const SDValue &Op, unsigned ConstraintID, std::vector<SDValue> &OutOps) {
317 SDLoc dl(Op);
321 dl, Op.getValueType(),
322 Op, RC), 0);
1672 SDValue Op = N->getOperand(0); local
1673 if (Op->getOpcode() == ISD::TRUNCATE) {
1674 Op = Op->getOperand(0);
1675 VT = Op
306 SelectInlineAsmMemoryOperand( const SDValue &Op, unsigned ConstraintID, std::vector<SDValue> &OutOps) argument
1817 SDValue Op = N->getOperand(0); local
1964 getUsefulBitsFromAndWithImmediate(SDValue Op, APInt &UsefulBits, unsigned Depth) argument
1973 getUsefulBitsFromBitfieldMoveOpd(SDValue Op, APInt &UsefulBits, uint64_t Imm, uint64_t MSB, unsigned Depth) argument
2000 getUsefulBitsFromUBFM(SDValue Op, APInt &UsefulBits, unsigned Depth) argument
2010 getUsefulBitsFromOrWithShiftedReg(SDValue Op, APInt &UsefulBits, unsigned Depth) argument
2038 getUsefulBitsFromBFM(SDValue Op, SDValue Orig, APInt &UsefulBits, unsigned Depth) argument
2141 getUsefulBits(SDValue Op, APInt &UsefulBits, unsigned Depth) argument
2168 getLeftShift(SelectionDAG *CurDAG, SDValue Op, int ShlAmount) argument
2198 isBitfieldPositioningOp(SelectionDAG *CurDAG, SDValue Op, bool BiggerPattern, SDValue &Src, int &ShiftAmount, int &MaskWidth) argument
3143 unsigned Op = local
3161 unsigned Op = local
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/Instrumentation/
H A DPoisonChecking.cpp282 if (Value *Op = const_cast<Value*>(getGuaranteedNonFullPoisonOp(&I)))
283 CreateAssertNot(B, getPoisonFor(ValToPoison, Op));
288 Value *Op = RI->getOperand(0); local
289 CreateAssertNot(B, getPoisonFor(ValToPoison, Op));
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreISelDAGToDAG.cpp67 bool SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID,
111 SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID, argument
117 switch (Op.getOpcode()) {
128 OutOps.push_back(Op.getOperand(0));
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86FixupBWInsts.cpp339 for (auto &Op : MI->implicit_operands())
340 if (Op.getReg() != (Op.isDef() ? NewDestReg : NewSrcReg))
341 MIB.add(Op);

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