/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/MC/ |
H A D | MCWinEH.h | 27 Instruction(unsigned Op, MCSymbol *L, unsigned Reg, unsigned Off) argument 28 : Label(L), Offset(Off), Register(Reg), Operation(Op) {}
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/freebsd-11-stable/contrib/llvm-project/clang/lib/AST/Interp/ |
H A D | Disasm.cpp | 50 auto Op = PC.read<Opcode>(); local 52 switch (Op) {
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIOptimizeExecMaskingPreRA.cpp | 112 auto Op = TII.getNamedOperand(MI, AMDGPU::OpName::src1); local 113 if (Op->isReg() && Op->getReg() != Exec) 114 return Op->getReg(); 115 Op = TII.getNamedOperand(MI, AMDGPU::OpName::src0); 116 if (Op->isReg() && Op->getReg() != Exec) 117 return Op->getReg(); 357 for (auto &Op : I->operands()) { 358 if (Op [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | MachineIRBuilder.cpp | 274 const SrcOp &Op) { 275 return buildInstr(TargetOpcode::COPY, Res, Op); 410 const SrcOp &Op) { 411 return buildInstr(TargetOpcode::G_ANYEXT, Res, Op); 415 const SrcOp &Op) { 416 return buildInstr(TargetOpcode::G_SEXT, Res, Op); 420 const SrcOp &Op) { 421 return buildInstr(TargetOpcode::G_ZEXT, Res, Op); 437 const SrcOp &Op, 439 unsigned ExtOp = getBoolExtOp(getMRI()->getType(Op 273 buildCopy(const DstOp &Res, const SrcOp &Op) argument 409 buildAnyExt(const DstOp &Res, const SrcOp &Op) argument 414 buildSExt(const DstOp &Res, const SrcOp &Op) argument 419 buildZExt(const DstOp &Res, const SrcOp &Op) argument 436 buildBoolExt(const DstOp &Res, const SrcOp &Op, bool IsFP) argument 443 buildExtOrTrunc(unsigned ExtOpc, const DstOp &Res, const SrcOp &Op) argument 467 buildSExtOrTrunc(const DstOp &Res, const SrcOp &Op) argument 472 buildZExtOrTrunc(const DstOp &Res, const SrcOp &Op) argument 477 buildAnyExtOrTrunc(const DstOp &Res, const SrcOp &Op) argument 582 buildUnmerge(ArrayRef<LLT> Res, const SrcOp &Op) argument 592 buildUnmerge(LLT Res, const SrcOp &Op) argument 601 buildUnmerge(ArrayRef<Register> Res, const SrcOp &Op) argument 645 buildInsert(Register Res, Register Src, Register Op, unsigned Index) argument 687 buildTrunc(const DstOp &Res, const SrcOp &Op) argument 692 buildFPTrunc(const DstOp &Res, const SrcOp &Op, Optional<unsigned> Flags) argument [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/Utils/ |
H A D | ValueMapper.cpp | 212 Metadata &getFwdReference(MDNode &Op); 269 /// If \c Op is already mapped, return the mapping. If it's not an \a 273 /// \return None if \c Op is an unmapped uniqued \a MDNode. 274 /// \post getMappedOp(Op) only returns None if this returns None. 275 Optional<Metadata *> tryToMapOperand(const Metadata *Op); 287 Optional<Metadata *> getMappedOp(const Metadata *Op) const; 432 Value *Op = C->getOperand(OpNo); local 433 Mapped = mapValueOrNull(Op); 436 if (Mapped != Op) 517 Optional<Metadata *> MDNodeMapper::tryToMapOperand(const Metadata *Op) { argument 583 getFwdReference(MDNode &Op) argument 615 MDNode::op_iterator Op; ///< Current operand of \\c N. member in struct:__anon132::POTWorklistEntry 661 Metadata *Op = *I++; // Increment even on early return. local [all...] |
H A D | PredicateInfo.cpp | 290 // Convert the uses of Op into a vector of uses, associating global and local 293 Value *Op, SmallVectorImpl<ValueDFS> &DFSOrderedSet) { 294 for (auto &U : Op->uses()) { 340 // Add Op, PB to the list of value infos for Op, and mark Op to be renamed. 341 void PredicateInfo::addInfoFor(SmallVectorImpl<Value *> &OpsToRename, Value *Op, argument 343 auto &OperandInfo = getOrCreateValueInfo(Op); 345 OpsToRename.push_back(Op); 373 for (auto *Op 292 convertUsesToDFSOrdered( Value *Op, SmallVectorImpl<ValueDFS> &DFSOrderedSet) argument 464 Value *Op = SI->getCondition(); local 548 auto *Op = local [all...] |
/freebsd-11-stable/sys/contrib/dev/acpica/compiler/ |
H A D | asltypes.h | 163 /* Op flags for the ACPI_PARSE_OBJECT */ 193 ACPI_PARSE_OBJECT *Op; member in struct:asl_method_info 392 ACPI_PARSE_OBJECT *Op, 414 ACPI_PARSE_OBJECT *Op; member in struct:acpi_gpio_info 430 ACPI_PARSE_OBJECT *Op; member in struct:acpi_serial_info 441 ACPI_PARSE_OBJECT *Op; member in struct:asl_method_local
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/freebsd-11-stable/contrib/llvm-project/llvm/utils/TableGen/ |
H A D | WebAssemblyDisassemblerEmitter.cpp | 114 for (auto &Op : CGI.Operands.OperandList) { 115 assert(Op.OperandType != "MCOI::OPERAND_UNKNOWN"); 116 CurOperandList.push_back(Op.OperandType); 155 for (auto &Op : OperandTable) { 156 OS << " " << Op << ",\n"; local
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H A D | InstrInfoEmitter.cpp | 113 for (auto &Op : Inst.Operands) { 122 DagInit *MIOI = Op.MIOperandInfo; 126 OperandList.push_back(Op); 128 for (unsigned j = 0, e = Op.MINumOperands; j != e; ++j) { 129 OperandList.push_back(Op); 159 if (Op.Rec->isSubClassOf("PredicateOp")) 164 if (Op.Rec->isSubClassOf("OptionalDefOperand")) 169 if (Op.Rec->isSubClassOf("BranchTargetOperand")) 174 assert(!Op.OperandType.empty() && "Invalid operand type."); 175 Res += Op [all...] |
/freebsd-11-stable/contrib/llvm-project/clang/lib/StaticAnalyzer/Checkers/ |
H A D | TestAfterDivZeroChecker.cpp | 105 BinaryOperator::Opcode Op = BO->getOpcode(); local 106 if (Op == BO_Div || Op == BO_Rem || Op == BO_DivAssign || 107 Op == BO_RemAssign) { 202 BinaryOperator::Opcode Op = B->getOpcode(); local 203 if (Op == BO_Div || Op == BO_Rem || Op == BO_DivAssign || 204 Op [all...] |
H A D | IdenticalExprChecker.cpp | 182 BinaryOperator::Opcode Op = B->getOpcode(); local 184 if (BinaryOperator::isBitwiseOp(Op)) 187 if (BinaryOperator::isLogicalOp(Op)) 190 if (BinaryOperator::isComparisonOp(Op)) 200 BinaryOperator::Opcode Op = B->getOpcode(); local 233 if ((Op == BO_EQ) || (Op == BO_NE)) { 240 if ((Op == BO_EQ) || (Op == BO_NE)) { 257 if (Op [all...] |
H A D | Iterator.cpp | 181 OverloadedOperatorKind Op, 190 assert ((Op == OO_Plus || Op == OO_PlusEqual || 191 Op == OO_Minus || Op == OO_MinusEqual) && 193 auto BinOp = (Op == OO_Plus || Op == OO_PlusEqual) ? BO_Add : BO_Sub; 180 advancePosition(ProgramStateRef State, const SVal &Iter, OverloadedOperatorKind Op, const SVal &Distance) argument
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/IR/ |
H A D | Instructions.cpp | 129 Op<-1>().set(nullptr); 869 Op<0>() = RI.Op<0>(); 878 Op<0>() = retVal; 886 Op<0>() = retVal; 900 Op<0>() = RI.Op<0>(); 906 Op<0>() = Exn; 912 Op<0>() = Exn; 925 Op< 1094 : Instruction(ParentPad->getType(), Op, local 1100 FuncletPadInst(Instruction::FuncletPadOps Op, Value *ParentPad, ArrayRef<Value *> Args, unsigned Values, const Twine &NameStr, BasicBlock *InsertAtEnd) argument 1530 getOperationName(BinOp Op) argument 2201 Create(UnaryOps Op, Value *S, const Twine &Name, Instruction *InsertBefore) argument 2207 Create(UnaryOps Op, Value *S, const Twine &Name, BasicBlock *InsertAtEnd) argument 2330 Create(BinaryOps Op, Value *S1, Value *S2, const Twine &Name, Instruction *InsertBefore) argument 2338 Create(BinaryOps Op, Value *S1, Value *S2, const Twine &Name, BasicBlock *InsertAtEnd) argument 2346 CreateNeg(Value *Op, const Twine &Name, Instruction *InsertBefore) argument 2354 CreateNeg(Value *Op, const Twine &Name, BasicBlock *InsertAtEnd) argument 2362 CreateNSWNeg(Value *Op, const Twine &Name, Instruction *InsertBefore) argument 2368 CreateNSWNeg(Value *Op, const Twine &Name, BasicBlock *InsertAtEnd) argument 2374 CreateNUWNeg(Value *Op, const Twine &Name, Instruction *InsertBefore) argument 2380 CreateNUWNeg(Value *Op, const Twine &Name, BasicBlock *InsertAtEnd) argument 2386 CreateFNeg(Value *Op, const Twine &Name, Instruction *InsertBefore) argument 2393 CreateFNeg(Value *Op, const Twine &Name, BasicBlock *InsertAtEnd) argument 2400 CreateNot(Value *Op, const Twine &Name, Instruction *InsertBefore) argument 2407 CreateNot(Value *Op, const Twine &Name, BasicBlock *InsertAtEnd) argument 3481 Create(OtherOps Op, Predicate predicate, Value *S1, Value *S2, const Twine &Name, Instruction *InsertBefore) argument 3501 Create(OtherOps Op, Predicate predicate, Value *S1, Value *S2, const Twine &Name, BasicBlock *InsertAtEnd) argument [all...] |
H A D | ConstantsContext.h | 48 : ConstantExpr(Ty, Opcode, &Op<0>(), 1) { 49 Op<0>() = C; 66 : ConstantExpr(C1->getType(), Opcode, &Op<0>(), 2) { 67 Op<0>() = C1; 68 Op<1>() = C2; 86 : ConstantExpr(C2->getType(), Instruction::Select, &Op<0>(), 3) { 87 Op<0>() = C1; 88 Op<1>() = C2; 89 Op<2>() = C3; 108 Instruction::ExtractElement, &Op< [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 1970 for (ISD::NodeType Op : 1980 if (isOperationExpand(Op, MVT::f32)) 1981 setOperationAction(Op, MVT::f32, Promote); 4379 unsigned Op = Arg.getOpcode(); 4380 if (Op == ISD::ZERO_EXTEND || Op == ISD::ANY_EXTEND || Op == ISD::BITCAST) { 4384 if (Op == ISD::TRUNCATE) { 4668 static bool MayFoldLoad(SDValue Op) { 4669 return Op [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AVR/ |
H A D | AVRISelLowering.cpp | 278 SDValue AVRTargetLowering::LowerShifts(SDValue Op, SelectionDAG &DAG) const { argument 282 const SDNode *N = Op.getNode(); 283 EVT VT = Op.getValueType(); 288 switch (Op.getOpcode()) { 312 switch (Op.getOpcode()) { 339 SDValue AVRTargetLowering::LowerDivRem(SDValue Op, SelectionDAG &DAG) const { argument 340 unsigned Opcode = Op->getOpcode(); 344 EVT VT = Op->getValueType(0); 372 for (SDValue const &Value : Op->op_values()) { 385 SDLoc dl(Op); 398 LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const argument 411 LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const argument 619 LowerBR_CC(SDValue Op, SelectionDAG &DAG) const argument 634 LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const argument 651 LowerSETCC(SDValue Op, SelectionDAG &DAG) const argument 668 LowerVASTART(SDValue Op, SelectionDAG &DAG) const argument 683 LowerOperation(SDValue Op, SelectionDAG &DAG) const argument 777 const SDNode *Op; local 828 getPostIndexedAddressParts(SDNode *N, SDNode *Op, SDValue &Base, SDValue &Offset, ISD::MemIndexedMode &AM, SelectionDAG &DAG) const argument 1901 LowerAsmOperandForConstraint(SDValue Op, std::string &Constraint, std::vector<SDValue> &Ops, SelectionDAG &DAG) const argument [all...] |
H A D | AVRRelaxMemOperations.cpp | 128 #define RELAX(Op) \ 129 case Op: \ 130 return relax<Op>(MBB, MI)
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/AsmParser/ |
H A D | AArch64AsmParser.cpp | 264 unsigned validateTargetOperandClass(MCParsedAsmOperand &Op, 1804 auto Op = std::make_unique<AArch64Operand>(k_Token, Ctx); local 1805 Op->Tok.Data = Str.data(); 1806 Op->Tok.Length = Str.size(); 1807 Op->Tok.IsSuffix = IsSuffix; 1808 Op->StartLoc = S; 1809 Op->EndLoc = S; 1810 return Op; 1819 auto Op = std::make_unique<AArch64Operand>(k_Register, Ctx); local 1820 Op 1841 auto Op = CreateReg(RegNum, Kind, S, E, Ctx, EqualsReg, ExtTy, ShiftAmount, local 1851 auto Op = std::make_unique<AArch64Operand>(k_VectorList, Ctx); local 1864 auto Op = std::make_unique<AArch64Operand>(k_VectorIndex, Ctx); local 1873 auto Op = std::make_unique<AArch64Operand>(k_Immediate, Ctx); local 1884 auto Op = std::make_unique<AArch64Operand>(k_ShiftedImm, Ctx); local 1894 auto Op = std::make_unique<AArch64Operand>(k_CondCode, Ctx); local 1903 auto Op = std::make_unique<AArch64Operand>(k_FPImm, Ctx); local 1915 auto Op = std::make_unique<AArch64Operand>(k_Barrier, Ctx); local 1929 auto Op = std::make_unique<AArch64Operand>(k_SysReg, Ctx); local 1942 auto Op = std::make_unique<AArch64Operand>(k_SysCR, Ctx); local 1953 auto Op = std::make_unique<AArch64Operand>(k_Prefetch, Ctx); local 1966 auto Op = std::make_unique<AArch64Operand>(k_PSBHint, Ctx); local 1979 auto Op = std::make_unique<AArch64Operand>(k_BTIHint, Ctx); local 1991 auto Op = std::make_unique<AArch64Operand>(k_ShiftExtend, Ctx); local 2899 StringRef Op = Tok.getString(); local 4501 AArch64Operand &Op = static_cast<AArch64Operand &>(*Operands[0]); local 4740 AArch64Operand &Op = static_cast<AArch64Operand &>(*Operands[2]); local 4750 AArch64Operand &Op = static_cast<AArch64Operand &>(*Operands[1]); local 4756 AArch64Operand &Op = static_cast<AArch64Operand &>(*Operands[2]); local 4767 AArch64Operand &Op = static_cast<AArch64Operand &>(*Operands[1]); local 4773 AArch64Operand &Op = static_cast<AArch64Operand &>(*Operands[1]); local 5536 AArch64Operand &Op = static_cast<AArch64Operand &>(AsmOp); local [all...] |
/freebsd-11-stable/sys/contrib/dev/acpica/components/dispatcher/ |
H A D | dspkginit.c | 176 * Op - Parser object to be translated 183 * DESCRIPTION: Translate a parser Op package object to the equivalent 203 ACPI_PARSE_OBJECT *Op, 221 Parent = Op->Common.Parent; 266 Arg = Op->Common.Value.Arg; 395 Op->Common.Node = ACPI_CAST_PTR (ACPI_NAMESPACE_NODE, ObjDesc); 594 * and the Op->Common.Node to point to the Alias target. Note, 597 Type = Op->Common.Node->Type; 601 Op->Common.Node = ACPI_CAST_PTR (ACPI_NAMESPACE_NODE, 602 Op 201 AcpiDsBuildInternalPackageObj( ACPI_WALK_STATE *WalkState, ACPI_PARSE_OBJECT *Op, UINT32 ElementCount, ACPI_OPERAND_OBJECT **ObjDescPtr) argument [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
H A D | MipsInstPrinter.cpp | 127 const MCOperand &Op = MI->getOperand(OpNo); local 128 if (Op.isReg()) { 129 printRegName(O, Op.getReg()); 133 if (Op.isImm()) { 134 O << formatImm(Op.getImm()); 138 assert(Op.isExpr() && "unknown operand kind in printOperand"); 139 Op.getExpr()->print(O, &MAI, true);
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H A D | MipsELFStreamer.cpp | 44 const MCOperand &Op = Inst.getOperand(OpIndex); local 46 if (!Op.isReg()) 49 unsigned Reg = Op.getReg();
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Analysis/ |
H A D | AssumptionCache.cpp | 69 Value *Op; 70 if (match(I, m_BitCast(m_Value(Op))) || 71 match(I, m_PtrToInt(m_Value(Op))) || 72 match(I, m_Not(m_Value(Op)))) { 73 if (isa<Instruction>(Op) || isa<Argument>(Op)) 74 Affected.push_back(Op);
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/freebsd-11-stable/contrib/llvm-project/clang/lib/Sema/ |
H A D | SemaCast.cpp | 268 CastOperation Op(*this, DestType, E); 269 Op.OpRange = SourceRange(OpLoc, Parens.getEnd()); 270 Op.DestRange = AngleBrackets; 277 Op.CheckConstCast(); 278 if (Op.SrcExpr.isInvalid()) 282 return Op.complete(CXXConstCastExpr::Create(Context, Op.ResultType, 283 Op.ValueKind, Op.SrcExpr.get(), DestTInfo, 295 Op [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | InstrEmitter.h | 53 unsigned getVR(SDValue Op, 60 SDValue Op, 71 SDValue Op,
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
H A D | X86InstPrinterCommon.cpp | 27 void X86InstPrinterCommon::printCondCode(const MCInst *MI, unsigned Op, argument 29 int64_t Imm = MI->getOperand(Op).getImm(); 51 void X86InstPrinterCommon::printSSEAVXCC(const MCInst *MI, unsigned Op, argument 53 int64_t Imm = MI->getOperand(Op).getImm(); 269 void X86InstPrinterCommon::printRoundingControl(const MCInst *MI, unsigned Op, argument 271 int64_t Imm = MI->getOperand(Op).getImm(); 296 const MCOperand &Op = MI->getOperand(OpNo); local 297 if (Op.isImm()) 298 O << formatImm(Op.getImm()); 300 assert(Op [all...] |