Searched refs:MF (Results 176 - 200 of 870) sorted by relevance

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/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DTailDuplication.cpp39 bool runOnMachineFunction(MachineFunction &MF) override;
82 bool TailDuplicateBase::runOnMachineFunction(MachineFunction &MF) { argument
83 if (skipFunction(MF.getFunction()))
91 Duplicator.initMF(MF, PreRegAlloc, MBPI, MBFI, PSI, /*LayoutMode=*/false);
H A DMachineOptimizationRemarkEmitter.cpp54 LLVMContext &Ctx = MF.getFunction().getContext();
72 MachineFunction &MF) {
75 if (MF.getFunction().getContext().getDiagnosticsHotnessRequested())
80 ORE = std::make_unique<MachineOptimizationRemarkEmitter>(MF, MBFI);
71 runOnMachineFunction( MachineFunction &MF) argument
H A DRegisterClassInfo.cpp45 MF = &mf;
48 if (MF->getSubtarget().getRegisterInfo() != TRI) {
49 TRI = MF->getSubtarget().getRegisterInfo();
54 // Does this MF have different CSRs?
58 const MCPhysReg *CSR = MF->getRegInfo().getCalleeSavedRegs();
72 const BitVector &RR = MF->getRegInfo().getReservedRegs();
93 auto &STI = MF->getSubtarget();
109 ArrayRef<MCPhysReg> RawOrder = RC->getRawAllocationOrder(*MF);
119 !STI.ignoreCSRForAllocationOrder(*MF, PhysReg))
148 TRI->getLargestLegalSuperClass(RC, *MF))
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H A DMachineFrameInfo.cpp114 BitVector MachineFrameInfo::getPristineRegs(const MachineFunction &MF) const {
115 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
123 const MachineRegisterInfo &MRI = MF.getRegInfo();
136 uint64_t MachineFrameInfo::estimateStackSize(const MachineFunction &MF) const {
137 const TargetFrameLowering *TFI = MF.getSubtarget().getFrameLowering();
138 const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo();
165 if (adjustsStack() && TFI->hasReservedCallFrame(MF))
175 (RegInfo->needsStackRealignment(MF) && getObjectIndexEnd() != 0))
189 void MachineFrameInfo::computeMaxCallFrameSize(const MachineFunction &MF) { argument
190 const TargetInstrInfo &TII = *MF
214 print(const MachineFunction &MF, raw_ostream &OS) const argument
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H A DLivePhysRegs.cpp173 const MachineFunction &MF) {
174 const MachineRegisterInfo &MRI = MF.getRegInfo();
179 void LivePhysRegs::addPristines(const MachineFunction &MF) { argument
180 const MachineFrameInfo &MFI = MF.getFrameInfo();
188 addCalleeSavedRegs(*this, MF);
199 addCalleeSavedRegs(Pristine, MF);
220 const MachineFunction &MF = *MBB.getParent(); local
221 const MachineFrameInfo &MFI = MF.getFrameInfo();
231 const MachineFunction &MF = *MBB.getParent(); local
232 addPristines(MF);
172 addCalleeSavedRegs(LivePhysRegs &LiveRegs, const MachineFunction &MF) argument
237 const MachineFunction &MF = *MBB.getParent(); local
244 const MachineFunction &MF = *MBB.getParent(); local
255 const MachineFunction &MF = *MBB.getParent(); local
276 const MachineFunction &MF = *MBB.getParent(); local
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H A DRegUsageInfoPropagate.cpp53 bool runOnMachineFunction(MachineFunction &MF) override;
101 bool RegUsageInfoPropagation::runOnMachineFunction(MachineFunction &MF) { argument
102 const Module &M = *MF.getFunction().getParent();
107 LLVM_DEBUG(dbgs() << "MachineFunction : " << MF.getName() << "\n");
109 const MachineFrameInfo &MFI = MF.getFrameInfo();
115 for (MachineBasicBlock &MBB : MF) {
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/AsmPrinter/
H A DWinCFGuard.cpp34 void WinCFGuard::endFunction(const MachineFunction *MF) { argument
37 if (MF->getLongjmpTargets().empty())
41 LongjmpTargets.insert(LongjmpTargets.end(), MF->getLongjmpTargets().begin(),
42 MF->getLongjmpTargets().end());
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCRegisterInfo.h76 getPointerRegClass(const MachineFunction &MF, unsigned Kind=0) const override;
79 MachineFunction &MF) const override;
83 const MachineFunction &MF) const override;
86 const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
87 const MCPhysReg *getCalleeSavedRegsViaCopy(const MachineFunction *MF) const;
88 const uint32_t *getCallPreservedMask(const MachineFunction &MF,
94 BitVector getReservedRegs(const MachineFunction &MF) const override;
95 bool isCallerPreservedPhysReg(unsigned PhysReg, const MachineFunction &MF) const override;
98 bool requiresRegisterScavenging(const MachineFunction &MF) const override {
102 bool requiresFrameIndexScavenging(const MachineFunction &MF) cons
[all...]
H A DPPCFrameLowering.cpp295 MachineFunction *MF = Entry->getParent(); local
306 for (MachineFunction::iterator I = MF->begin(), E = MF->end(); I != E; ++I) {
340 MachineFunction *MF = MI.getParent()->getParent(); local
341 const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo();
344 const MachineRegisterInfo &MRI = MF->getRegInfo();
352 for (std::pair<unsigned, unsigned> LI : MF->getRegInfo().liveins()) {
359 for (MachineFunction::const_iterator BI = MF->begin(), BE = MF->end();
421 static bool spillsCR(const MachineFunction &MF) { argument
426 spillsVRSAVE(const MachineFunction &MF) argument
431 hasSpills(const MachineFunction &MF) argument
436 hasNonRISpills(const MachineFunction &MF) argument
444 MustSaveLR(const MachineFunction &MF, unsigned LR) argument
458 determineFrameLayoutAndUpdate(MachineFunction &MF, bool UseEstimate) const argument
471 determineFrameLayout(const MachineFunction &MF, bool UseEstimate, unsigned *NewMaxCallFrameSize) const argument
706 MachineFunction &MF = *(MBB->getParent()); local
775 emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const argument
1370 emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const argument
1763 determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS) const argument
1837 processFunctionBeforeFrameFinalized(MachineFunction &MF, RegScavenger *RS) const argument
2087 addScavengingSpillSlot(MachineFunction &MF, RegScavenger *RS) const argument
2130 assignCalleeSavedSpillSlots( MachineFunction &MF, const TargetRegisterInfo *TRI, std::vector<CalleeSavedInfo> &CSI) const argument
2277 MachineFunction *MF = MBB.getParent(); local
2308 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const argument
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H A DPPCRegisterInfo.cpp126 PPCRegisterInfo::getPointerRegClass(const MachineFunction &MF, unsigned Kind) argument
142 PPCRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
143 const PPCSubtarget &Subtarget = MF->getSubtarget<PPCSubtarget>();
144 if (MF->getFunction().getCallingConv() == CallingConv::AnyReg) {
159 if (TM.isPPC64() && MF->getInfo<PPCFunctionInfo>()->isSplitCSR())
163 bool SaveR2 = MF->getRegInfo().isAllocatable(PPC::X2);
166 if (MF->getFunction().getCallingConv() == CallingConv::Cold) {
198 PPCRegisterInfo::getCalleeSavedRegsViaCopy(const MachineFunction *MF) const {
199 assert(MF && "Invalid MachineFunction pointer.");
200 const PPCSubtarget &Subtarget = MF
223 getCallPreservedMask(const MachineFunction &MF, CallingConv::ID CC) const argument
499 MachineFunction &MF = *MBB.getParent(); local
618 MachineFunction &MF = *MBB.getParent(); local
648 MachineFunction &MF = *MBB.getParent(); local
693 MachineFunction &MF = *MBB.getParent(); local
736 MachineFunction &MF = *MBB.getParent(); local
845 MachineFunction &MF = *MBB.getParent(); local
895 MachineFunction &MF = *MBB.getParent(); local
921 MachineFunction &MF = *MBB.getParent(); local
942 hasReservedSpillSlot(const MachineFunction &MF, unsigned Reg, int &FrameIdx) const argument
1022 MachineFunction &MF = *MBB.getParent(); local
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64PreLegalizerCombiner.cpp110 bool runOnMachineFunction(MachineFunction &MF) override;
136 bool AArch64PreLegalizerCombiner::runOnMachineFunction(MachineFunction &MF) { argument
137 if (MF.getProperties().hasProperty(
141 const Function &F = MF.getFunction();
143 MF.getTarget().getOptLevel() != CodeGenOpt::None && !skipFunction(F);
144 GISelKnownBits *KB = &getAnalysis<GISelKnownBitsAnalysis>().get(MF);
150 return C.combineMachineInstrs(MF, /*CSEInfo*/ nullptr);
H A DAArch64CompressJumpTables.cpp37 MachineFunction *MF; member in class:__anon2021::AArch64CompressJumpTables
51 bool runOnMachineFunction(MachineFunction &MF) override;
76 BlockInfo.resize(MF->getNumBlockIDs());
79 for (MachineBasicBlock &MBB : *MF) {
97 auto &JTInfo = *MF->getJumpTableInfo();
127 auto AFI = MF->getInfo<AArch64FunctionInfo>();
146 MF = &MFIn;
148 const auto &ST = MF->getSubtarget<AArch64Subtarget>();
151 if (ST.force32BitJumpTables() && !MF->getFunction().hasMinSize())
156 for (MachineBasicBlock &MBB : *MF) {
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H A DAArch64StackTaggingPreRA.cpp56 MachineFunction *MF; member in class:__anon2049::AArch64StackTaggingPreRA
201 MF = &Func;
202 MRI = &MF->getRegInfo();
203 AFI = MF->getInfo<AArch64FunctionInfo>();
204 TII = static_cast<const AArch64InstrInfo *>(MF->getSubtarget().getInstrInfo());
206 MF->getSubtarget().getRegisterInfo());
207 MFI = &MF->getFrameInfo();
213 << "********** Function: " << MF->getName() << '\n');
216 for (auto &BB : *MF) {
H A DAArch64StorePairSuppress.cpp121 bool AArch64StorePairSuppress::runOnMachineFunction(MachineFunction &MF) { argument
122 if (skipFunction(MF.getFunction()))
125 const TargetSubtargetInfo &ST = MF.getSubtarget();
128 MRI = &MF.getRegInfo();
133 LLVM_DEBUG(dbgs() << "*** " << getPassName() << ": " << MF.getName() << '\n');
144 for (auto &MBB : MF) {
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86LoadValueInjectionRetHardening.cpp50 bool runOnMachineFunction(MachineFunction &MF) override;
60 MachineFunction &MF) {
61 LLVM_DEBUG(dbgs() << "***** " << getPassName() << " : " << MF.getName()
63 const X86Subtarget *Subtarget = &MF.getSubtarget<X86Subtarget>();
68 const Function &F = MF.getFunction();
83 for (const MCPhysReg *PR = TRI->getCalleeSavedRegs(&MF); auto Reg = *PR; ++PR)
101 for (auto &MBB : MF) {
59 runOnMachineFunction( MachineFunction &MF) argument
H A DX86FrameLowering.cpp51 bool X86FrameLowering::hasReservedCallFrame(const MachineFunction &MF) const {
52 return !MF.getFrameInfo().hasVarSizedObjects() &&
53 !MF.getInfo<X86MachineFunctionInfo>()->getHasPushSequences();
61 X86FrameLowering::canSimplifyCallFramePseudos(const MachineFunction &MF) const {
62 return hasReservedCallFrame(MF) ||
63 (hasFP(MF) && !TRI->needsStackRealignment(MF)) ||
64 TRI->hasBasePointer(MF);
75 X86FrameLowering::needsFrameIndexResolution(const MachineFunction &MF) const {
76 return MF
149 const MachineFunction *MF = MBB.getParent(); local
2286 adjustForSegmentedStacks( MachineFunction &MF, MachineBasicBlock &PrologueMBB) const argument
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H A DX86CallFrameOptimization.cpp64 bool runOnMachineFunction(MachineFunction &MF) override;
97 bool isLegal(MachineFunction &MF);
99 bool isProfitable(MachineFunction &MF, ContextVector &CallSeqMap);
101 void collectCallInfo(MachineFunction &MF, MachineBasicBlock &MBB,
104 void adjustCallSequence(MachineFunction &MF, const CallContext &Context);
134 bool X86CallFrameOptimization::isLegal(MachineFunction &MF) { argument
142 (!MF.getLandingPads().empty() ||
143 (MF.getFunction().needsUnwindTableEntry() && !TFL->hasFP(MF))))
166 !STI->getTargetLowering()->getStackProbeSymbolName(MF)
193 isProfitable(MachineFunction &MF, ContextVector &CallSeqVector) argument
236 runOnMachineFunction(MachineFunction &MF) argument
353 collectCallInfo(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I, CallContext &Context) argument
493 adjustCallSequence(MachineFunction &MF, const CallContext &Context) argument
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyAsmPrinter.h49 bool runOnMachineFunction(MachineFunction &MF) override {
50 Subtarget = &MF.getSubtarget<WebAssemblySubtarget>();
51 MRI = &MF.getRegInfo();
52 MFI = MF.getInfo<WebAssemblyFunctionInfo>();
53 return AsmPrinter::runOnMachineFunction(MF);
H A DWebAssemblyCallIndirectFixup.cpp47 bool runOnMachineFunction(MachineFunction &MF) override;
102 bool WebAssemblyCallIndirectFixup::runOnMachineFunction(MachineFunction &MF) { argument
104 << "********** Function: " << MF.getName() << '\n');
108 MF.getSubtarget<WebAssemblySubtarget>().getInstrInfo();
110 for (MachineBasicBlock &MBB : MF) {
H A DWebAssemblyCFGStackify.cpp51 bool runOnMachineFunction(MachineFunction &MF) override;
59 void placeMarkers(MachineFunction &MF);
63 void removeUnnecessaryInstrs(MachineFunction &MF);
64 bool fixUnwindMismatches(MachineFunction &MF);
65 void rewriteDepthImmediates(MachineFunction &MF);
66 void fixEndsAtEndOfFunction(MachineFunction &MF);
82 MachineBasicBlock *getAppendixBlock(MachineFunction &MF) { argument
84 AppendixBB = MF.CreateMachineBasicBlock();
87 MF.push_back(AppendixBB);
211 MachineFunction &MF local
374 MachineFunction &MF = *MBB.getParent(); local
441 MachineFunction &MF = *MBB.getParent(); local
640 removeUnnecessaryInstrs(MachineFunction &MF) argument
725 fixUnwindMismatches(MachineFunction &MF) argument
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiRegisterInfo.cpp38 LanaiRegisterInfo::getCalleeSavedRegs(const MachineFunction * /*MF*/) const {
42 BitVector LanaiRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
59 if (hasBasePointer(MF))
65 const MachineFunction & /*MF*/) const {
70 const MachineFunction & /*MF*/) const {
142 MachineFunction &MF = *MI.getParent()->getParent(); local
143 const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo();
144 const TargetFrameLowering *TFI = MF.getSubtarget().getFrameLowering();
145 bool HasFP = TFI->hasFP(MF);
150 int Offset = MF
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZRegisterInfo.cpp80 const MachineFunction &MF,
83 const MachineRegisterInfo *MRI = &MF.getRegInfo();
84 const SystemZSubtarget &Subtarget = MF.getSubtarget<SystemZSubtarget>();
88 VirtReg, Order, Hints, MF, VRM, Matrix);
196 SystemZRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
197 const SystemZSubtarget &Subtarget = MF->getSubtarget<SystemZSubtarget>();
198 if (MF->getFunction().getCallingConv() == CallingConv::GHC)
200 if (MF->getFunction().getCallingConv() == CallingConv::AnyReg)
203 if (MF->getSubtarget().getTargetLowering()->supportSwiftError() &&
204 MF
77 getRegAllocationHints(unsigned VirtReg, ArrayRef<MCPhysReg> Order, SmallVectorImpl<MCPhysReg> &Hints, const MachineFunction &MF, const VirtRegMap *VRM, const LiveRegMatrix *Matrix) const argument
211 getCallPreservedMask(const MachineFunction &MF, CallingConv::ID CC) const argument
262 MachineFunction &MF = *MBB.getParent(); local
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUAsmPrinter.cpp192 const SIMachineFunctionInfo &MFI = *MF->getInfo<SIMachineFunctionInfo>();
196 const GCNSubtarget &STM = MF->getSubtarget<GCNSubtarget>();
197 const Function &F = MF->getFunction();
202 getAmdKernelCode(KernelCode, CurrentProgramInfo, *MF);
207 HSAMetadataStream->emitKernel(*MF, CurrentProgramInfo);
211 const SIMachineFunctionInfo &MFI = *MF->getInfo<SIMachineFunctionInfo>();
233 const MCSubtargetInfo &STI = MF->getSubtarget();
236 getNameWithPrefix(KernelName, &MF->getFunction());
238 STI, KernelName, getAmdhsaKernelDescriptor(*MF, CurrentProgramInfo),
257 const SIMachineFunctionInfo *MFI = MF
400 getAmdhsaKernelDescriptor( const MachineFunction &MF, const SIProgramInfo &PI) const argument
419 runOnMachineFunction(MachineFunction &MF) argument
923 getSIProgramInfo(SIProgramInfo &ProgInfo, const MachineFunction &MF) argument
1129 EmitProgramInfoSI(const MachineFunction &MF, const SIProgramInfo &CurrentProgramInfo) argument
1176 EmitPALMetadata(const MachineFunction &MF, const SIProgramInfo &CurrentProgramInfo) argument
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/MIRParser/
H A DMIRParser.cpp114 MachineFunction &MF);
162 void computeFunctionProperties(MachineFunction &MF);
308 MachineFunction &MF = MMI.getOrCreateMachineFunction(*F);
309 if (initializeMachineFunction(YamlMF, MF))
315 static bool isSSA(const MachineFunction &MF) { argument
316 const MachineRegisterInfo &MRI = MF.getRegInfo();
325 void MIRParserImpl::computeFunctionProperties(MachineFunction &MF) { argument
326 MachineFunctionProperties &Properties = MF.getProperties();
330 for (const MachineBasicBlock &MBB : MF) {
340 MF
354 MachineFunction &MF = PFS.MF; local
394 initializeMachineFunction(const yaml::MachineFunction &YamlMF, MachineFunction &MF) argument
504 MachineFunction &MF = PFS.MF; local
585 MachineFunction &MF = PFS.MF; local
637 MachineFunction &MF = PFS.MF; local
821 const MachineFunction &MF = PFS.MF; local
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/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DMachineOptimizationRemarkEmitter.h146 MachineOptimizationRemarkEmitter(MachineFunction &MF, argument
148 : MF(MF), MBFI(MBFI) {}
162 MF.getFunction().getContext().getRemarkStreamer() ||
163 MF.getFunction().getContext().getDiagHandlerPtr()->isAnyRemarkEnabled(
175 if (MF.getFunction().getContext().getRemarkStreamer() ||
176 MF.getFunction()
190 MachineFunction &MF; member in class:llvm::MachineOptimizationRemarkEmitter
218 bool runOnMachineFunction(MachineFunction &MF) override;

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