/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | MIRNamerPass.cpp | 62 for (auto &MBB : RPOT) 63 Changed |= Renamer.renameVRegs(MBB, BBIndex++);
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H A D | ShrinkWrap.cpp | 180 /// Update the Save and Restore points such that \p MBB is in 185 void updateSaveRestorePoints(MachineBasicBlock &MBB, RegScavenger *RS); 327 void ShrinkWrap::updateSaveRestorePoints(MachineBasicBlock &MBB, argument 331 Save = &MBB; 333 Save = MDT->findNearestCommonDominator(Save, &MBB); 341 Restore = &MBB; 342 else if (MPDT->getNode(&MBB)) // If the block is not in the post dom tree, it 347 Restore = MPDT->findNearestCommonDominator(Restore, &MBB); 353 if (Restore == &MBB) { 354 for (const MachineInstr &Terminator : MBB 450 giveUpWithRemarks(MachineOptimizationRemarkEmitter *ORE, StringRef RemarkName, StringRef RemarkMessage, const DiagnosticLocation &Loc, const MachineBasicBlock *MBB) argument [all...] |
H A D | MIRVRegNamerUtils.h | 77 bool renameInstsInMBB(MachineBasicBlock *MBB); 85 bool renameVRegs(MachineBasicBlock *MBB, unsigned BBNum) { argument 87 return renameInstsInMBB(MBB);
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H A D | MachineCombiner.cpp | 100 improvesCriticalPathLen(MachineBasicBlock *MBB, MachineInstr *Root, 106 bool preservesResourceLen(MachineBasicBlock *MBB, 118 void verifyPatternOrder(MachineBasicBlock *MBB, MachineInstr &Root, 307 MachineBasicBlock *MBB, MachineInstr *Root, 378 MachineBasicBlock *MBB, MachineTraceMetrics::Trace BlockTrace, 386 //ArrayRef<const MachineBasicBlock *> MBBarr(MBB); 388 MBBarr.push_back(MBB); 431 /// \param MBB basic block to insert instructions in 433 /// \param InsInstrs new instructions to insert in \p MBB 434 /// \param DelInstrs instruction to delete from \p MBB 306 improvesCriticalPathLen( MachineBasicBlock *MBB, MachineInstr *Root, MachineTraceMetrics::Trace BlockTrace, SmallVectorImpl<MachineInstr *> &InsInstrs, SmallVectorImpl<MachineInstr *> &DelInstrs, DenseMap<unsigned, unsigned> &InstrIdxForVirtReg, MachineCombinerPattern Pattern, bool SlackIsAccurate) argument [all...] |
H A D | StackMapLivenessAnalysis.cpp | 126 for (auto &MBB : MF) { 127 LLVM_DEBUG(dbgs() << "****** BB " << MBB.getName() << " ******\n"); 130 LiveRegs.addLiveOutsNoPristines(MBB); 134 for (auto I = MBB.rbegin(), E = MBB.rend(); I != E; ++I) {
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H A D | RegisterScavenging.cpp | 57 void RegScavenger::init(MachineBasicBlock &MBB) { argument 58 MachineFunction &MF = *MBB.getParent(); 68 if (!this->MBB) { 74 this->MBB = &MBB; 84 void RegScavenger::enterBasicBlock(MachineBasicBlock &MBB) { argument 85 init(MBB); 86 LiveUnits.addLiveIns(MBB); 89 void RegScavenger::enterBasicBlockEnd(MachineBasicBlock &MBB) { argument 90 init(MBB); 386 MachineBasicBlock &MBB = *From->getParent(); local 584 const MachineBasicBlock &MBB = *To->getParent(); local 633 MachineBasicBlock *MBB = MO.getParent()->getParent(); local 678 scavengeFrameVirtualRegsInBlock(MachineRegisterInfo &MRI, RegScavenger &RS, MachineBasicBlock &MBB) argument [all...] |
H A D | MachineCSE.cpp | 60 "Number of cross-MBB physreg referencing CS eliminated"); 117 MachineBasicBlock *MBB); 122 const MachineBasicBlock *MBB, 131 void EnterScope(MachineBasicBlock *MBB); 132 void ExitScope(MachineBasicBlock *MBB); 133 bool ProcessBlockCSE(MachineBasicBlock *MBB); 139 bool ProcessBlockPRE(MachineDominatorTree *MDT, MachineBasicBlock *MBB); 141 /// Heuristics to see if it's profitable to move common computations of MBB 144 MachineBasicBlock *MBB, 166 MachineBasicBlock *MBB) { 165 PerformTrivialCopyPropagation(MachineInstr *MI, MachineBasicBlock *MBB) argument 277 hasLivePhysRegDefUses(const MachineInstr *MI, const MachineBasicBlock *MBB, SmallSet<unsigned, 8> &PhysRefs, PhysDefVector &PhysDefs, bool &PhysUseDef) const argument 336 const MachineBasicBlock *MBB = MI->getParent(); local 497 EnterScope(MachineBasicBlock *MBB) argument 503 ExitScope(MachineBasicBlock *MBB) argument 511 ProcessBlockCSE(MachineBasicBlock *MBB) argument 759 MachineBasicBlock *MBB = Node->getBlock(); local 792 ProcessBlockPRE(MachineDominatorTree *DT, MachineBasicBlock *MBB) argument 862 MachineBasicBlock *MBB = Node->getBlock(); local 870 isProfitableToHoistInto(MachineBasicBlock *CandidateBB, MachineBasicBlock *MBB, MachineBasicBlock *MBB1) argument [all...] |
H A D | MachineVerifier.cpp | 132 // Is this MBB reachable from the MF entry point? 139 // Regs killed in MBB. They may be defined again, and will then be in both 143 // Regs defined in MBB and live out. Note that vregs passing through may 147 // Vregs that pass through MBB untouched. This set is disjoint from 151 // Vregs that must pass through MBB because they are needed by a successor 213 // Extra register info per MBB. 232 void visitMachineBasicBlockBefore(const MachineBasicBlock *MBB); 241 void visitMachineBasicBlockAfter(const MachineBasicBlock *MBB); 245 void report(const char *msg, const MachineBasicBlock *MBB); 273 void markReachable(const MachineBasicBlock *MBB); 490 report(const char *msg, const MachineBasicBlock *MBB) argument 567 markReachable(const MachineBasicBlock *MBB) argument 618 visitMachineBasicBlockBefore(const MachineBasicBlock *MBB) argument 2114 visitMachineBasicBlockAfter(const MachineBasicBlock *MBB) argument 2151 const MachineBasicBlock *MBB = *todo.begin(); local 2184 const MachineBasicBlock *MBB = *todo.begin(); local 2200 checkPHIOps(const MachineBasicBlock &MBB) argument 2407 const MachineBasicBlock *MBB = LiveInts->getMBBFromIndex(VNI->def); local 2498 const MachineBasicBlock *MBB = LiveInts->getMBBFromIndex(S.start); local 2785 const MachineBasicBlock *MBB = *DFI; local [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyMemIntrinsicResults.cpp | 84 static bool replaceDominatedUses(MachineBasicBlock &MBB, MachineInstr &MI, argument 141 MI.addRegisterKilled(FromReg, MBB.getParent() 149 static bool optimizeCall(MachineBasicBlock &MBB, MachineInstr &MI, argument 174 return replaceDominatedUses(MBB, MI, FromReg, ToReg, MRI, MDT, LIS); 198 for (auto &MBB : MF) { 199 LLVM_DEBUG(dbgs() << "Basic Block: " << MBB.getName() << '\n'); 200 for (auto &MI : MBB) 206 Changed |= optimizeCall(MBB, MI, MRI, MDT, LIS, TLI, LibInfo);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIOptimizeExecMaskingPreRA.cpp | 47 MachineBasicBlock *&MBB, 150 MachineBasicBlock *&MBB, 154 It = skipIgnoreExecInsts(It, MBB->end()); 155 if (It != MBB->end() || MBB->succ_size() != 1) 159 MachineBasicBlock *Succ = *MBB->succ_begin(); 162 if (!MBB->isLayoutSuccessor(Succ)) 166 MBB = Succ; 189 static unsigned optimizeVcndVcmpPair(MachineBasicBlock &MBB, argument 201 auto I = llvm::find_if(MBB 149 skipIgnoreExecInstsTrivialSucc( MachineBasicBlock *&MBB, MachineBasicBlock::iterator It) const argument [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | MIRPrinter.h | 39 void guessSuccessors(const MachineBasicBlock &MBB,
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H A D | MachineSizeOpts.h | 30 /// Returns true if machine basic block \p MBB is suggested to be size-optimized 32 bool shouldOptimizeForSize(const MachineBasicBlock *MBB,
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H A D | LiveRangeCalc.h | 81 /// For every basic block, MBB, one of these conditions shall be true: 83 /// 1. !Seen.count(MBB->getNumber()) 85 /// 2. LiveOut[MBB].second.getNode() == MBB 86 /// The live-out value is defined in MBB. 87 /// 3. forall P in preds(MBB): LiveOut[P] == LiveOut[MBB] 88 /// The live-out value passses through MBB. All predecessors must carry 126 /// Check if the entry to block @p MBB can be reached by any of the defs 127 /// in @p LR. Return true if none of the defs reach the entry to @p MBB 255 setLiveOutValue(MachineBasicBlock *MBB, VNInfo *VNI) argument [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64InstrInfo.h | 139 void copyPhysRegTuple(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, 143 void copyGPRRegTuple(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, 147 void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, 151 void storeRegToStackSlot(MachineBasicBlock &MBB, 157 void loadRegFromStackSlot(MachineBasicBlock &MBB, 181 bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, 185 unsigned removeBranch(MachineBasicBlock &MBB, 187 unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, 195 void insertSelect(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, 202 const MachineBasicBlock *MBB, [all...] |
H A D | AArch64FrameLowering.cpp | 188 for (MachineBasicBlock &MBB : MF) { 189 for (MachineInstr &MI : MBB) { 297 MachineFunction &MF, MachineBasicBlock &MBB, 329 emitFrameOffset(MBB, I, DL, AArch64::SP, AArch64::SP, {Amount, MVT::i8}, 336 emitFrameOffset(MBB, I, DL, AArch64::SP, AArch64::SP, 339 return MBB.erase(I); 368 MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI) const { 369 MachineFunction &MF = *MBB.getParent(); 374 DebugLoc DL = MBB.findDebugLoc(MBBI); 388 BuildMI(MBB, MBB 296 eliminateCallFramePseudoInstr( MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const argument 405 findScratchNonCalleeSaveRegister(MachineBasicBlock *MBB) argument 507 MachineBasicBlock *MBB = MBBI->getParent(); local 645 convertCalleeSaveRestoreToSPPrePostIncDec( MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, const TargetInstrInfo *TII, int CSStackSizeInc, bool NeedsWinCFI, bool *HasWinCFI, bool InProlog = true) argument 804 adaptForLdStOpt(MachineBasicBlock &MBB, MachineBasicBlock::iterator FirstSPPopI, MachineBasicBlock::iterator LastPopI) argument 1337 InsertReturnAddressAuth(MachineFunction &MF, MachineBasicBlock &MBB) argument 2085 spillCalleeSavedRegisters( MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const std::vector<CalleeSavedInfo> &CSI, const TargetRegisterInfo *TRI) const argument 2227 restoreCalleeSavedRegisters( MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, std::vector<CalleeSavedInfo> &CSI, const TargetRegisterInfo *TRI) const argument 2635 MachineBasicBlock &MBB = MF.front(); local [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonVectorPrint.cpp | 95 static void addAsmInstr(MachineBasicBlock *MBB, unsigned Reg, argument 102 BuildMI(*MBB, I, DL, QII->get(TargetOpcode::INLINEASM)) 136 for (auto &MBB : Fn) 137 for (auto &MI : MBB) { 140 for (++MII; MII != MBB.instr_end() && MII->isInsideBundle(); ++MII) { 165 MachineBasicBlock *MBB = I->getParent(); local 173 while (MBB->instr_end() != MII && MII->isInsideBundle()) 179 if (MBB->instr_end() == MII) 184 addAsmInstr(MBB, Reg, MII, DL, QII, Fn); 187 addAsmInstr(MBB, Hexago [all...] |
H A D | HexagonFrameLowering.h | 38 void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const 40 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const 45 bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, 51 bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, 69 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, 112 void insertPrologueInBlock(MachineBasicBlock &MBB, bool PrologueStubs) const; 113 void insertEpilogueInBlock(MachineBasicBlock &MBB) const; 114 void insertAllocframe(MachineBasicBlock &MBB, 116 bool insertCSRSpillsInBlock(MachineBasicBlock &MBB, const CSIVect &CSI, 118 bool insertCSRRestoresInBlock(MachineBasicBlock &MBB, cons [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVInstrInfo.cpp | 88 void RISCVInstrInfo::copyPhysReg(MachineBasicBlock &MBB, argument 93 BuildMI(MBB, MBBI, DL, get(RISCV::ADDI), DstReg) 108 BuildMI(MBB, MBBI, DL, get(Opc), DstReg) 113 void RISCVInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, argument 119 if (I != MBB.end()) 134 BuildMI(MBB, I, DL, get(Opcode)) 140 void RISCVInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB, argument 146 if (I != MBB.end()) 161 BuildMI(MBB, I, DL, get(Opcode), DstReg).addFrameIndex(FI).addImm(0); 164 void RISCVInstrInfo::movImm(MachineBasicBlock &MBB, argument 236 analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const argument 304 removeBranch(MachineBasicBlock &MBB, int *BytesRemoved) const argument 338 insertBranch( MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond, const DebugLoc &DL, int *BytesAdded) const argument 375 insertIndirectBranch(MachineBasicBlock &MBB, MachineBasicBlock &DestBB, const DebugLoc &DL, int64_t BrOffset, RegScavenger *RS) const argument 657 isMBBSafeToOutlineFrom(MachineBasicBlock &MBB, unsigned &Flags) const argument 716 MachineBasicBlock *MBB = MI.getParent(); local 761 buildOutlinedFrame( MachineBasicBlock &MBB, MachineFunction &MF, const outliner::OutlinedFunction &OF) const argument 787 insertOutlinedCall( Module &M, MachineBasicBlock &MBB, MachineBasicBlock::iterator &It, MachineFunction &MF, const outliner::Candidate &C) const argument [all...] |
H A D | RISCVFrameLowering.cpp | 69 void RISCVFrameLowering::adjustReg(MachineBasicBlock &MBB, argument 74 MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo(); 81 BuildMI(MBB, MBBI, DL, TII->get(RISCV::ADDI), DestReg) 94 TII->movImm(MBB, MBBI, DL, ScratchReg, Val, Flag); 95 BuildMI(MBB, MBBI, DL, TII->get(Opc), DestReg) 109 MachineBasicBlock &MBB) const { 114 MachineBasicBlock::iterator MBBI = MBB.begin(); 147 adjustReg(MBB, MBBI, DL, SPReg, SPReg, -StackSize, MachineInstr::FrameSetup); 152 BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION)) 171 BuildMI(MBB, MBB 424 eliminateCallFramePseudoInstr( MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const argument [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86AvoidTrailingCall.cpp | 69 for (MachineBasicBlock &MBB : MF) { 72 MachineBasicBlock *NextMBB = MBB.getNextNode(); 80 make_range(MBB.getReverseIterator(), MF.rend())) {
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H A D | X86FlagsCopyLowering.cpp | 97 CondRegArray collectCondsInRegs(MachineBasicBlock &MBB, 100 unsigned promoteCondToReg(MachineBasicBlock &MBB, 107 void insertTest(MachineBasicBlock &MBB, MachineBasicBlock::iterator Pos, 241 static MachineBasicBlock &splitBlock(MachineBasicBlock &MBB, argument 244 MachineFunction &MF = *MBB.getParent(); 246 assert(SplitI.getParent() == &MBB && 261 // Grab the one successor edge that will stay in `MBB`. 268 std::any_of(SplitI.getIterator(), MBB.instr_end(), 277 MBB.getFallThrough() == &UnsplitSucc; 283 MF.insert(std::next(MachineFunction::iterator(&MBB)), 391 MachineBasicBlock &MBB = *CopyI->getParent(); local 747 collectCondsInRegs( MachineBasicBlock &MBB, MachineBasicBlock::iterator TestPos) argument 797 insertTest(MachineBasicBlock &MBB, MachineBasicBlock::iterator Pos, DebugLoc Loc, unsigned Reg) argument 845 MachineBasicBlock &MBB = *MI.getParent(); local 873 MachineBasicBlock &MBB = *CMovI.getParent(); local 899 MachineBasicBlock &MBB = *CMovI.getParent(); local 987 MachineBasicBlock &MBB = *SetBI.getParent(); local [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCTOCRegDeps.cpp | 110 bool processBlock(MachineBasicBlock &MBB) { argument 114 MBB.getParent()->getSubtarget<PPCSubtarget>().isPPC64(); 117 for (auto &MI : MBB) {
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/XCore/ |
H A D | XCoreRegisterInfo.cpp | 65 MachineBasicBlock &MBB = *MI.getParent(); local 70 BuildMI(MBB, II, dl, TII.get(XCore::LDW_2rus), Reg) 76 BuildMI(MBB, II, dl, TII.get(XCore::STW_2rus)) 83 BuildMI(MBB, II, dl, TII.get(XCore::LDAWF_l2rus), Reg) 98 MachineBasicBlock &MBB = *MI.getParent(); local 102 TII.loadImmediate(MBB, II, ScratchOffset, Offset); 106 BuildMI(MBB, II, dl, TII.get(XCore::LDW_3r), Reg) 112 BuildMI(MBB, II, dl, TII.get(XCore::STW_l3r)) 119 BuildMI(MBB, II, dl, TII.get(XCore::LDAWF_l3r), Reg) 132 MachineBasicBlock &MBB local 166 MachineBasicBlock &MBB = *MI.getParent(); local 319 MachineBasicBlock &MBB = *MI.getParent(); local [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMFrameLowering.cpp | 167 bool isARM, MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, 172 emitARMRegPlusImmediate(MBB, MBBI, dl, DestReg, SrcReg, NumBytes, 175 emitT2RegPlusImmediate(MBB, MBBI, dl, DestReg, SrcReg, NumBytes, 179 static void emitSPUpdate(bool isARM, MachineBasicBlock &MBB, argument 185 emitRegPlusImmediate(isARM, MBB, MBBI, dl, TII, ARM::SP, ARM::SP, NumBytes, 251 void emitDefCFAOffsets(MachineBasicBlock &MBB, const DebugLoc &dl, argument 253 MachineFunction &MF = *MBB.getParent(); 262 BuildMI(MBB, std::next(Info.I), dl, 281 MachineBasicBlock &MBB, 303 BuildMI(MBB, MBB 166 emitRegPlusImmediate( bool isARM, MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, const DebugLoc &dl, const ARMBaseInstrInfo &TII, unsigned DestReg, unsigned SrcReg, int NumBytes, unsigned MIFlags = MachineInstr::NoFlags, ARMCC::CondCodes Pred = ARMCC::AL, unsigned PredReg = 0) argument 279 emitAligningInstructions(MachineFunction &MF, ARMFunctionInfo *AFI, const TargetInstrInfo &TII, MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, const unsigned Reg, const unsigned Alignment, const bool MustBeSingleInstruction) argument 970 emitPushInst(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const std::vector<CalleeSavedInfo> &CSI, unsigned StmOpc, unsigned StrOpc, bool NoGap, bool(*Func)(unsigned, bool), unsigned NumAlignedDPRCS2Regs, unsigned MIFlags) const argument 1048 emitPopInst(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, std::vector<CalleeSavedInfo> &CSI, unsigned LdmOpc, unsigned LdrOpc, bool isVarArg, bool NoGap, bool(*Func)(unsigned, bool), unsigned NumAlignedDPRCS2Regs) const argument 1162 emitAlignedDPRCS2Spills(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned NumAlignedDPRCS2Regs, const std::vector<CalleeSavedInfo> &CSI, const TargetRegisterInfo *TRI) argument 1335 emitAlignedDPRCS2Restores(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned NumAlignedDPRCS2Regs, const std::vector<CalleeSavedInfo> &CSI, const TargetRegisterInfo *TRI) argument 1425 spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const std::vector<CalleeSavedInfo> &CSI, const TargetRegisterInfo *TRI) const argument 1456 restoreCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, std::vector<CalleeSavedInfo> &CSI, const TargetRegisterInfo *TRI) const argument 2145 eliminateCallFramePseudoInstr( MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const argument [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | InstructionSelect.cpp | 103 for (MachineBasicBlock *MBB : post_order(&MF)) { 104 if (MBB->empty()) 110 for (auto MII = std::prev(MBB->end()), Begin = MBB->begin(); 144 auto InsertedBegin = ReachedBegin ? MBB->begin() : std::next(MII); 153 for (MachineBasicBlock &MBB : MF) { 154 if (MBB.empty()) 159 for (auto MII = std::prev(MBB.end()), Begin = MBB.begin(); !ReachedBegin;) { 219 /*MBB [all...] |