/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | LowLevelType.h | 28 LLT getLLTForType(Type &Ty, const DataLayout &DL);
|
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/IR/ |
H A D | GlobalIndirectSymbol.h | 67 const GlobalObject *getBaseObject(const DataLayout &DL, APInt &Offset) const { argument 69 getIndirectSymbol()->stripAndAccumulateInBoundsConstantOffsets(DL, 72 GlobalObject *getBaseObject(const DataLayout &DL, APInt &Offset) { argument 75 ->getBaseObject(DL, Offset));
|
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | LowLevelType.cpp | 20 LLT llvm::getLLTForType(Type &Ty, const DataLayout &DL) { argument 23 LLT ScalarTy = getLLTForType(*VTy->getElementType(), DL); 31 return LLT::pointer(AddrSpace, DL.getPointerSizeInBits(AddrSpace)); 37 auto SizeInBits = DL.getTypeSizeInBits(&Ty);
|
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SDNodeDbgValue.h | 50 DebugLoc DL; member in class:llvm::SDDbgValue 61 : Var(Var), Expr(Expr), DL(std::move(dl)), Order(O), IsIndirect(indir) { 70 : Var(Var), Expr(Expr), DL(std::move(dl)), Order(O), IsIndirect(false) { 77 bool IsIndirect, DebugLoc DL, unsigned Order, 79 : Var(Var), Expr(Expr), DL(DL), Order(Order), IsIndirect(IsIndirect) { 117 DebugLoc getDebugLoc() const { return DL; } 146 DebugLoc DL; member in class:llvm::SDDbgLabel 151 : Label(Label), DL(std::move(dl)), Order(O) {} 157 DebugLoc getDebugLoc() const { return DL; } 76 SDDbgValue(DIVariable *Var, DIExpression *Expr, unsigned VRegOrFrameIdx, bool IsIndirect, DebugLoc DL, unsigned Order, enum DbgValueKind Kind) argument [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsSEISelDAGToDAG.cpp | 206 void MipsSEDAGToDAGISel::selectAddE(SDNode *Node, const SDLoc &DL) const { 234 SDValue CstOne = CurDAG->getTargetConstant(1, DL, MVT::i32); 236 SDValue OuFlag = CurDAG->getTargetConstant(20, DL, MVT::i32); 238 SDNode *DSPCtrlField = CurDAG->getMachineNode(Mips::RDDSP, DL, MVT::i32, 242 Mips::EXT, DL, MVT::i32, SDValue(DSPCtrlField, 0), OuFlag, CstOne); 245 CurDAG->getTargetConstant(6, DL, MVT::i32), CstOne, 247 SDNode *DSPCFWithCarry = CurDAG->getMachineNode(Mips::INS, DL, MVT::i32, Ops); 258 CurDAG->getMachineNode(Mips::INS, DL, MVT::i32, InsOps); 260 SDNode *WrDSP = CurDAG->getMachineNode(Mips::WRDSP, DL, MVT::Glue, 737 SDLoc DL(Nod [all...] |
H A D | MipsSEISelLowering.cpp | 414 SDLoc DL(Op); 419 SDValue Tmp = DAG.getNode(MipsISD::MTC1_D64, DL, MVT::f64, Op->getOperand(0)); 420 return DAG.getNode(MipsISD::FSELECT, DL, ResTy, Tmp, Op->getOperand(1), 793 static SDValue genConstMult(SDValue X, APInt C, const SDLoc &DL, EVT VT, argument 797 return DAG.getConstant(0, DL, VT); 805 return DAG.getNode(ISD::SHL, DL, VT, X, 806 DAG.getConstant(C.logBase2(), DL, ShiftTy)); 817 SDValue Op0 = genConstMult(X, Floor, DL, VT, ShiftTy, DAG); 818 SDValue Op1 = genConstMult(X, C - Floor, DL, VT, ShiftTy, DAG); 819 return DAG.getNode(ISD::ADD, DL, V 1287 initAccumulator(SDValue In, const SDLoc &DL, SelectionDAG &DAG) argument 1295 extractLOHI(SDValue Op, const SDLoc &DL, SelectionDAG &DAG) argument 3040 DebugLoc DL = MI.getDebugLoc(); local 3109 DebugLoc DL = MI.getDebugLoc(); local 3174 DebugLoc DL = MI.getDebugLoc(); local 3223 DebugLoc DL = MI.getDebugLoc(); local 3249 DebugLoc DL = MI.getDebugLoc(); local 3285 DebugLoc DL = MI.getDebugLoc(); local 3331 DebugLoc DL = MI.getDebugLoc(); local 3445 DebugLoc DL = MI.getDebugLoc(); local 3480 DebugLoc DL = MI.getDebugLoc(); local 3514 DebugLoc DL = MI.getDebugLoc(); local 3569 DebugLoc DL = MI.getDebugLoc(); local 3663 DebugLoc DL = MI.getDebugLoc(); local 3768 DebugLoc DL = MI.getDebugLoc(); local 3825 DebugLoc DL = MI.getDebugLoc(); local 3854 DebugLoc DL = MI.getDebugLoc(); local [all...] |
H A D | MipsISelLowering.cpp | 577 SDLoc DL(N); 579 SDValue DivRem = DAG.getNode(Opc, DL, MVT::Glue, 586 SDValue CopyFromLo = DAG.getCopyFromReg(InChain, DL, LO, Ty, 595 SDValue CopyFromHi = DAG.getCopyFromReg(InChain, DL, 654 SDLoc DL(Op); 660 return DAG.getNode(MipsISD::FPCmp, DL, MVT::Glue, LHS, RHS, 661 DAG.getConstant(condCodeToFCC(CC), DL, MVT::i32)); 666 SDValue False, const SDLoc &DL) { 671 return DAG.getNode((invert ? MipsISD::CMovFP_F : MipsISD::CMovFP_T), DL, 705 const SDLoc DL( 665 createCMovFP(SelectionDAG &DAG, SDValue Cond, SDValue True, SDValue False, const SDLoc &DL) argument 1466 DebugLoc DL = MI.getDebugLoc(); local 1620 const DebugLoc &DL = MI.getDebugLoc(); local 1658 DebugLoc DL = MI.getDebugLoc(); local 1851 DebugLoc DL = MI.getDebugLoc(); local 1906 DebugLoc DL = MI.getDebugLoc(); local 3005 passArgOnStack(SDValue StackPtr, unsigned Offset, SDValue Chain, SDValue Arg, const SDLoc &DL, bool IsTailCall, SelectionDAG &DAG) const argument 3146 SDLoc DL = CLI.DL; local 3464 LowerCallResult( SDValue Chain, SDValue InFlag, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals, TargetLowering::CallLoweringInfo &CLI) const argument 3531 UnpackFromArgumentSlot(SDValue Val, const CCValAssign &VA, EVT ArgVT, const SDLoc &DL, SelectionDAG &DAG) argument 3591 LowerFormalArguments( SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 3764 LowerInterruptReturn(SmallVectorImpl<SDValue> &RetOps, const SDLoc &DL, SelectionDAG &DAG) const argument 3776 LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SDLoc &DL, SelectionDAG &DAG) const argument 4243 isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty, unsigned AS, Instruction *I) const argument 4303 copyByValRegs( SDValue Chain, const SDLoc &DL, std::vector<SDValue> &OutChains, SelectionDAG &DAG, const ISD::ArgFlagsTy &Flags, SmallVectorImpl<SDValue> &InVals, const Argument *FuncArg, unsigned FirstReg, unsigned LastReg, const CCValAssign &VA, MipsCCState &State) const argument 4356 passByValArg( SDValue Chain, const SDLoc &DL, std::deque<std::pair<unsigned, SDValue>> &RegsToPass, SmallVectorImpl<SDValue> &MemOpChains, SDValue StackPtr, MachineFrameInfo &MFI, SelectionDAG &DAG, SDValue Arg, unsigned FirstReg, unsigned LastReg, const ISD::ArgFlagsTy &Flags, bool isLittle, const CCValAssign &VA) const argument 4452 writeVarArgRegs(std::vector<SDValue> &OutChains, SDValue Chain, const SDLoc &DL, SelectionDAG &DAG, CCState &State) const argument 4554 DebugLoc DL = MI.getDebugLoc(); local 4630 DebugLoc DL = MI.getDebugLoc(); local [all...] |
H A D | MipsTargetObjectFile.h | 38 bool IsConstantInSmallSection(const DataLayout &DL, const Constant *CN, 41 MCSection *getSectionForConstant(const DataLayout &DL, SectionKind Kind,
|
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVTargetObjectFile.cpp | 102 const DataLayout &DL, const Constant *CN) const { 103 return isInSmallSection(DL.getTypeAllocSize(CN->getType())); 107 const DataLayout &DL, SectionKind Kind, const Constant *C, 109 if (isConstantInSmallSection(DL, C)) 113 return TargetLoweringObjectFileELF::getSectionForConstant(DL, Kind, C, Align); 101 isConstantInSmallSection( const DataLayout &DL, const Constant *CN) const argument 106 getSectionForConstant( const DataLayout &DL, SectionKind Kind, const Constant *C, unsigned &Align) const argument
|
H A D | RISCVExpandPseudoInsts.cpp | 234 DebugLoc DL, MachineBasicBlock *ThisMBB, 250 BuildMI(LoopMBB, DL, TII->get(getLRForRMW(Ordering, Width)), DestReg) 256 BuildMI(LoopMBB, DL, TII->get(RISCV::AND), ScratchReg) 259 BuildMI(LoopMBB, DL, TII->get(RISCV::XORI), ScratchReg) 264 BuildMI(LoopMBB, DL, TII->get(getSCForRMW(Ordering, Width)), ScratchReg) 267 BuildMI(LoopMBB, DL, TII->get(RISCV::BNE)) 273 static void insertMaskedMerge(const RISCVInstrInfo *TII, DebugLoc DL, argument 284 BuildMI(MBB, DL, TII->get(RISCV::XOR), ScratchReg) 287 BuildMI(MBB, DL, TII->get(RISCV::AND), ScratchReg) 290 BuildMI(MBB, DL, TI 233 doAtomicBinOpExpansion(const RISCVInstrInfo *TII, MachineInstr &MI, DebugLoc DL, MachineBasicBlock *ThisMBB, MachineBasicBlock *LoopMBB, MachineBasicBlock *DoneMBB, AtomicRMWInst::BinOp BinOp, int Width) argument 295 doMaskedAtomicBinOpExpansion( const RISCVInstrInfo *TII, MachineInstr &MI, DebugLoc DL, MachineBasicBlock *ThisMBB, MachineBasicBlock *LoopMBB, MachineBasicBlock *DoneMBB, AtomicRMWInst::BinOp BinOp, int Width) argument 363 DebugLoc DL = MI.getDebugLoc(); local 396 insertSext(const RISCVInstrInfo *TII, DebugLoc DL, MachineBasicBlock *MBB, Register ValReg, Register ShamtReg) argument 416 DebugLoc DL = MI.getDebugLoc(); local 532 DebugLoc DL = MI.getDebugLoc(); local 630 DebugLoc DL = MI.getDebugLoc(); local [all...] |
H A D | RISCVISelLowering.cpp | 240 EVT RISCVTargetLowering::getSetCCResultType(const DataLayout &DL, LLVMContext &, argument 243 return getPointerTy(DL); 275 bool RISCVTargetLowering::isLegalAddressingMode(const DataLayout &DL, argument 421 SDLoc DL(Op); 425 SDValue NewOp0 = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i64, Op0); 426 SDValue FPConv = DAG.getNode(RISCVISD::FMV_W_X_RV64, DL, MVT::f32, NewOp0); 432 static SDValue getTargetNode(GlobalAddressSDNode *N, SDLoc DL, EVT Ty, argument 434 return DAG.getTargetGlobalAddress(N->getGlobal(), DL, Ty, 0, Flags); 437 static SDValue getTargetNode(BlockAddressSDNode *N, SDLoc DL, EVT Ty, argument 443 static SDValue getTargetNode(ConstantPoolSDNode *N, SDLoc DL, EV argument 1171 DebugLoc DL = MI.getDebugLoc(); local 1202 DebugLoc DL = MI.getDebugLoc(); local 1234 DebugLoc DL = MI.getDebugLoc(); local 1335 DebugLoc DL = MI.getDebugLoc(); local 1493 CC_RISCV(const DataLayout &DL, RISCVABI::ABI ABI, unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State, bool IsFixed, bool IsRet, Type *OrigTy) argument 1713 convertLocVTToValVT(SelectionDAG &DAG, SDValue Val, const CCValAssign &VA, const SDLoc &DL) argument 1733 unpackFromRegLoc(SelectionDAG &DAG, SDValue Chain, const CCValAssign &VA, const SDLoc &DL) argument 1766 convertValVTToLocVT(SelectionDAG &DAG, SDValue Val, const CCValAssign &VA, const SDLoc &DL) argument 1788 unpackFromMemLoc(SelectionDAG &DAG, SDValue Chain, const CCValAssign &VA, const SDLoc &DL) argument 1816 unpackF64OnRV32DSoftABI(SelectionDAG &DAG, SDValue Chain, const CCValAssign &VA, const SDLoc &DL) argument 1911 LowerFormalArguments( SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 2132 SDLoc &DL = CLI.DL; local 2420 LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SDLoc &DL, SelectionDAG &DAG) const argument 2872 const DataLayout &DL = AI->getModule()->getDataLayout(); local [all...] |
H A D | RISCVTargetObjectFile.h | 35 bool isConstantInSmallSection(const DataLayout &DL, const Constant *CN) const; 37 MCSection *getSectionForConstant(const DataLayout &DL, SectionKind Kind,
|
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/Analysis/ |
H A D | Loads.h | 31 const DataLayout &DL, 41 const DataLayout &DL, 50 const APInt &Size, const DataLayout &DL, 63 const DataLayout &DL, 87 const DataLayout &DL,
|
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/BPF/ |
H A D | BPFISelDAGToDAG.cpp | 84 bool fillGenericConstant(const DataLayout &DL, const Constant *CV, 86 bool fillConstantDataArray(const DataLayout &DL, const ConstantDataArray *CDA, 88 bool fillConstantArray(const DataLayout &DL, const ConstantArray *CA, 90 bool fillConstantStruct(const DataLayout &DL, const ConstantStruct *CS, 102 SDLoc DL(Addr); 105 Offset = CurDAG->getTargetConstant(0, DL, MVT::i64); 125 Offset = CurDAG->getTargetConstant(CN->getSExtValue(), DL, MVT::i64); 131 Offset = CurDAG->getTargetConstant(0, DL, MVT::i64); 138 SDLoc DL(Addr); 153 Offset = CurDAG->getTargetConstant(CN->getSExtValue(), DL, MV 195 const DebugLoc &DL = Node->getDebugLoc(); local 349 const DataLayout &DL = CurDAG->getDataLayout(); local 391 fillGenericConstant(const DataLayout &DL, const Constant *CV, val_vec_type &Vals, uint64_t Offset) argument 428 fillConstantDataArray(const DataLayout &DL, const ConstantDataArray *CDA, val_vec_type &Vals, int Offset) argument 441 fillConstantArray(const DataLayout &DL, const ConstantArray *CA, val_vec_type &Vals, int Offset) argument 453 fillConstantStruct(const DataLayout &DL, const ConstantStruct *CS, val_vec_type &Vals, int Offset) argument [all...] |
H A D | BPFISelLowering.cpp | 39 static void fail(const SDLoc &DL, SelectionDAG &DAG, const Twine &Msg) { argument 42 DiagnosticInfoUnsupported(MF.getFunction(), Msg, DL.getDebugLoc())); 45 static void fail(const SDLoc &DL, SelectionDAG &DAG, const char *Msg, argument 54 DiagnosticInfoUnsupported(MF.getFunction(), Str, DL.getDebugLoc())); 208 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, 242 SDValue ArgValue = DAG.getCopyFromReg(Chain, DL, VReg, RegVT); 247 ArgValue = DAG.getNode(ISD::AssertSext, DL, RegVT, ArgValue, 250 ArgValue = DAG.getNode(ISD::AssertZext, DL, RegVT, ArgValue, 254 ArgValue = DAG.getNode(ISD::TRUNCATE, DL, VA.getValVT(), ArgValue); 261 fail(DL, DA 206 LowerFormalArguments( SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 407 LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SDLoc &DL, SelectionDAG &DAG) const argument 454 LowerCallResult( SDValue Chain, SDValue InFlag, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 570 DebugLoc DL = MI.getDebugLoc(); local 620 DebugLoc DL = MI.getDebugLoc(); local 759 getScalarShiftAmountTy(const DataLayout &DL, EVT VT) const argument [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Lanai/ |
H A D | LanaiISelLowering.cpp | 398 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, 403 return LowerCCCArguments(Chain, CallConv, IsVarArg, Ins, DL, DAG, InVals); 412 SDLoc &DL = CLI.DL; local 429 OutVals, Ins, DL, DAG, InVals); 439 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, 465 SDValue ArgValue = DAG.getCopyFromReg(Chain, DL, VReg, RegVT); 471 ArgValue = DAG.getNode(ISD::AssertSext, DL, RegVT, ArgValue, 474 ArgValue = DAG.getNode(ISD::AssertZext, DL, RegVT, ArgValue, 478 ArgValue = DAG.getNode(ISD::TRUNCATE, DL, V 396 LowerFormalArguments( SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 437 LowerCCCArguments( SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 534 LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SDLoc &DL, SelectionDAG &DAG) const argument 596 LowerCCCCallTo( SDValue Chain, SDValue Callee, CallingConv::ID CallConv, bool IsVarArg, bool , const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 774 LowerCallResult( SDValue Chain, SDValue InFlag, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 801 IntCondCCodeToICC(SDValue CC, const SDLoc &DL, SDValue &RHS, SelectionDAG &DAG) argument [all...] |
H A D | LanaiFrameLowering.cpp | 74 DebugLoc DL = MI.getDebugLoc(); local 78 BuildMI(*MBB, MI, DL, LII.get(Lanai::ADD_I_LO), Dst) 102 DebugLoc DL; local 113 BuildMI(MBB, MBBI, DL, LII.get(Lanai::SW_RI)) 122 BuildMI(MBB, MBBI, DL, LII.get(Lanai::ADD_I_LO), Lanai::FP) 130 BuildMI(MBB, MBBI, DL, LII.get(Lanai::SUB_I_LO), Lanai::SP) 183 DebugLoc DL = MBBI->getDebugLoc(); local 186 BuildMI(MBB, MBBI, DL, LII.get(Lanai::ADD_I_LO), Lanai::SP) 191 BuildMI(MBB, MBBI, DL, LII.get(Lanai::LDW_RI), Lanai::FP)
|
H A D | LanaiISelDAGToDAG.cpp | 85 inline SDValue getI32Imm(unsigned Imm, const SDLoc &DL) { argument 86 return CurDAG->getTargetConstant(Imm, DL, MVT::i32); 105 SDLoc DL(Addr); 109 Offset = CurDAG->getTargetConstant(Imm, DL, CN->getValueType(0)); 124 SDLoc DL(Addr); 131 Offset = CurDAG->getTargetConstant(Imm, DL, CN->getValueType(0)); 133 AluOp = CurDAG->getTargetConstant(LPAC::ADD, DL, MVT::i32); 144 Offset = CurDAG->getTargetConstant(Imm, DL, CN->getValueType(0)); 146 AluOp = CurDAG->getTargetConstant(LPAC::ADD, DL, MVT::i32); 157 Offset = CurDAG->getTargetConstant(0, DL, MV [all...] |
H A D | LanaiTargetObjectFile.h | 37 bool isConstantInSmallSection(const DataLayout &DL, const Constant *CN) const; 39 MCSection *getSectionForConstant(const DataLayout &DL, SectionKind Kind,
|
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | R600ISelLowering.cpp | 508 SDLoc DL(Op); 514 DAG.getConstant(0, DL, MVT::i32), // SWZ_X 515 DAG.getConstant(1, DL, MVT::i32), // SWZ_Y 516 DAG.getConstant(2, DL, MVT::i32), // SWZ_Z 517 DAG.getConstant(3, DL, MVT::i32) // SWZ_W 519 return DAG.getNode(AMDGPUISD::R600_EXPORT, DL, Op.getValueType(), Args); 532 SDLoc DL(Op); 549 DAG.getConstant(TextureOp, DL, MVT::i32), 551 DAG.getConstant(0, DL, MVT::i32), 552 DAG.getConstant(1, DL, MV 749 const DataLayout &DL = DAG.getDataLayout(); local 903 LowerImplicitParameter(SelectionDAG &DAG, EVT VT, const SDLoc &DL, unsigned DwordOffset) const argument 1578 LowerFormalArguments( SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 1648 getSetCCResultType(const DataLayout &DL, LLVMContext &, EVT VT) const argument [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ExpandPseudo.cpp | 85 DebugLoc DL = JTInst->getDebugLoc(); local 92 BuildMI(*MBB, MBBI, DL, TII->get(X86::LEA64r), X86::R11) 99 BuildMI(*MBB, MBBI, DL, TII->get(X86::CMP64rr)) 113 BuildMI(*MBB, MBBI, DL, TII->get(X86::JCC_1)).addMBB(ThenMBB).addImm(CC); 128 BuildMI(*MBB, MBBI, DL, TII->get(X86::TAILJMPd64)) 170 BuildMI(P.first, DL, TII->get(X86::TAILJMPd64)) 183 DebugLoc DL = MBBI->getDebugLoc(); local 218 X86FL->emitSPUpdate(MBB, MBBI, DL, Offset, /*InEpilogue=*/true); 245 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(Op)); 262 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TI [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 669 EVT SystemZTargetLowering::getSetCCResultType(const DataLayout &DL, argument 936 bool SystemZTargetLowering::isLegalAddressingMode(const DataLayout &DL, argument 1271 static SDValue convertLocVTToValVT(SelectionDAG &DAG, const SDLoc &DL, argument 1277 Value = DAG.getNode(ISD::AssertSext, DL, VA.getLocVT(), Value, 1280 Value = DAG.getNode(ISD::AssertZext, DL, VA.getLocVT(), Value, 1284 Value = DAG.getNode(ISD::TRUNCATE, DL, VA.getValVT(), Value); 1290 Value = DAG.getBuildVector(MVT::v2i64, DL, {Value, DAG.getUNDEF(MVT::i64)}); 1291 Value = DAG.getNode(ISD::BITCAST, DL, VA.getValVT(), Value); 1300 static SDValue convertValVTToLocVT(SelectionDAG &DAG, const SDLoc &DL, argument 1304 return DAG.getNode(ISD::SIGN_EXTEND, DL, V 1324 LowerFormalArguments( SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 1493 SDLoc &DL = CLI.DL; local 1689 LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SDLoc &DL, SelectionDAG &DAG) const argument 1992 adjustZeroCmp(SelectionDAG &DAG, const SDLoc &DL, Comparison &C) argument 2012 adjustSubwordCmp(SelectionDAG &DAG, const SDLoc &DL, Comparison &C) argument 2176 adjustForSubtraction(SelectionDAG &DAG, const SDLoc &DL, Comparison &C) argument 2246 adjustICmpTruncate(SelectionDAG &DAG, const SDLoc &DL, Comparison &C) argument 2377 adjustForTestUnderMask(SelectionDAG &DAG, const SDLoc &DL, Comparison &C) argument 2468 adjustForRedundantAnd(SelectionDAG &DAG, const SDLoc &DL, Comparison &C) argument 3064 lowerThreadPointer(const SDLoc &DL, SelectionDAG &DAG) const argument 4397 getPermuteNode(SelectionDAG &DAG, const SDLoc &DL, const Permute &P, SDValue Op0, SDValue Op1) argument 4426 getGeneralPermuteNode(SelectionDAG &DAG, const SDLoc &DL, SDValue *Ops, const SmallVectorImpl<int> &Bytes) argument 4544 getNode(SelectionDAG &DAG, const SDLoc &DL) argument 4632 buildScalarToVector(SelectionDAG &DAG, const SDLoc &DL, EVT VT, SDValue Value) argument 4648 buildMergeScalars(SelectionDAG &DAG, const SDLoc &DL, EVT VT, SDValue Op0, SDValue Op1) argument 4664 joinDwords(SelectionDAG &DAG, const SDLoc &DL, SDValue Op0, SDValue Op1) argument 4744 buildVector(SelectionDAG &DAG, const SDLoc &DL, EVT VT, SmallVectorImpl<SDValue> &Elems) const argument 5445 combineExtract(const SDLoc &DL, EVT ResVT, EVT VecVT, SDValue Op, unsigned Index, DAGCombinerInfo &DCI, bool Force) const argument 5551 combineTruncateExtract( const SDLoc &DL, EVT TruncVT, SDValue Op, DAGCombinerInfo &DCI) const argument 6829 DebugLoc DL = MI->getDebugLoc(); local 6952 DebugLoc DL = MI.getDebugLoc(); local 7047 DebugLoc DL = MI.getDebugLoc(); local 7165 DebugLoc DL = MI.getDebugLoc(); local 7281 DebugLoc DL = MI.getDebugLoc(); local 7395 DebugLoc DL = MI.getDebugLoc(); local 7423 DebugLoc DL = MI.getDebugLoc(); local 7453 DebugLoc DL = MI.getDebugLoc(); local 7633 DebugLoc DL = MI.getDebugLoc(); local 7740 DebugLoc DL = MI.getDebugLoc(); local [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Remarks/ |
H A D | Remark.cpp | 41 LLVMRemarkDebugLocGetSourceFilePath(LLVMRemarkDebugLocRef DL) { argument 42 return wrap(&unwrap(DL)->SourceFilePath); 45 extern "C" uint32_t LLVMRemarkDebugLocGetSourceLine(LLVMRemarkDebugLocRef DL) { argument 46 return unwrap(DL)->SourceLine; 50 LLVMRemarkDebugLocGetSourceColumn(LLVMRemarkDebugLocRef DL) { argument 51 return unwrap(DL)->SourceColumn;
|
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | A15SDOptimizer.cpp | 68 const DebugLoc &DL, unsigned Reg, unsigned Lane, 73 const DebugLoc &DL, unsigned DReg, 78 const DebugLoc &DL, unsigned Ssub0, unsigned Ssub1); 82 const DebugLoc &DL, unsigned Reg1, 87 const DebugLoc &DL, unsigned DReg, 92 const DebugLoc &DL); 418 const DebugLoc &DL, unsigned Reg, 422 BuildMI(MBB, InsertBefore, DL, 434 const DebugLoc &DL, unsigned DReg, unsigned Lane, 439 DL, 416 createDupLane(MachineBasicBlock &MBB, MachineBasicBlock::iterator InsertBefore, const DebugLoc &DL, unsigned Reg, unsigned Lane, bool QPR) argument 432 createExtractSubreg( MachineBasicBlock &MBB, MachineBasicBlock::iterator InsertBefore, const DebugLoc &DL, unsigned DReg, unsigned Lane, const TargetRegisterClass *TRC) argument 447 createRegSequence( MachineBasicBlock &MBB, MachineBasicBlock::iterator InsertBefore, const DebugLoc &DL, unsigned Reg1, unsigned Reg2) argument 464 createVExt(MachineBasicBlock &MBB, MachineBasicBlock::iterator InsertBefore, const DebugLoc &DL, unsigned Ssub0, unsigned Ssub1) argument 477 createInsertSubreg( MachineBasicBlock &MBB, MachineBasicBlock::iterator InsertBefore, const DebugLoc &DL, unsigned DReg, unsigned Lane, unsigned ToInsert) argument 493 createImplicitDef(MachineBasicBlock &MBB, MachineBasicBlock::iterator InsertBefore, const DebugLoc &DL) argument 510 DebugLoc DL = MI->getDebugLoc(); local [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/MSP430/ |
H A D | MSP430FrameLowering.cpp | 49 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc(); local 66 BuildMI(MBB, MBBI, DL, TII.get(MSP430::PUSH16r)) 70 BuildMI(MBB, MBBI, DL, TII.get(MSP430::MOV16rr), MSP430::FP) 86 DL = MBBI->getDebugLoc(); 98 BuildMI(MBB, MBBI, DL, TII.get(MSP430::SUB16ri), MSP430::SP) 115 DebugLoc DL = MBBI->getDebugLoc(); local 135 BuildMI(MBB, MBBI, DL, TII.get(MSP430::POP16r), MSP430::FP); 148 DL = MBBI->getDebugLoc(); 156 BuildMI(MBB, MBBI, DL, 160 BuildMI(MBB, MBBI, DL, [all...] |