H A D | AArch64Disassembler.cpp | 41 unsigned RegNo, uint64_t Address, 45 uint64_t Address, 48 uint64_t Address, 51 uint64_t Address, 54 uint64_t Address, 57 uint64_t Address, 60 uint64_t Address, 63 uint64_t Address, 66 unsigned RegNo, uint64_t Address, 69 uint64_t Address, 251 getInstruction(MCInst &MI, uint64_t &Size, ArrayRef<uint8_t> Bytes, uint64_t Address, raw_ostream &CS) const argument 505 DecodeZPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void* Decoder) argument 516 DecodeZPR_4bRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 524 DecodeZPR_3bRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 543 DecodeZPR2RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void* Decoder) argument 567 DecodeZPR3RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void* Decoder) argument 591 DecodeZPR4RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void* Decoder) argument 815 DecodeMemExtend(MCInst &Inst, unsigned Imm, uint64_t Address, const void *Decoder) argument 822 DecodeMRSSystemRegister(MCInst &Inst, unsigned Imm, uint64_t Address, const void *Decoder) argument 832 DecodeMSRSystemRegister(MCInst &Inst, unsigned Imm, uint64_t Address, const void *Decoder) argument 840 DecodeFMOVLaneInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1825 DecodeSImm(llvm::MCInst &Inst, uint64_t Imm, uint64_t Address, const void *Decoder) argument [all...] |