/freebsd-10.3-release/sys/mips/atheros/ |
H A D | ar71xxreg.h | 253 #define AR71XX_REV_ID_MINOR_MASK 0x3 257 #define AR71XX_REV_ID_REVISION_MASK 0x3 261 #define AR724X_REV_ID_REVISION_MASK 0x3 264 #define AR91XX_REV_ID_MINOR_MASK 0x3 267 #define AR91XX_REV_ID_REVISION_MASK 0x3
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/freebsd-10.3-release/sys/dev/mlx5/ |
H A D | mlx5_ifc.h | 40 MLX5_EVENT_TYPE_SQ_DRAINED = 0x3, 69 MLX5_MODIFY_TIR_BITMASK_TUNNELED_OFFLOAD_EN = 0x3 366 u8 first_prio[0x3]; 399 u8 outer_second_prio[0x3]; 402 u8 inner_second_prio[0x3]; 472 u8 reserved_2[0x3]; 494 u8 eth_prio[0x3]; 557 u8 reserved_1[0x3]; 675 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_64_GID_ENTRIES = 0x3, 683 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_1K_ENTRIES = 0x3, [all...] |
/freebsd-10.3-release/sys/arm/ti/am335x/ |
H A D | am335x_prcm.c | 482 while ((prcm_read_4(clk_details->clkctrl_reg) & 0x3) != 2) 535 while ((prcm_read_4(clk_details->clkctrl_reg) & 0x3) != 0) 578 while ((prcm_read_4(clk_details->clksel_reg) & 0x3) != reg) 601 switch ((ctrl_status>>22) & 0x3) { 614 case 0x3: 705 while ((prcm_read_4(CM_PER_USB0_CLKCTRL) & 0x3) != 2) 749 while ((prcm_read_4(CM_PER_LCDC_CLKCTRL) & 0x3) != 2) 771 while ((prcm_read_4(CM_PER_PRUSS_CLKCTRL) & 0x3) != 2) 791 while ((prcm_read_4(CLKSEL_PRUSS_OCP_CLK) & 0x3) != 0)
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/freebsd-10.3-release/contrib/llvm/lib/Target/X86/Disassembler/ |
H A D | X86DisassemblerDecoder.h | 55 #define ppFromVEX3of3(vex) ((vex) & 0x3) 60 #define ppFromVEX2of2(vex) ((vex) & 0x3) 69 #define ppFromXOP3of3(xop) ((xop) & 0x3) 456 VEX_LOB_0F3A = 0x3 473 VEX_PREFIX_F2 = 0x3 480 TYPE_XOP = 0x3
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/freebsd-10.3-release/lib/msun/ld128/ |
H A D | k_expl.h | 103 0x1.0163da9fb33356d84a66aep0L, 0x3.36dcdfa4003ec04c360be2404078p-92L, 119 0x1.18af9388c8de9bbbf70b9ap0L, 0x3.c2505c97c0102e5f1211941d2840p-92L, 129 0x1.284dfe1f5638096cf15cf0p0L, 0x3.ca0967fdaa2e52d7c8106f2e262cp-92L, 134 0x1.306fe0a31b7152de8d5a46p0L, 0x3.05c85edecbc27343629f502f1af2p-92L, 137 0x1.356c55f929ff0c94623476p0L, 0x3.73af38d6d8d6f9506c9bbc93cbc0p-92L, 160 0x1.5e76f15ad21486e9be4c20p0L, 0x3.99766a06548a05829e853bdb2b52p-92L,
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/freebsd-10.3-release/contrib/binutils/include/opcode/ |
H A D | mips.h | 117 #define OP_MASK_COP1CMP 0x3 155 #define OP_MASK_DSPACC 0x3 157 #define OP_MASK_DSPACC_S 0x3 175 #define OP_MASK_BP 0x3 183 #define OP_MASK_MTACC_T 0x3 185 #define OP_MASK_MTACC_D 0x3
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/freebsd-10.3-release/sys/arm/samsung/exynos/ |
H A D | exynos5_fimd.c | 122 #define VSYNC_PULSE_WIDTH_VAL 0x3 124 #define V_FRONT_PORCH_VAL 0x3 126 #define V_BACK_PORCH_VAL 0x3 129 #define HSYNC_PULSE_WIDTH_VAL 0x3 131 #define H_FRONT_PORCH_VAL 0x3 133 #define H_BACK_PORCH_VAL 0x3
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/freebsd-10.3-release/sys/dev/ixl/ |
H A D | i40e_register.h | 203 #define I40E_PFCM_LANCTXCTL_QUEUE_TYPE_MASK I40E_MASK(0x3, I40E_PFCM_LANCTXCTL_QUEUE_TYPE_SHIFT) 205 #define I40E_PFCM_LANCTXCTL_OP_CODE_MASK I40E_MASK(0x3, I40E_PFCM_LANCTXCTL_OP_CODE_SHIFT) 243 #define I40E_PRTDCB_FCCFG_TFCE_MASK I40E_MASK(0x3, I40E_PRTDCB_FCCFG_TFCE_SHIFT) 255 #define I40E_PRTDCB_GENC_RESERVED_1_MASK I40E_MASK(0x3, I40E_PRTDCB_GENC_RESERVED_1_SHIFT) 402 #define I40E_GLGEN_CLKSTAT_U_CLK_SPEED_MASK I40E_MASK(0x3, I40E_GLGEN_CLKSTAT_U_CLK_SPEED_SHIFT) 414 #define I40E_GLGEN_GPIO_CTL_PRT_NUM_MASK I40E_MASK(0x3, I40E_GLGEN_GPIO_CTL_PRT_NUM_SHIFT) 432 #define I40E_GLGEN_GPIO_CTL_INT_MODE_MASK I40E_MASK(0x3, I40E_GLGEN_GPIO_CTL_INT_MODE_SHIFT) 532 #define I40E_GLGEN_MSCA_OPCODE_MASK I40E_MASK(0x3, I40E_GLGEN_MSCA_OPCODE_SHIFT) 534 #define I40E_GLGEN_MSCA_STCODE_MASK I40E_MASK(0x3, I40E_GLGEN_MSCA_STCODE_SHIFT) 552 #define I40E_GLGEN_RSTAT_DEVSTATE_MASK I40E_MASK(0x3, I40E_GLGEN_RSTAT_DEVSTATE_SHIF [all...] |
/freebsd-10.3-release/crypto/openssl/crypto/asn1/ |
H A D | a_utf8.c | 133 value = ((unsigned long)(*p++ & 0x3)) << 24; 218 *str++ = (unsigned char)(((value >> 24) & 0x3) | 0xf8);
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/freebsd-10.3-release/sys/dev/cxgbe/common/ |
H A D | t4_hw.h | 142 #define M_RSPD_TYPE 0x3 176 #define M_PPOD_PGSZ 0x3
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/freebsd-10.3-release/sys/mips/nlm/ |
H A D | mpreset.S | 63 ori v1, v0, 0x3 /* way0 | write_enable | write_active */ 159 andi t0, 0x3
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H A D | board.h | 58 #define DCARD_NOT_PRSNT 0x3
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/freebsd-10.3-release/sys/dev/usb/wlan/ |
H A D | if_uralreg.h | 119 #define RAL_ENABLE_TSF_SYNC(x) (((x) & 0x3) << 1) 171 #define RAL_AIFSN(x) (((x) & 0x3) << 6)
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/freebsd-10.3-release/sys/x86/include/ |
H A D | mptable.h | 128 #define INTENTRY_FLAGS_POLARITY 0x3 131 #define INTENTRY_FLAGS_POLARITY_ACTIVELO 0x3
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/freebsd-10.3-release/sys/dev/smc/ |
H A D | if_smcreg.h | 108 #define RPCR_LED_LINK_FDX 0x3 /* Full-duplex link detected */ 167 /* Bank 2, Offset 0x3: Allocation Result Register */ 168 #define ARR 0x3
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/freebsd-10.3-release/sys/arm/at91/ |
H A D | at91sam9g45reg.h | 264 #define AT91SAM9G45_DDRSDRC_CR_NC_11 0x3 279 #define AT91SAM9G45_DDRSDRC_MDR_LPDDR1 0x3
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/freebsd-10.3-release/sys/dev/ppbus/ |
H A D | ppb_msq.h | 50 #define MS_TYP_FUN 0x3 /* function pointer */ 101 #define MS_REG_EPP_A 0x3
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/freebsd-10.3-release/contrib/ntp/ntpq/ |
H A D | ntpq.h | 60 #define NTP_INT 0x3 /* signed integer */
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/freebsd-10.3-release/contrib/llvm/lib/Target/R600/ |
H A D | R600Defines.h | 28 #define GET_FLAG_OPERAND_IDX(Flags) (((Flags) >> 7) & 0x3)
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/freebsd-10.3-release/crypto/heimdal/lib/asn1/ |
H A D | asn1-template.h | 71 #define A1_TAG_CLASS(x) (((x) >> 22) & 0x3)
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/freebsd-10.3-release/crypto/openssl/crypto/x509v3/ |
H A D | pcy_int.h | 99 #define POLICY_DATA_FLAG_MAP_MASK 0x3
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/freebsd-10.3-release/sys/dev/acpica/ |
H A D | acpi_smbus.h | 71 #define SMBATT_CMD_BATTERY_MODE 0x3
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/freebsd-10.3-release/sys/cddl/compat/opensolaris/sys/ |
H A D | kmem.h | 43 #define POINTER_IS_VALID(p) (!((uintptr_t)(p) & 0x3))
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/freebsd-10.3-release/sys/dev/isci/scil/ |
H A D | scic_sgpio.h | 74 #define SGPIO_BLINK_DURATION_500 0x3
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/freebsd-10.3-release/contrib/binutils/include/elf/ |
H A D | hppa.h | 524 #define SHN_NS_UNDEF (SHN_LOOS + 0x3) 534 #define SHT_HP_OBJDICT (SHT_LOOS + 0x3) 560 #define DT_HP_UX10_INIT (OLD_DT_LOOS + 0x3) 605 #define PT_HP_CORE_KERNEL (PT_LOOS + 0x3)
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