Searched refs:getReg (Results 176 - 200 of 244) sorted by relevance

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/freebsd-10.2-release/contrib/llvm/lib/CodeGen/
H A DRegisterPressure.cpp327 if (!MO.isReg() || !MO.getReg())
330 pushRegUnits(MO.getReg(), Uses);
334 pushRegUnits(MO.getReg(), DeadDefs);
337 pushRegUnits(MO.getReg(), Defs);
H A DTargetSchedule.cpp269 unsigned Reg = DefMI->getOperand(DefOperIdx).getReg();
H A DScheduleDAG.cpp351 dbgs() << " Reg=" << PrintReg(I->getReg(), G->TRI);
371 dbgs() << " Reg=" << PrintReg(I->getReg(), G->TRI);
/freebsd-10.2-release/contrib/llvm/include/llvm/CodeGen/
H A DMachineFrameInfo.h46 unsigned getReg() const { return Reg; } function in class:llvm::CalleeSavedInfo
H A DMachineInstr.h684 return isCopy() && getOperand(0).getReg() == getOperand(1).getReg() &&
/freebsd-10.2-release/contrib/llvm/lib/Target/MSP430/
H A DMSP430RegisterInfo.cpp143 unsigned DstReg = MI.getOperand(0).getReg();
H A DMSP430ISelLowering.cpp333 State.addLoc(CCValAssign::getReg(ValNo++, ArgVT, Reg, LocVT, LocInfo));
1263 unsigned ShiftAmtSrcReg = MI->getOperand(2).getReg();
1264 unsigned SrcReg = MI->getOperand(1).getReg();
1265 unsigned DstReg = MI->getOperand(0).getReg();
1368 MI->getOperand(0).getReg())
1369 .addReg(MI->getOperand(2).getReg()).addMBB(copy0MBB)
1370 .addReg(MI->getOperand(1).getReg()).addMBB(thisMBB);
/freebsd-10.2-release/contrib/llvm/lib/Target/Mips/
H A DMips16FrameLowering.cpp117 unsigned Reg = CSI[i].getReg();
H A DMipsInstrInfo.cpp107 MIB.addReg(Cond[i].getReg());
H A DMipsSEISelDAGToDAG.cpp90 (MI.getOperand(1).getReg() == Mips::ZERO) &&
92 DstReg = MI.getOperand(0).getReg();
95 (MI.getOperand(1).getReg() == Mips::ZERO_64) &&
97 DstReg = MI.getOperand(0).getReg();
H A DMipsISelLowering.cpp774 .addReg(Divisor.getReg(), getKillRegState(Divisor.isKill()))
904 unsigned OldVal = MI->getOperand(0).getReg();
905 unsigned Ptr = MI->getOperand(1).getReg();
906 unsigned Incr = MI->getOperand(2).getReg();
973 unsigned Dest = MI->getOperand(0).getReg();
974 unsigned Ptr = MI->getOperand(1).getReg();
975 unsigned Incr = MI->getOperand(2).getReg();
1144 unsigned Dest = MI->getOperand(0).getReg();
1145 unsigned Ptr = MI->getOperand(1).getReg();
1146 unsigned OldVal = MI->getOperand(2).getReg();
[all...]
/freebsd-10.2-release/contrib/llvm/lib/Target/NVPTX/InstPrinter/
H A DNVPTXInstPrinter.cpp85 unsigned Reg = Op.getReg();
/freebsd-10.2-release/contrib/llvm/lib/Target/PowerPC/
H A DPPCMCInstLower.cpp177 MCOp = MCOperand::CreateReg(MO.getReg());
H A DPPCCTRLoops.cpp550 if (MO.isDef() && (MO.getReg() == PPC::CTR || MO.getReg() == PPC::CTR8))
H A DPPCISelLowering.cpp3458 cast<RegisterSDNode>(Callee)->getReg() == PPC::CTR) ||
5906 unsigned dest = MI->getOperand(0).getReg();
5907 unsigned ptrA = MI->getOperand(1).getReg();
5908 unsigned ptrB = MI->getOperand(2).getReg();
5909 unsigned incr = MI->getOperand(3).getReg();
5975 unsigned dest = MI->getOperand(0).getReg();
5976 unsigned ptrA = MI->getOperand(1).getReg();
5977 unsigned ptrB = MI->getOperand(2).getReg();
5978 unsigned incr = MI->getOperand(3).getReg();
6104 unsigned DstReg = MI->getOperand(0).getReg();
[all...]
/freebsd-10.2-release/contrib/llvm/lib/Target/Sparc/
H A DSparcCodeEmitter.cpp174 return TM.getRegisterInfo()->getEncodingValue(MO.getReg());
H A DSparcInstrInfo.cpp56 return MI->getOperand(0).getReg();
77 return MI->getOperand(2).getReg();
/freebsd-10.2-release/contrib/llvm/lib/Target/SystemZ/MCTargetDesc/
H A DSystemZMCCodeEmitter.cpp109 return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg());
/freebsd-10.2-release/contrib/llvm/lib/Target/X86/
H A DX86VZeroUpper.cpp145 if (isYmmReg(MO.getReg()))
H A DX86InstrInfo.h358 return X86II::isX86_64ExtendedReg(MO.getReg());
/freebsd-10.2-release/contrib/llvm/lib/Target/XCore/
H A DXCoreRegisterInfo.cpp153 unsigned Reg = MI.getOperand(0).getReg();
/freebsd-10.2-release/contrib/llvm/lib/Target/R600/
H A DSIISelLowering.cpp348 unsigned SuperReg = MI->getOperand(0).getReg();
376 MI->getOperand(0).getReg())
377 .addReg(MI->getOperand(1).getReg())
378 .addReg(MI->getOperand(2).getReg())
984 unsigned Reg = cast<RegisterSDNode>(Op->getOperand(1))->getReg();
1336 unsigned VReg = MI->getOperand(0).getReg();
1398 cast<RegisterSDNode>(VReg)->getReg(), VT);
/freebsd-10.2-release/contrib/llvm/lib/CodeGen/AsmPrinter/
H A DDwarfCompileUnit.cpp496 addRegisterOp(Block, Location.getReg());
498 addRegisterOffset(Block, Location.getReg(), Location.getOffset());
523 addRegisterOffset(Block, Location.getReg(), DV.getAddrElement(1));
526 addRegisterOp(Block, Location.getReg());
528 addRegisterOffset(Block, Location.getReg(), Location.getOffset());
648 addRegisterOp(Block, Location.getReg());
650 addRegisterOffset(Block, Location.getReg(), Location.getOffset());
1809 MachineLocation Location(RegOp.getReg(),
1812 } else if (RegOp.getReg())
1813 addVariableAddress(DV, VariableDie, MachineLocation(RegOp.getReg()));
[all...]
/freebsd-10.2-release/contrib/llvm/lib/Target/ARM/
H A DThumb2InstrInfo.cpp488 (!HasCCOut || MI.getOperand(MI.getNumOperands()-1).getReg() == 0)) {
525 unsigned OffsetReg = MI.getOperand(FrameRegIdx+1).getReg();
/freebsd-10.2-release/contrib/llvm/utils/TableGen/
H A DFastISelEmitter.cpp86 static OpKind getReg() { OpKind K; K.Repr = OK_Reg; return K; }
278 Operands.push_back(OpKind::getReg());
419 PhysReg += Target.getRegBank().getReg(OpLeafRec)->getName();

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