/freebsd-10.2-release/contrib/llvm/lib/Target/R600/MCTargetDesc/ |
H A D | SIMCCodeEmitter.cpp | 88 Imm.I = MO.getImm(); 156 Imm.I = Op.getImm(); 196 return MO.getImm();
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/freebsd-10.2-release/contrib/llvm/lib/Target/SystemZ/ |
H A D | SystemZElimCompare.cpp | 177 if (MI->getOperand(2).getImm() != -1) 185 Branch->getOperand(0).getImm() != SystemZ::CCMASK_ICMP || 186 Branch->getOperand(1).getImm() != SystemZ::CCMASK_CMP_NE) 270 unsigned CCValid = MI->getOperand(FirstOpNum).getImm(); 271 unsigned CCMask = MI->getOperand(FirstOpNum + 1).getImm(); 284 unsigned CCMask = AlterMasks[I + 1]->getImm(); 314 Compare->getOperand(1).getImm() == 0); 394 assert((CCMask.getImm() & ~SystemZ::CCMASK_ICMP) == 0 &&
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/freebsd-10.2-release/contrib/llvm/lib/Target/Mips/ |
H A D | MipsAsmPrinter.cpp | 92 unsigned LabelId = (unsigned)MI->getOperand(0).getImm(); 390 O << "0x" << StringRef(utohexstr(MO.getImm())).lower(); 395 O << "0x" << StringRef(utohexstr(MO.getImm() & 0xffff)).lower(); 400 O << MO.getImm(); 405 O << MO.getImm() - 1; 411 int64_t Val = MO.getImm(); 427 unsigned Flags = FlagsOP.getImm(); 528 O << MO.getImm(); 572 O << (unsigned short int)MO.getImm(); 581 O << (unsigned short int)(unsigned char)MO.getImm(); [all...] |
/freebsd-10.2-release/contrib/llvm/lib/MC/ |
H A D | MCInst.cpp | 25 OS << "Imm:" << getImm();
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/freebsd-10.2-release/contrib/llvm/lib/Target/Hexagon/ |
H A D | HexagonAsmPrinter.cpp | 85 O << MO.getImm(); 180 if (Offset.getImm()) 181 O << " + #" << Offset.getImm(); 260 << MO2.getImm();
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H A D | HexagonPeephole.cpp | 161 if (Src1.getImm() != 0) 178 if (Src2.getImm() != 32) 320 Dst.ChangeToImmediate(Src.getImm()); 328 Dst.setImm(Src.getImm());
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H A D | HexagonSplitTFRCondSets.cpp | 141 addImm(MI->getOperand(3).getImm()); 162 addImm(MI->getOperand(2).getImm()); 187 int Immed1 = MI->getOperand(2).getImm(); 188 int Immed2 = MI->getOperand(3).getImm();
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H A D | HexagonInstrInfo.cpp | 84 MI->getOperand(1).isImm() && (MI->getOperand(1).getImm() == 0)) { 108 MI->getOperand(1).isImm() && (MI->getOperand(1).getImm() == 0)) { 133 if (!Cond.empty() && Cond[0].isImm() && Cond[0].getImm() == 0) { 405 Value = MI->getOperand(2).getImm(); 649 return isInt<12>(MI->getOperand(1).getImm()); 653 return isShiftedUInt<6,3>(MI->getOperand(1).getImm()); 658 return isShiftedUInt<6,2>(MI->getOperand(1).getImm()); 663 return isShiftedUInt<6,1>(MI->getOperand(1).getImm()); 668 return isUInt<6>(MI->getOperand(1).getImm()); 672 return isShiftedUInt<6,3>(MI->getOperand(2).getImm()); [all...] |
H A D | HexagonSplitConst32AndConst64.cpp | 123 int64_t ImmValue = MI->getOperand(1).getImm (); 134 int64_t ImmValue = MI->getOperand(1).getImm ();
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/freebsd-10.2-release/contrib/llvm/lib/Target/NVPTX/ |
H A D | NVPTXInstrInfo.h | 72 return MI.getOperand(2).getImm();
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H A D | NVPTXutil.cpp | 27 if (MI->getOperand(2).getImm() != NVPTX::PTXLdStInstCode::PARAM)
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/freebsd-10.2-release/contrib/llvm/lib/Target/XCore/InstPrinter/ |
H A D | XCoreInstPrinter.cpp | 80 O << Op.getImm();
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/freebsd-10.2-release/contrib/llvm/lib/Target/ARM/ |
H A D | ARMCodeEmitter.cpp | 260 int32_t Imm12 = MO1.getImm(); 302 int32_t Imm12 = MO1.getImm(); 434 return static_cast<unsigned>(MO.getImm()); 457 return static_cast<unsigned>(MO.getImm()); 633 unsigned CPI = MI.getOperand(0).getImm(); // CP instruction index. 734 assert(MO1.isImm() && ARM_AM::isSOImmTwoPartVal(MO1.getImm()) && 736 unsigned V1 = ARM_AM::getSOImmTwoPartFirst(MO1.getImm()); 737 unsigned V2 = ARM_AM::getSOImmTwoPartSecond(MO1.getImm()); 882 addPCLabel(MI.getOperand(2).getImm()); 892 addPCLabel(MI.getOperand(2).getImm()); [all...] |
H A D | ARMAsmPrinter.cpp | 187 int64_t Imm = MO.getImm(); 271 O << MI->getOperand(OpNum).getImm(); 295 O << ~(MI->getOperand(OpNum).getImm()); 300 O << (MI->getOperand(OpNum).getImm() & 0xffff); 341 unsigned Flags = FlagsOP.getImm(); 349 unsigned OpFlags = MI->getOperand(OpNum).getImm(); 352 Flags = MI->getOperand(OpNum).getImm(); 866 MCSymbol *JTISymbol = GetARMJTIPICJumpTableLabel2(JTI, MO2.getImm()); 911 MCSymbol *JTISymbol = GetARMJTIPICJumpTableLabel2(JTI, MO2.getImm()); 1047 Offset = -MI->getOperand(2).getImm(); [all...] |
H A D | ARMBaseRegisterInfo.cpp | 442 InstrOffs = MI->getOperand(Idx+1).getImm(); 448 InstrOffs = ARM_AM::getAM5Offset(OffOp.getImm()); 449 if (ARM_AM::getAM5Op(OffOp.getImm()) == ARM_AM::sub) 456 InstrOffs = ARM_AM::getAM2Offset(MI->getOperand(ImmIdx).getImm()); 457 if (ARM_AM::getAM2Op(MI->getOperand(ImmIdx).getImm()) == ARM_AM::sub) 463 InstrOffs = ARM_AM::getAM3Offset(MI->getOperand(ImmIdx).getImm()); 464 if (ARM_AM::getAM3Op(MI->getOperand(ImmIdx).getImm()) == ARM_AM::sub) 470 InstrOffs = MI->getOperand(ImmIdx).getImm(); 749 ? ARMCC::AL : (ARMCC::CondCodes)MI.getOperand(PIdx).getImm();
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/freebsd-10.2-release/contrib/llvm/lib/Target/R600/ |
H A D | R600ControlFlowFinalizer.cpp | 292 MI->getOperand(0).setImm(Addr + MI->getOperand(0).getImm()); 497 .addImm(Alu->getOperand(0).getImm()) 498 .addImm(Alu->getOperand(1).getImm()) 499 .addImm(Alu->getOperand(2).getImm()) 500 .addImm(Alu->getOperand(3).getImm()) 501 .addImm(Alu->getOperand(4).getImm()) 502 .addImm(Alu->getOperand(5).getImm()) 503 .addImm(Alu->getOperand(6).getImm()) 504 .addImm(Alu->getOperand(7).getImm()) 505 .addImm(Alu->getOperand(8).getImm()); [all...] |
H A D | R600ExpandSpecialInstrs.cpp | 92 uint64_t Flags = MI.getOperand(3).getImm(); 96 MI.getOperand(2).getImm(), // opcode 113 MI.getOperand(2).getImm()); 142 MI.getOperand(2).getImm()); 172 MI.getOperand(1).getImm());
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/freebsd-10.2-release/contrib/llvm/lib/Target/AArch64/AsmParser/ |
H A D | AArch64AsmParser.cpp | 250 const MCExpr *getImm() const { function in class:__anon2446::AArch64Operand 335 if (isNonConstantExpr(getImm(), Variant)) { 348 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm()); 358 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm()); 402 return cast<MCConstantExpr>(getImm())->getValue() == 1; 409 if (isNonConstantExpr(getImm(), Variant)) { 443 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm()); 603 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm()); 656 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm()); 686 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm()); [all...] |
/freebsd-10.2-release/contrib/llvm/lib/Target/X86/ |
H A D | X86AsmPrinter.cpp | 221 O << MO.getImm(); 256 O << MO.getImm(); 286 int DispVal = DispSpec.getImm(); 309 unsigned ScaleVal = MI->getOperand(Op+1).getImm(); 332 unsigned ScaleVal = MI->getOperand(Op+1).getImm(); 363 int64_t DispVal = DispSpec.getImm(); 425 O << MO.getImm(); 444 O << MO.getImm(); 477 O << -MO.getImm();
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/freebsd-10.2-release/contrib/llvm/lib/CodeGen/AsmPrinter/ |
H A D | AsmPrinterInlineAsm.cpp | 203 unsigned OpFlags = MI->getOperand(OpNo).getImm(); 214 unsigned OpFlags = MI->getOperand(OpNo).getImm(); 369 unsigned OpFlags = MI->getOperand(OpNo).getImm(); 380 unsigned OpFlags = MI->getOperand(OpNo).getImm(); 535 O << MO.getImm(); 540 O << -MO.getImm();
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/freebsd-10.2-release/contrib/llvm/lib/Target/PowerPC/ |
H A D | PPCInstrInfo.cpp | 117 if (MI->getOperand(1).isImm() && !MI->getOperand(1).getImm() && 141 if (MI->getOperand(1).isImm() && !MI->getOperand(1).getImm() && 163 if (MI->getOperand(3).getImm() != 0) 191 unsigned MB = MI->getOperand(4).getImm(); 192 unsigned ME = MI->getOperand(5).getImm(); 408 BuildMI(&MBB, DL, get(Cond[0].getImm() ? 413 .addImm(Cond[0].getImm()).addReg(Cond[1].getReg()).addMBB(TBB); 419 BuildMI(&MBB, DL, get(Cond[0].getImm() ? 424 .addImm(Cond[0].getImm()).addReg(Cond[1].getReg()).addMBB(TBB); 495 unsigned SelectPred = Cond[0].getImm(); [all...] |
/freebsd-10.2-release/contrib/llvm/lib/Target/ARM/AsmParser/ |
H A D | ARMAsmParser.cpp | 578 const MCExpr *getImm() const { function in class:__anon2479::ARMOperand 668 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm()); 675 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm()); 682 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm()); 689 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm()); 696 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm()); 703 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm()); 710 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm()); 718 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm()); 725 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm()); [all...] |
/freebsd-10.2-release/contrib/llvm/lib/Target/Mips/MCTargetDesc/ |
H A D | MipsMCCodeEmitter.cpp | 153 int64_t Shift = Inst.getOperand(2).getImm(); 192 int64_t pos = InstIn.getOperand(2).getImm(); 194 int64_t size = InstIn.getOperand(3).getImm(); 278 if (MO.isImm()) return MO.getImm() >> 2; 299 if (MO.isImm()) return MO.getImm() >> 1; 320 if (MO.isImm()) return MO.getImm()>>2; 337 if (MO.isImm()) return MO.getImm() >> 1; 473 return static_cast<unsigned>(MO.getImm());
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/freebsd-10.2-release/contrib/llvm/lib/CodeGen/ |
H A D | StackMaps.cpp | 35 IsAnyReg(MI->getOperand(getMetaIdx(CCPos)).getImm() == CallingConv::AnyReg) { 126 int64_t ID = MI.getOperand(0).getImm(); 137 int64_t ID = opers.getMetaOper(PatchPointOpers::IDPos).getImm(); 148 unsigned NArgs = opers.getMetaOper(PatchPointOpers::NArgPos).getImm();
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/freebsd-10.2-release/contrib/llvm/lib/Target/MSP430/ |
H A D | MSP430InstrInfo.cpp | 133 MSP430CC::CondCodes CC = static_cast<MSP430CC::CondCodes>(Cond[0].getImm()); 229 static_cast<MSP430CC::CondCodes>(I->getOperand(1).getImm()); 251 MSP430CC::CondCodes OldBranchCode = (MSP430CC::CondCodes)Cond[0].getImm(); 281 BuildMI(&MBB, DL, get(MSP430::JCC)).addMBB(TBB).addImm(Cond[0].getImm());
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