/freebsd-10.2-release/contrib/llvm/lib/Target/Hexagon/ |
H A D | HexagonVLIWPacketizer.cpp | 1291 I->getOperand(1).getImm() - 1299 I->getOperand(1).setImm(I->getOperand(1).getImm() - 1341 I->getOperand(1).setImm(I->getOperand(1).getImm() +
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/freebsd-10.2-release/contrib/llvm/lib/Target/Mips/ |
H A D | Mips16ISelLowering.cpp | 664 .addImm(MI->getOperand(4).getImm()); 714 int64_t imm = MI->getOperand(1).getImm(); 766 int64_t Imm = MI->getOperand(2).getImm();
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H A D | MipsSEISelDAGToDAG.cpp | 47 unsigned Mask = MI.getOperand(1).getImm(); 91 (MI.getOperand(2).getImm() == 0)) { 96 (MI.getOperand(2).getImm() == 0)) {
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H A D | MipsCodeEmitter.cpp | 253 return static_cast<unsigned>(MO.getImm());
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/freebsd-10.2-release/contrib/llvm/lib/Target/Mips/AsmParser/ |
H A D | MipsAsmParser.cpp | 362 const MCExpr *Expr = getImm(); 403 const MCExpr *getImm() const { function in class:__anon2528::MipsOperand 588 int MemOffset = Op.getImm(); 653 int ImmValue = ImmOp.getImm(); 699 int ImmValue = ImmOp.getImm(); 740 int ImmValue = ImmOp.getImm(); 785 ImmOffset = Inst.getOperand(2).getImm();
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/freebsd-10.2-release/contrib/llvm/lib/Target/R600/ |
H A D | R600ISelLowering.cpp | 197 MI->getOperand(1).getImm()); 203 MI->getOperand(1).getImm()); 224 unsigned TextureId = MI->getOperand(6).getImm(); 325 unsigned TextureId = MI->getOperand(6).getImm(); 459 unsigned InstExportType = MI->getOperand(1).getImm(); 466 .getImm();
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/freebsd-10.2-release/contrib/llvm/lib/CodeGen/ |
H A D | MachineVerifier.cpp | 743 if (!isUInt<5>(MI->getOperand(1).getImm())) 755 NumOps = 1 + InlineAsm::getNumOperandRegisters(MO.getImm()); 1681 int Size = I->getOperand(0).getImm(); 1693 int Size = I->getOperand(0).getImm();
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H A D | RegAllocFast.cpp | 302 uint64_t Offset = IsIndirect ? DBG->getOperand(1).getImm() : 0; 863 uint64_t Offset = IsIndirect ? MI->getOperand(1).getImm() : 0;
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H A D | TargetInstrInfo.cpp | 232 MO.setImm(Pred[j].getImm());
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H A D | TwoAddressInstructionPass.cpp | 1571 unsigned SubIdx = mi->getOperand(3).getImm(); 1627 unsigned SubIdx = MI->getOperand(i+1).getImm();
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/freebsd-10.2-release/contrib/llvm/lib/Target/AArch64/ |
H A D | AArch64BranchFixupPass.cpp | 494 A64CC::CondCodes CC = (A64CC::CondCodes)MI->getOperand(0).getImm();
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/freebsd-10.2-release/contrib/llvm/lib/Target/ARM/ |
H A D | ARMBaseInstrInfo.h | 79 return PIdx != -1 ? (ARMCC::CondCodes)MI->getOperand(PIdx).getImm()
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H A D | Thumb1FrameLowering.cpp | 60 unsigned Amount = Old->getOperand(0).getImm();
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H A D | Thumb1RegisterInfo.cpp | 358 Offset += MI.getOperand(FrameRegIdx+1).getImm(); 443 int InstrOffs = MI.getOperand(ImmIdx).getImm();
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H A D | ARMLoadStoreOptimizer.cpp | 634 (MI->getOperand(2).getImm()*Scale) == Bytes && 667 (MI->getOperand(2).getImm()*Scale) == Bytes && 940 if (MI->getOperand(2).getImm() != 0) 942 if (isAM5 && ARM_AM::getAM5Offset(MI->getOperand(2).getImm()) != 0) 1132 unsigned OffField = MI->getOperand(NumOperands-3).getImm();
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/freebsd-10.2-release/contrib/llvm/include/llvm/CodeGen/ |
H A D | MachineInstrBuilder.h | 198 return addImm(Disp.getImm() + off);
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H A D | MachineOperand.h | 402 int64_t getImm() const { function in class:llvm::MachineOperand
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/freebsd-10.2-release/contrib/llvm/lib/Target/PowerPC/ |
H A D | PPCFrameLowering.cpp | 744 int StackAdj = StackAdjust.getImm(); 857 BuildMI(MBB, MBBI, dl, TII.get(PPC::TAILBA)).addImm(JumpTarget.getImm()); 870 BuildMI(MBB, MBBI, dl, TII.get(PPC::TAILBA8)).addImm(JumpTarget.getImm()); 1305 if (int CalleeAmt = I->getOperand(1).getImm()) {
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/freebsd-10.2-release/contrib/llvm/lib/Target/SystemZ/AsmParser/ |
H A D | SystemZAsmParser.cpp | 198 const MCExpr *getImm() const { function in class:__anon2620::SystemZOperand 241 addExpr(Inst, getImm());
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/freebsd-10.2-release/contrib/llvm/lib/Target/X86/ |
H A D | X86InstrInfo.cpp | 1506 MI->getOperand(Op+1).getImm() == 1 && 1508 MI->getOperand(Op+3).getImm() == 0) { 1835 unsigned Imm = MI->getOperand(ShiftAmtOperandIdx).getImm(); 1965 unsigned ShAmt = MI->getOperand(2).getImm(); 1982 addRegOffset(MIB, leaInReg, true, MI->getOperand(2).getImm()); 2076 unsigned M = MI->getOperand(3).getImm(); 2088 unsigned M = MI->getOperand(3).getImm(); 2288 MI->getOperand(2).getImm()); 2310 NewMI = addOffset(MIB, MI->getOperand(2).getImm()); 2322 MI->getOperand(2).getImm()); [all...] |
/freebsd-10.2-release/contrib/llvm/lib/CodeGen/AsmPrinter/ |
H A D | DwarfCompileUnit.cpp | 753 addSInt(Die, dwarf::DW_AT_const_value, dwarf::DW_FORM_sdata, MO.getImm()); 773 addUInt(Die, dwarf::DW_AT_const_value, Form, MO.getImm()); 776 addUInt(Die, dwarf::DW_AT_const_value, Form, MO.getImm()); 1810 DVInsn->getOperand(1).getImm());
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/freebsd-10.2-release/contrib/llvm/lib/MC/ |
H A D | MCModuleYAML.cpp | 222 Out << "I" << Val.MCOp.getImm();
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/freebsd-10.2-release/contrib/llvm/lib/Target/NVPTX/ |
H A D | NVPTXAsmPrinter.cpp | 342 MCOp = MCOperand::CreateImm(MO.getImm()); 651 int Imm = (int) MO.getImm(); 2074 O << MO.getImm(); 2123 MI->getOperand(opNum + 1).getImm() == 0)
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/freebsd-10.2-release/contrib/llvm/lib/Target/SystemZ/ |
H A D | SystemZFrameLowering.cpp | 434 uint64_t Offset = StackSize + MBBI->getOperand(AddrOpNo + 1).getImm();
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/freebsd-10.2-release/contrib/llvm/lib/Target/XCore/ |
H A D | XCoreFrameLowering.cpp | 343 uint64_t Amount = Old->getOperand(0).getImm();
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