Searched refs:SmallVectorImpl (Results 51 - 75 of 582) sorted by relevance

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/freebsd-10.2-release/contrib/llvm/include/llvm/ADT/
H A DSmallVector.h367 /// SmallVectorImpl - This class consists of common code factored out of the
371 class SmallVectorImpl : public SmallVectorTemplateBase<T, isPodLike<T>::value> { class in namespace:llvm
374 SmallVectorImpl(const SmallVectorImpl&) LLVM_DELETED_FUNCTION;
381 explicit SmallVectorImpl(unsigned N) function in class:llvm::SmallVectorImpl
386 ~SmallVectorImpl() {
440 void swap(SmallVectorImpl &RHS);
674 SmallVectorImpl &operator=(const SmallVectorImpl &RHS);
677 SmallVectorImpl
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/freebsd-10.2-release/contrib/llvm/tools/clang/include/clang/Basic/
H A DLLVM.h35 template<typename T> class SmallVectorImpl;
69 using llvm::SmallVectorImpl;
/freebsd-10.2-release/contrib/llvm/lib/CodeGen/
H A DCallingConvLower.cpp27 const TargetMachine &tm, SmallVectorImpl<CCValAssign> &locs,
67 CCState::AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins,
86 bool CCState::CheckReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
100 void CCState::AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
118 void CCState::AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
136 void CCState::AnalyzeCallOperands(SmallVectorImpl<MVT> &ArgVTs,
137 SmallVectorImpl<ISD::ArgFlagsTy> &Flags,
155 void CCState::AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins,
/freebsd-10.2-release/contrib/llvm/include/llvm/Analysis/
H A DPHITransAddr.h88 SmallVectorImpl<Instruction*> &NewInsts);
107 SmallVectorImpl<Instruction*> &NewInsts);
/freebsd-10.2-release/contrib/llvm/include/llvm/CodeGen/
H A DAnalysis.h57 SmallVectorImpl<EVT> &ValueVTs,
58 SmallVectorImpl<uint64_t> *Offsets = 0,
H A DLiveRangeEdit.h61 SmallVectorImpl<unsigned> &NewRegs;
92 bool foldAsLoad(LiveInterval *LI, SmallVectorImpl<MachineInstr*> &Dead);
115 SmallVectorImpl<unsigned> &newRegs,
136 typedef SmallVectorImpl<unsigned>::const_iterator iterator;
219 void eliminateDeadDefs(SmallVectorImpl<MachineInstr*> &Dead,
H A DRegisterScavenging.h134 for (SmallVectorImpl<ScavengedInfo>::const_iterator I = Scavenged.begin(),
143 void getScavengingFrameIndices(SmallVectorImpl<int> &A) const {
144 for (SmallVectorImpl<ScavengedInfo>::const_iterator I = Scavenged.begin(),
H A DLexicalScopes.h123 void extractLexicalScopes(SmallVectorImpl<InsnRange> &MIRanges,
126 void assignInstructionRanges(SmallVectorImpl<InsnRange> &MIRanges,
174 SmallVectorImpl<LexicalScope *> &getChildren() { return Children; }
175 SmallVectorImpl<InsnRange> &getRanges() { return Ranges; }
/freebsd-10.2-release/contrib/llvm/include/llvm/IR/
H A DLLVMContext.h30 template <typename T> class SmallVectorImpl;
61 void getMDKindNames(SmallVectorImpl<StringRef> &Result) const;
/freebsd-10.2-release/contrib/llvm/include/llvm/Target/
H A DTargetSubtargetInfo.h29 template <typename T> class SmallVectorImpl;
46 typedef SmallVectorImpl<const TargetRegisterClass*> RegClassVector;
/freebsd-10.2-release/contrib/llvm/lib/Target/NVPTX/
H A DNVPTXInstrInfo.h66 SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const;
70 const SmallVectorImpl<MachineOperand> &Cond, DebugLoc DL) const;
/freebsd-10.2-release/contrib/llvm/lib/Target/R600/
H A DAMDGPUInstrInfo.h97 const SmallVectorImpl<unsigned> &Ops,
101 const SmallVectorImpl<unsigned> &Ops,
113 const SmallVectorImpl<unsigned> &Ops) const;
116 SmallVectorImpl<MachineInstr *> &NewMIs) const;
118 SmallVectorImpl<SDNode *> &NewNodes) const;
126 bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const;
130 bool SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1,
131 const SmallVectorImpl<MachineOperand> &Pred2) const;
H A DAMDGPUISelLowering.h29 SmallVectorImpl<SDValue> &Args,
69 const SmallVectorImpl<ISD::InputArg> &Ins,
70 SmallVectorImpl<ISD::InputArg> &OrigIns) const;
72 const SmallVectorImpl<ISD::InputArg> &Ins) const;
83 const SmallVectorImpl<ISD::OutputArg> &Outs,
84 const SmallVectorImpl<SDValue> &OutVals,
87 SmallVectorImpl<SDValue> &InVals) const {
/freebsd-10.2-release/contrib/llvm/lib/Target/Sparc/
H A DSparcInstrInfo.h68 SmallVectorImpl<MachineOperand> &Cond,
75 const SmallVectorImpl<MachineOperand> &Cond,
/freebsd-10.2-release/contrib/llvm/lib/Target/SystemZ/AsmParser/
H A DSystemZAsmParser.cpp317 parseRegister(SmallVectorImpl<MCParsedAsmOperand*> &Operands,
325 parseAddress(SmallVectorImpl<MCParsedAsmOperand*> &Operands,
329 bool parseOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands,
348 SmallVectorImpl<MCParsedAsmOperand*> &Operands)
352 SmallVectorImpl<MCParsedAsmOperand*> &Operands,
358 parseGR32(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
362 parseGRH32(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
366 parseGRX32(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
370 parseGR64(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
374 parseGR128(SmallVectorImpl<MCParsedAsmOperan
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/freebsd-10.2-release/contrib/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.h217 const SmallVectorImpl<ISD::InputArg> &Ins,
219 SmallVectorImpl<SDValue> &InVals) const;
223 const SmallVectorImpl<ISD::OutputArg> &Outs,
224 const SmallVectorImpl<SDValue> &OutVals,
228 SmallVectorImpl<SDValue> &InVals) const;
232 const SmallVectorImpl<ISD::InputArg> &Ins,
234 SmallVectorImpl<SDValue> &InVals) const;
254 const SmallVectorImpl<ISD::OutputArg> &Outs,
255 const SmallVectorImpl<SDValue> &OutVals,
256 const SmallVectorImpl<IS
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/freebsd-10.2-release/contrib/llvm/lib/Target/Mips/
H A DMipsISelLowering.h220 SmallVectorImpl<SDValue> &Results,
229 virtual void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results,
324 getOpndList(SmallVectorImpl<SDValue> &Ops,
350 void analyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
354 void analyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins,
358 void analyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins,
362 void analyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
383 typedef SmallVectorImpl<ByValArgInfo>::const_iterator byval_iterator;
415 void analyzeReturn(const SmallVectorImpl<Ty> &RetVals, bool IsSoftFloat,
458 const SmallVectorImpl<IS
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H A DMipsInstrInfo.cpp73 SmallVectorImpl<MachineOperand> &Cond) const {
89 SmallVectorImpl<MachineOperand> &Cond,
99 const SmallVectorImpl<MachineOperand>& Cond)
119 const SmallVectorImpl<MachineOperand> &Cond,
175 ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const
185 MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond,
187 SmallVectorImpl<MachineInstr*> &BranchInstrs) const {
/freebsd-10.2-release/contrib/llvm/lib/Target/Mips/AsmParser/
H A DMipsAsmParser.cpp72 SmallVectorImpl<MCParsedAsmOperand *> &Operands,
80 SmallVectorImpl<MCParsedAsmOperand *> &Operands);
85 parseRegs(SmallVectorImpl<MCParsedAsmOperand *> &Operands, int RegKind);
88 parseMSARegs(SmallVectorImpl<MCParsedAsmOperand *> &Operands, int RegKind);
91 parseMSACtrlRegs(SmallVectorImpl<MCParsedAsmOperand *> &Operands,
95 parseMemOperand(SmallVectorImpl<MCParsedAsmOperand *> &Operands);
97 bool parsePtrReg(SmallVectorImpl<MCParsedAsmOperand *> &Operands,
101 parsePtrReg(SmallVectorImpl<MCParsedAsmOperand *> &Operands);
104 parseGPR32(SmallVectorImpl<MCParsedAsmOperand *> &Operands);
107 parseGPR64(SmallVectorImpl<MCParsedAsmOperan
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/freebsd-10.2-release/contrib/llvm/tools/clang/lib/ARCMigrate/
H A DTransProtectedScope.cpp27 SmallVectorImpl<DeclRefExpr *> &Refs;
30 LocalRefsCollector(SmallVectorImpl<DeclRefExpr *> &refs)
57 SmallVectorImpl<CaseInfo> &Cases;
60 CaseCollector(ParentMap &PMap, SmallVectorImpl<CaseInfo> &Cases)
116 SmallVectorImpl<StoredDiagnostic>::iterator
129 SmallVectorImpl<StoredDiagnostic>::iterator &DiagI,
130 SmallVectorImpl<StoredDiagnostic>::iterator DiagE){
/freebsd-10.2-release/contrib/llvm/lib/Target/Hexagon/
H A DHexagonCallingConvLower.cpp28 SmallVectorImpl<CCValAssign> &locs,
66 Hexagon_CCState::AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg>
94 Hexagon_CCState::AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
131 Hexagon_CCState::AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg>
161 Hexagon_CCState::AnalyzeCallOperands(SmallVectorImpl<EVT> &ArgVTs,
162 SmallVectorImpl<ISD::ArgFlagsTy> &Flags,
180 Hexagon_CCState::AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins,
/freebsd-10.2-release/contrib/llvm/tools/clang/include/clang/Serialization/
H A DModuleManager.h99 typedef SmallVectorImpl<ModuleFile*>::iterator ModuleIterator;
100 typedef SmallVectorImpl<ModuleFile*>::const_iterator ModuleConstIterator;
101 typedef SmallVectorImpl<ModuleFile*>::reverse_iterator ModuleReverseIterator;
/freebsd-10.2-release/contrib/llvm/lib/Target/
H A DMangler.cpp29 void Mangler::getNameWithPrefix(SmallVectorImpl<char> &OutName,
69 static void AddFastCallStdCallSuffix(SmallVectorImpl<char> &OutName,
90 void Mangler::getNameWithPrefix(SmallVectorImpl<char> &OutName,
/freebsd-10.2-release/contrib/llvm/tools/clang/include/clang/Driver/
H A DTypes.h81 llvm::SmallVectorImpl<phases::ID> &Phases);
/freebsd-10.2-release/contrib/llvm/lib/Target/R600/MCTargetDesc/
H A DR600MCCodeEmitter.cpp47 SmallVectorImpl<MCFixup> &Fixups) const;
51 SmallVectorImpl<MCFixup> &Fixups) const;
90 SmallVectorImpl<MCFixup> &Fixups) const {
171 SmallVectorImpl<MCFixup> &Fixup) const {

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