Searched refs:OS_REG_READ (Results 76 - 100 of 106) sorted by relevance

12345

/freebsd-10-stable/sys/dev/ath/ath_hal/ar5212/
H A Dar5212_ani.c690 __func__, OS_REG_READ(ah, AR_MIBC),
691 OS_REG_READ(ah, AR_PHYCNT1), OS_REG_READ(ah, AR_PHYCNT2),
692 OS_REG_READ(ah, AR_FILTOFDM), OS_REG_READ(ah, AR_FILTCCK));
704 phyCnt1 = OS_REG_READ(ah, AR_PHYCNT1);
705 phyCnt2 = OS_REG_READ(ah, AR_PHYCNT2);
952 phyCnt1 = OS_REG_READ(ah, AR_PHYCNT1);
953 phyCnt2 = OS_REG_READ(ah, AR_PHYCNT2);
H A Dar5212_keycache.c55 uint32_t val = OS_REG_READ(ah, AR_KEYTABLE_MAC1(entry));
75 keyType = OS_REG_READ(ah, AR_KEYTABLE_TYPE(entry));
H A Dar5212_attach.c190 val = (OS_REG_READ(ah, AR_PHY(256)) >> 24) & 0xff;
352 val = OS_REG_READ(ah, AR_SREV) & AR_SREV_ID;
376 AH_PRIVATE(ah)->ah_phyRev = OS_REG_READ(ah, AR_PHY_CHIP_ID);
467 val = OS_REG_READ(ah, AR_PCICFG);
615 regHold[i] = OS_REG_READ(ah, addr);
619 rdData = OS_REG_READ(ah, addr);
630 rdData = OS_REG_READ(ah, addr);
H A Dar2316.c79 OS_REG_WRITE(ah, 0xa358, (OS_REG_READ(ah, 0xa358) & ~0x2));
120 txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL);
532 pdGainOverlap_t2 = (uint16_t) SM(OS_REG_READ(ah, AR_PHY_TPCRG5),
550 tpcrg1 = OS_REG_READ(ah, AR_PHY_TPCRG1);
568 if (tpcrg1 != OS_REG_READ(ah, AR_PHY_TPCRG1))
571 __func__, OS_REG_READ(ah, AR_PHY_TPCRG1), tpcrg1);
H A Dar2317.c97 txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL);
510 pdGainOverlap_t2 = (uint16_t) SM(OS_REG_READ(ah, AR_PHY_TPCRG5),
528 tpcrg1 = OS_REG_READ(ah, AR_PHY_TPCRG1);
546 if (tpcrg1 != OS_REG_READ(ah, AR_PHY_TPCRG1))
549 __func__, OS_REG_READ(ah, AR_PHY_TPCRG1), tpcrg1);
H A Dar2413.c107 txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL);
527 pdGainOverlap_t2 = (uint16_t) SM(OS_REG_READ(ah, AR_PHY_TPCRG5),
545 tpcrg1 = OS_REG_READ(ah, AR_PHY_TPCRG1);
563 if (tpcrg1 != OS_REG_READ(ah, AR_PHY_TPCRG1))
566 __func__, OS_REG_READ(ah, AR_PHY_TPCRG1), tpcrg1);
H A Dar5413.c107 txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL);
571 pdGainOverlap_t2 = (uint16_t) SM(OS_REG_READ(ah, AR_PHY_TPCRG5),
589 tpcrg1 = OS_REG_READ(ah, AR_PHY_TPCRG1);
607 if (tpcrg1 != OS_REG_READ(ah, AR_PHY_TPCRG1))
610 __func__, OS_REG_READ(ah, AR_PHY_TPCRG1), tpcrg1);
H A Dar5212_rfgain.c291 rddata = OS_REG_READ(ah, AR_PHY_PAPD_PROBE);
/freebsd-10-stable/sys/dev/ath/ath_hal/ar9002/
H A Dar9285_attach.c214 val = OS_REG_READ(ah, AR_SREV);
256 AH_PRIVATE(ah)->ah_phyRev = OS_REG_READ(ah, AR_PHY_CHIP_ID);
375 OS_REG_WRITE(ah, AR_MISC_MODE, OS_REG_READ(ah, AR_MISC_MODE) | ahp->ah_miscMode);
439 val = OS_REG_READ(ah, AR_WA);
H A Dar9287_attach.c196 val = OS_REG_READ(ah, AR_SREV);
248 AH_PRIVATE(ah)->ah_phyRev = OS_REG_READ(ah, AR_PHY_CHIP_ID);
344 OS_REG_WRITE(ah, AR_MISC_MODE, OS_REG_READ(ah, AR_MISC_MODE) | ahp->ah_miscMode);
H A Dar9287_reset.c64 pdGainOverlap_t2 = (uint16_t)(MS(OS_REG_READ(ah, AR_PHY_TPCRG5),
495 (OS_REG_READ(ah, AR_PHY_TIMING_CTRL4_CHAIN(0)
544 regval = OS_REG_READ(ah, AR9287_AN_RF2G3_CH0);
561 regval = OS_REG_READ(ah, AR9287_AN_RF2G3_CH1);
H A Dar9280_attach.c228 val = OS_REG_READ(ah, AR_SREV);
265 AH_PRIVATE(ah)->ah_phyRev = OS_REG_READ(ah, AR_PHY_CHIP_ID);
399 OS_REG_WRITE(ah, AR_MISC_MODE, OS_REG_READ(ah, AR_MISC_MODE) | ahp->ah_miscMode);
447 val = OS_REG_READ(ah, AR_WA);
657 tmp = OS_REG_READ(ah, AR_PHY_TIMING_CTRL4_CHAIN(0));
/freebsd-10-stable/sys/dev/ath/ath_hal/ar5416/
H A Dar5416_xmit.c56 OS_REG_READ(ah, AR_QSTS(q)), OS_REG_READ(ah, AR_Q_TXE),
57 OS_REG_READ(ah, AR_Q_TXD), OS_REG_READ(ah, AR_QCBRCFG(q)));
60 __func__, OS_REG_READ(ah, AR_QMISC(q)),
61 OS_REG_READ(ah, AR_QRDYTIMECFG(q)),
62 OS_REG_READ(ah, AR_Q_RDYTIMESHDN));
77 uint32_t tsfLow = OS_REG_READ(ah, AR_TSF_L32);
84 if ((OS_REG_READ(ah, AR_TSF_L32)>>10) == (tsfLow>>10))
844 return MS(OS_REG_READ(a
[all...]
H A Dar5416_beacon.c37 return OS_REG_READ(ah, AR_NEXT_TBTT);
136 val = OS_REG_READ(ah, AR_STA_ID1);
H A Dar5416_cal.c403 if (!(OS_REG_READ(ah, AR_PHY_TIMING_CTRL4) & AR_PHY_TIMING_CTRL4_DO_CAL)) {
630 val = OS_REG_READ(ah, ar5416_cca_regs[i]);
657 OS_REG_READ(ah, AR_PHY_AGC_CONTROL));
674 val = OS_REG_READ(ah, ar5416_cca_regs[i]);
H A Dar5416_attach.c289 val = (OS_REG_READ(ah, AR_PHY(256)) >> 24) & 0xff;
340 val = OS_REG_READ(ah, AR_SREV) & AR_SREV_ID;
384 AH_PRIVATE(ah)->ah_phyRev = OS_REG_READ(ah, AR_PHY_CHIP_ID);
458 OS_REG_WRITE(ah, AR_MISC_MODE, OS_REG_READ(ah, AR_MISC_MODE) | ahp->ah_miscMode);
686 tmp = OS_REG_READ(ah, AR_PHY_TIMING_CTRL4_CHAIN(0));
H A Dar5416_btcoex.c276 val = OS_REG_READ(ah, AR9271_CLOCK_CONTROL);
/freebsd-10-stable/sys/dev/ath/ath_hal/ar9001/
H A Dar9130_attach.c145 val = OS_REG_READ(ah, AR_SREV_CHIP_HOWL) & AR_SREV_CHIP_HOWL_ID;
178 AH_PRIVATE(ah)->ah_phyRev = OS_REG_READ(ah, AR_PHY_CHIP_ID);
/freebsd-10-stable/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300_freebsd.c53 u_int clks = OS_REG_READ(ah, AR_D_GBL_IFS_SLOT) & 0xffff;
627 val = OS_REG_READ(ah, AR_MCAST_FIL1);
630 val = OS_REG_READ(ah, AR_MCAST_FIL0);
647 val = OS_REG_READ(ah, AR_MCAST_FIL1);
650 val = OS_REG_READ(ah, AR_MCAST_FIL0);
H A Dar9300_eeprom.c230 (void) OS_REG_READ(ah, AR9300_EEPROM_OFFSET + (off << AR9300_EEPROM_S));
238 *data = MS(OS_REG_READ(ah,
263 (void) OS_REG_READ(ah, addr);
272 status = ((OS_REG_READ(ah, addr) & 0x7) == 0x4) ? 1 : 0;
286 *data = OS_REG_READ(ah, addr);
1335 reg_pmu1 = OS_REG_READ(ah, reg_PMU1);
1339 reg_pmu1 = OS_REG_READ(ah, reg_PMU1);
1343 (OS_REG_READ(ah, reg_PMU2) & (~0xFFC00000)) | (4 << 26);
1345 reg_pmu2 = OS_REG_READ(ah, reg_PMU2);
1349 reg_pmu2 = OS_REG_READ(a
[all...]
H A Dar9300_attach.c104 val = OS_REG_READ(ah, PCIE_CO_ERR_CTR_CTRL);
139 val = OS_REG_READ(ah, PCIE_CO_ERR_CTR_CTR0);
145 val = OS_REG_READ(ah, PCIE_CO_ERR_CTR_CTR1);
158 val = OS_REG_READ(ah, PCIE_CO_ERR_CTR_CTRL);
553 val = OS_REG_READ(ah, AR_HOSTIF_REG(ah, AR_SREV));
695 ahp->ah_wa_reg_val = OS_REG_READ(ah, AR_HOSTIF_REG(ah, AR_WA));
834 AH_PRIVATE(ah)->ah_phyRev = OS_REG_READ(ah, AR_PHY_CHIP_ID);
2212 ahp->ah_enterprise_mode = OS_REG_READ(ah, AR_ENT_OTP);
2267 OS_REG_READ(ah, AR_HOSTIF_REG(ah, AR_PCIE_PM_CTRL)) |
2270 AR_WOW_CLEAR_EVENTS(OS_REG_READ(a
[all...]
H A Deeprom.diff32 *data = OS_REG_READ(ah, addr);
/freebsd-10-stable/sys/dev/ath/ath_hal/ar5210/
H A Dar5210_keycache.c46 uint32_t val = OS_REG_READ(ah, AR_KEYTABLE_MAC1(entry));
/freebsd-10-stable/sys/dev/ath/ath_hal/ar5211/
H A Dar5211_keycache.c50 uint32_t val = OS_REG_READ(ah, AR_KEYTABLE_MAC1(entry));
/freebsd-10-stable/sys/dev/ath/ath_hal/
H A Dah.c238 if ((OS_REG_READ(ah, reg) & mask) == val)
244 __func__, reg, OS_REG_READ(ah, reg), mask, val);
856 *dp++ = OS_REG_READ(ah, r);
1362 OS_REG_WRITE(ah, AR_TSF_L32, OS_REG_READ(ah, AR_TSF_L32) + tsfdelta);

Completed in 115 milliseconds

12345