| /barrelfish-master/lib/openssl-1.0.0d/crypto/des/times/ |
| H A D | aix.cc | 16 4 r1 p 253052.15 92.0%
18 4 r1 i 240556.66 87.4%
22 16 r1 p 208332.83 75.7%
23 16 r1 i 199206.50 72.4%
|
| H A D | usparc.cc | 18 16 r1 p 475516.90 100.0%
23 4 r1 p 404266.90 85.0%
26 4 r1 i 362742.20 76.3%
28 16 r1 i 324730.60 68.3%
|
| /barrelfish-master/lib/compiler-rt/builtins/arm/ |
| H A D | muldf3vfp.S | 23 vmov d6, r0, r1 // move first param from r0/r1 pair into d6
26 vmov r0, r1, d6 // move result back to r0/r1 pair
|
| H A D | divdf3vfp.S | 23 vmov d6, r0, r1 // move first param from r0/r1 pair into d6
26 vmov r0, r1, d5 // move result back to r0/r1 pair
|
| H A D | subdf3vfp.S | 23 vmov d6, r0, r1 // move first param from r0/r1 pair into d6
26 vmov r0, r1, d6 // move result back to r0/r1 pair
|
| H A D | adddf3vfp.S | 22 vmov d6, r0, r1 // move first param from r0/r1 pair into d6
25 vmov r0, r1, d6 // move result back to r0/r1 pair
|
| H A D | addsf3.S | 30 lsls r3, r1, #1
49 movs r0, r1
51 movs r1, r4
58 lsls r5, r1, #(typeWidth - significandBits)
107 eors r7, r1
140 movs r1, r4
149 ands r1, r2
152 cmp r1, #0x4
160 movs r1, r0
161 lsrs r1, #
[all...] |
| H A D | extendsfdf2vfp.S | 26 vmov r0, r1, d7 // return result in r0/r1 pair
|
| H A D | fixdfsivfp.S | 25 vmov d7, r0, r1 // load double register from R0/R1
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| H A D | fixunsdfsivfp.S | 26 vmov d7, r0, r1 // load double register from R0/R1
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| H A D | floatsidfvfp.S | 27 vmov r0, r1, d7 // move d7 to result register pair r0/r1
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| H A D | floatunssidfvfp.S | 27 vmov r0, r1, d7 // move d7 to result register pair r0/r1
|
| H A D | mulsf3vfp.S | 24 vmov s15, r1 // move second param from r1 into float register
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| H A D | divsf3vfp.S | 24 vmov s15, r1 // move second param from r1 into float register
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| H A D | subsf3vfp.S | 25 vmov s15, r1 // move second param from r1 into float register
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| H A D | addsf3vfp.S | 24 vmov s15, r1 // move second param from r1 into float register
|
| H A D | truncdfsf2vfp.S | 24 vmov d7, r0, r1 // load double from r0/r1 pair
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| /barrelfish-master/lib/crt/arch/arm/ |
| H A D | crt0.S | 24 mov r1, #0
35 mov r1, #1
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| /barrelfish-master/lib/libc/arm/aeabi/ |
| H A D | aeabi_asm_float.S | 51 mov r5, r1
63 mov r1, r5
84 mov r0, r1
85 mov r1, ip
97 push {r0, r1, r2, lr}
100 pop {r0, r1, r2, lr}
|
| H A D | aeabi_vfp_double.S | 38 LOAD_DREG(d0, r0, r1)
47 LOAD_DREG(d0, r0, r1)
56 LOAD_DREG(d0, r0, r1)
65 LOAD_DREG(d0, r0, r1)
77 LOAD_DREG(d0, r0, r1)
89 LOAD_DREG(d0, r0, r1)
101 LOAD_DREG(d0, r0, r1)
113 LOAD_DREG(d0, r0, r1)
125 LOAD_DREG(d0, r0, r1)
137 LOAD_DREG(d0, r0, r1)
[all...] |
| H A D | aeabi_vfp_float.S | 38 LOAD_SREGS(s0, s1, r0, r1)
46 LOAD_SREGS(s0, s1, r0, r1)
54 LOAD_SREGS(s0, s1, r0, r1)
62 LOAD_SREGS(s0, s1, r0, r1)
73 LOAD_SREGS(s0, s1, r0, r1)
84 LOAD_SREGS(s0, s1, r0, r1)
95 LOAD_SREGS(s0, s1, r0, r1)
106 LOAD_SREGS(s0, s1, r0, r1)
117 LOAD_SREGS(s0, s1, r0, r1)
147 UNLOAD_DREG(r0, r1, d
[all...] |
| H A D | aeabi_asm_double.S | 51 mov r5, r1
65 mov r1, r5
92 mov ip, r1
93 mov r1, r3
106 push {r0, r1, r2, r3, r4, lr}
109 pop {r0, r1, r2, r3, r4, lr}
|
| /barrelfish-master/lib/libc/arm/string/ |
| H A D | memcmp.S | 81 eorsne r3, ip, r1
88 sub r3, r1, #0x05
96 ldrb r3, [r1], #0x01
104 ldrb r3, [r1], #0x01
112 ldrb r3, [r1], #0x01
123 ldr r3, [r1], #0x04
136 sub r1, r1, #0x04
142 ldrb r3, [r1], #0x01
158 ldrb r3, [r1, #
[all...] |
| H A D | memmove.S | 45 eor r0, r1, r0
46 eor r1, r0, r1
47 eor r0, r1, r0
50 cmp r0, r1
54 subcc r3, r0, r1 /* if (dst > src) r3 = dst - src */
55 subcs r3, r1, r0 /* if (src > dsr) r3 = src - dst */
60 cmp r1, r0
73 ands r12, r1, #3
87 ldmia r1!, {r
[all...] |
| /barrelfish-master/kernel/arch/armv7/ |
| H A D | exceptions.S | 230 ands r1, r3, #ARM_MODE_PRIV
235 disp_is_disabled r2, r0, r1 // r1 = 1 if disabled, else 0
236 cmp r1, #0
237 addeq r1, r2, #OFFSETOF_DISP_ENABLED_AREA
238 addne r1, r2, #OFFSETOF_DISP_TRAP_AREA
239 save_context r1, r3 // r1 = save area
246 sub r1, lr, #4 // r1
[all...] |