/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/mips/alchemy/common/ |
H A D | sleeper.S | 49 mfc0 k0, CP0_STATUS 50 sw k0, 0x20(sp) 51 mfc0 k0, CP0_CONTEXT 52 sw k0, 0x1c(sp) 53 mfc0 k0, CP0_PAGEMASK 54 sw k0, 0x18(sp) 55 mfc0 k0, CP0_CONFIG 56 sw k0, 0x14(sp) 71 la k0, alchemy_sleep_wakeup /* resume path */ 72 sw k0, [all...] |
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/mips/alchemy/common/ |
H A D | sleeper.S | 49 mfc0 k0, CP0_STATUS 50 sw k0, 0x20(sp) 51 mfc0 k0, CP0_CONTEXT 52 sw k0, 0x1c(sp) 53 mfc0 k0, CP0_PAGEMASK 54 sw k0, 0x18(sp) 55 mfc0 k0, CP0_CONFIG 56 sw k0, 0x14(sp) 71 la k0, alchemy_sleep_wakeup /* resume path */ 72 sw k0, [all...] |
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/mips/cpu/sb1250/src/ |
H A D | sb1250_cpu.S | 140 move k0,ra /* will be trashing RA */ 195 move ra,k0 /* saved return address */ 216 move k0,ra 224 move ra,k0 395 dmfc0 k0,C0_TLBHI 397 dmfc0 k0,C0_CTEXT # Get context 398 dsra k0,8 # keep hi part 399 and k0,0x1FFF # of VPN2 401 beq k0,k1,1f # 404 beq k0,k [all...] |
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/mips/cpu/rm5200/src/ |
H A D | rm5200_cpu.S | 218 move k0,ra /* will be trashing RA */ 246 move ra,k0 /* saved return address */ 267 move k0,ra 275 move ra,k0 381 dmfc0 k0,C0_TLBHI 383 dmfc0 k0,C0_CTEXT # Get context 384 dsra k0,8 # keep hi part 385 and k0,0x1FFF # of VPN2 387 beq k0,k1,1f # 390 beq k0,k [all...] |
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/sh/kernel/cpu/sh3/ |
H A D | entry.S | 36 * jmp @k0 ! control-transfer instruction 70 #define k0 r0 define 84 * k0 scratch 199 mov.l 2f, k0 200 mov.l @k0, k0 201 jmp @k0 265 mov k3, k0 ! Calculate IMASK-bits 266 shlr2 k0 267 and #0x3c, k0 [all...] |
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/sh/kernel/cpu/sh3/ |
H A D | entry.S | 36 * jmp @k0 ! control-transfer instruction 70 #define k0 r0 define 84 * k0 scratch 199 mov.l 2f, k0 200 mov.l @k0, k0 201 jmp @k0 265 mov k3, k0 ! Calculate IMASK-bits 266 shlr2 k0 267 and #0x3c, k0 [all...] |
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/mips/cpu/rm7000/src/ |
H A D | rm7000_cpu.S | 243 move k0,ra /* will be trashing RA */ 275 move ra,k0 /* saved return address */ 296 move k0,ra 304 move ra,k0 467 dmfc0 k0,C0_TLBHI 469 dmfc0 k0,C0_CTEXT # Get context 470 dsra k0,8 # keep hi part 471 and k0,0x1FFF # of VPN2 473 beq k0,k1,1f # 476 beq k0,k [all...] |
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/mips/cpu/bcmcore/src/ |
H A D | bcmcore_cpuinit.S | 348 mfc0 k0,C0_TLBHI 350 mfc0 k0,C0_CTEXT # Get context 351 sra k0,8 # keep hi part 352 and k0,0x1FFF # of VPN2 354 beq k0,k1,1f # 357 beq k0,k1,1f # 360 li k0,XTYPE_TLBFILL # all other bits are not 364 1: mfc0 k0,C0_CTEXT # Get context 365 sra k0,13 # Shift PTEbase 368 and k0,k [all...] |
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/include/bcmcrypto/ |
H A D | tkmic.h | 29 extern void BCMROMFN(tkip_mic)(uint32 k0, uint32 k1, int n, uint8 *m, uint32 *left, uint32 *right);
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/mips/include/asm/ |
H A D | regdef.h | 47 #define k0 $26 /* kernel scratch */ macro 90 #define k0 $26 /* kernel temporary */ macro
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H A D | stackframe.h | 102 CPU_ID_MFC0 k0, CPU_ID_REG 112 LONG_SRL k0, PTEBASE_SHIFT variable 113 LONG_ADDU k1, k0 125 move k0, ra 134 1: move ra, k0 135 li k0, 3 136 mtc0 k0, $22 159 mfc0 k0, CP0_STATUS 160 sll k0, 3 /* extract cu0 bit */ variable 162 bltz k0, 177 LONG_S k0, PT_R29(sp) variable [all...] |
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/bcmcrypto/ |
H A D | tkmic.c | 49 BCMROMFN(tkip_mic)(uint32 k0, uint32 k1, int n, uint8 *m, uint32 *left, uint32 *right) argument 51 uint32 l = k0;
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/mips/include/asm/ |
H A D | regdef.h | 47 #define k0 $26 /* kernel scratch */ macro 90 #define k0 $26 /* kernel temporary */ macro
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H A D | stackframe.h | 102 CPU_ID_MFC0 k0, CPU_ID_REG 112 LONG_SRL k0, PTEBASE_SHIFT variable 113 LONG_ADDU k1, k0 125 move k0, ra 134 1: move ra, k0 135 li k0, 3 136 mtc0 k0, $22 159 mfc0 k0, CP0_STATUS 160 sll k0, 3 /* extract cu0 bit */ variable 162 bltz k0, 177 LONG_S k0, PT_R29(sp) variable [all...] |
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/mips/common/src/ |
H A D | init_mips.S | 402 li k0,PHYS_TO_K1(A_IMR_REGISTER(0,R_IMR_MAILBOX_CPU)) 403 ld k0,0(k0) 405 beq k0,k1,vapi_runmc 407 beq k0,k1,vapi_rununc 409 bne k0,k1,vapi_skip 415 mfc0 k0,C0_CONFIG # get current CONFIG register 416 srl k0,k0,3 # strip out K0 bits 417 sll k0,k [all...] |
H A D | exception.S | 135 SR k0,CFE_LOCORE_GLOBAL_K0TMP(zero) 140 LR k0,CFE_LOCORE_GLOBAL_CERRH(zero) 141 jal k0 144 LR k0,CFE_LOCORE_GLOBAL_K0TMP(zero) 348 * _exc_entry(k0) 353 * k0 - exception type 427 move a0,k0 # Pass exception type 430 srl k0,3 # convert 8-byte index to array index 431 sll k0,BPWSIZE # convert back to index appropriate for word size 432 addu t0,k0 # ge [all...] |
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src/router/ffmpeg/libavcodec/ |
H A D | tta.c | 179 uint32_t k0, k1, sum0, sum1; member in struct:TTARice 182 static void rice_init(TTARice *c, uint32_t k0, uint32_t k1) argument 184 c->k0 = k0; 186 c->sum0 = shift_16[k0]; 332 k = rice->k0; 357 value += shift_1[rice->k0]; 360 if (rice->k0 > 0 && rice->sum0 < shift_16[rice->k0]) 361 rice->k0 [all...] |
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt/router/ffmpeg/libavcodec/ |
H A D | tta.c | 179 uint32_t k0, k1, sum0, sum1; member in struct:TTARice 182 static void rice_init(TTARice *c, uint32_t k0, uint32_t k1) argument 184 c->k0 = k0; 186 c->sum0 = shift_16[k0]; 332 k = rice->k0; 357 value += shift_1[rice->k0]; 360 if (rice->k0 > 0 && rice->sum0 < shift_16[rice->k0]) 361 rice->k0 [all...] |
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/router/ffmpeg/libavcodec/ |
H A D | tta.c | 179 uint32_t k0, k1, sum0, sum1; member in struct:TTARice 182 static void rice_init(TTARice *c, uint32_t k0, uint32_t k1) argument 184 c->k0 = k0; 186 c->sum0 = shift_16[k0]; 332 k = rice->k0; 357 value += shift_1[rice->k0]; 360 if (rice->k0 > 0 && rice->sum0 < shift_16[rice->k0]) 361 rice->k0 [all...] |
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/shared/ |
H A D | sisdram.S | 31 * and previous chips. Also, it changes k0 and k1 registers. 44 li k0,KSEG1ADDR(0x180000d0); \ 46 sw k1,BPADDR_OFF(k0) 50 sw k1,BPADDR_OFF(k0) 54 sw k1,BPDATA_OFF(k0)
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H A D | bzip2_inflate.c | 323 Int32 k0; member in struct:__anon44957 733 s->state_out_ch = s->k0; 737 if (k1 != s->k0) { s->k0 = k1; continue; }; 743 if (k1 != s->k0) { s->k0 = k1; continue; }; 749 if (k1 != s->k0) { s->k0 = k1; continue; }; 754 BZ_GET_FAST(s->k0); BZ_RAND_UPD_MASK; 755 s->k0 [all...] |
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/crypto/ |
H A D | tea.c | 65 u32 k0, k1, k2, k3; local 73 k0 = ctx->KEY[0]; 82 y += ((z << 4) + k0) ^ (z + sum) ^ ((z >> 5) + k1); 93 u32 k0, k1, k2, k3; local 101 k0 = ctx->KEY[0]; 112 y -= ((z << 4) + k0) ^ (z + sum) ^ ((z >> 5) + k1);
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/crypto/ |
H A D | tea.c | 65 u32 k0, k1, k2, k3; local 73 k0 = ctx->KEY[0]; 82 y += ((z << 4) + k0) ^ (z + sum) ^ ((z >> 5) + k1); 93 u32 k0, k1, k2, k3; local 101 k0 = ctx->KEY[0]; 112 y -= ((z << 4) + k0) ^ (z + sum) ^ ((z >> 5) + k1);
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/mips/common/include/ |
H A D | mipsmacros.h | 83 * DECLARE_XVECTOR sets up an indentifying code in k0 before 90 * code - code to place in k0 before jumping 107 li k0,code ; \ 126 * 0xD0BF1A3C lui k0,0xBFD0 (little-endian) 127 * 0xxxxx5A27 addu k0,vector (little-endian) 128 * 0x08004003 jr k0 (little-endian) 178 li k0,code ; \ 328 LR k0,mem_textreloc ; \ 329 ADD k1,k1,k0 ; \
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/mips/kernel/ |
H A D | octeon_switch.S | 437 * safely modify k0 and k1. 443 dmfc0 k0, $9,7 /* CvmCtl register. */ 444 bbit1 k0, 27, 1f /* Skip CvmCtl[NOMUL] */ 448 v3mulu k0, $0, $0 450 sd k0, PT_MTP(sp) /* PT_MTP has P0 */ 451 v3mulu k0, $0, $0 455 sd k0, PT_MTP+16(sp) /* PT_MTP+16 has P2 */ 456 v3mulu k0, $0, $0 459 sd k0, PT_MPL+8(sp) /* PT_MPL+8 has MPL1 */ 481 ld k0, PT_MP [all...] |