Searched refs:h_gr (Results 26 - 50 of 60) sorted by relevance

123

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src/router/gdb/sim/m32r/
H A Dcpu2.c51 return CPU (h_gr[regno]);
59 CPU (h_gr[regno]) = newval;
H A Dcpux.c51 return CPU (h_gr[regno]);
59 CPU (h_gr[regno]) = newval;
H A Dcpu.h43 SI h_gr[16]; member in struct:__anon3012::__anon3013
44 #define GET_H_GR(a1) CPU (h_gr)[a1]
45 #define SET_H_GR(a1, x) (CPU (h_gr)[a1] = (x))
112 UINT h_gr; member in struct:__anon3014
H A Dcpu2.h43 SI h_gr[16]; member in struct:__anon3038::__anon3039
44 #define GET_H_GR(a1) CPU (h_gr)[a1]
45 #define SET_H_GR(a1, x) (CPU (h_gr)[a1] = (x))
H A Dcpux.h43 SI h_gr[16]; member in struct:__anon3140::__anon3141
44 #define GET_H_GR(a1) CPU (h_gr)[a1]
45 #define SET_H_GR(a1, x) (CPU (h_gr)[a1] = (x))
H A Dsem2-switch.c1034 CPU (h_gr[((UINT) 14)]) = opval;
1062 CPU (h_gr[((UINT) 14)]) = opval;
1091 CPU (h_gr[((UINT) 14)]) = opval;
1124 CPU (h_gr[((UINT) 14)]) = opval;
1274 CPU (h_gr[((UINT) 14)]) = opval;
1307 CPU (h_gr[((UINT) 14)]) = opval;
1782 CPU (h_gr[((UINT) 14)]) = opval;
3825 CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_SI_14);
3880 CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_SI_14);
4026 CPU (h_gr[((UIN
[all...]
H A Dsemx-switch.c1027 CPU (h_gr[((UINT) 14)]) = opval;
1055 CPU (h_gr[((UINT) 14)]) = opval;
1084 CPU (h_gr[((UINT) 14)]) = opval;
1117 CPU (h_gr[((UINT) 14)]) = opval;
1267 CPU (h_gr[((UINT) 14)]) = opval;
1300 CPU (h_gr[((UINT) 14)]) = opval;
1614 CPU (h_gr[((UINT) 14)]) = opval;
3657 CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_SI_14);
3712 CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_SI_14);
3858 CPU (h_gr[((UIN
[all...]
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/router/gdb/sim/m32r/
H A Dcpu.c51 return CPU (h_gr[regno]);
59 CPU (h_gr[regno]) = newval;
H A Dcpu2.c51 return CPU (h_gr[regno]);
59 CPU (h_gr[regno]) = newval;
H A Dcpux.c51 return CPU (h_gr[regno]);
59 CPU (h_gr[regno]) = newval;
H A Dcpu.h43 SI h_gr[16]; member in struct:__anon37942::__anon37943
44 #define GET_H_GR(a1) CPU (h_gr)[a1]
45 #define SET_H_GR(a1, x) (CPU (h_gr)[a1] = (x))
112 UINT h_gr; member in struct:__anon37944
H A Dcpu2.h43 SI h_gr[16]; member in struct:__anon37968::__anon37969
44 #define GET_H_GR(a1) CPU (h_gr)[a1]
45 #define SET_H_GR(a1, x) (CPU (h_gr)[a1] = (x))
H A Dcpux.h43 SI h_gr[16]; member in struct:__anon38070::__anon38071
44 #define GET_H_GR(a1) CPU (h_gr)[a1]
45 #define SET_H_GR(a1, x) (CPU (h_gr)[a1] = (x))
H A Dsem2-switch.c1034 CPU (h_gr[((UINT) 14)]) = opval;
1062 CPU (h_gr[((UINT) 14)]) = opval;
1091 CPU (h_gr[((UINT) 14)]) = opval;
1124 CPU (h_gr[((UINT) 14)]) = opval;
1274 CPU (h_gr[((UINT) 14)]) = opval;
1307 CPU (h_gr[((UINT) 14)]) = opval;
1782 CPU (h_gr[((UINT) 14)]) = opval;
3825 CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_SI_14);
3880 CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_SI_14);
4026 CPU (h_gr[((UIN
[all...]
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt/router/gdb/sim/iq2000/
H A Dcpu.h46 SI h_gr[32]; member in struct:__anon3890::__anon3891
47 #define GET_H_GR(index) (((index) == (0))) ? (0) : (CPU (h_gr[index]))
54 CPU (h_gr[(index)]) = (x);\
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src/router/gdb/sim/iq2000/
H A Dcpu.h46 SI h_gr[32]; member in struct:__anon2985::__anon2986
47 #define GET_H_GR(index) (((index) == (0))) ? (0) : (CPU (h_gr[index]))
54 CPU (h_gr[(index)]) = (x);\
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/router/gdb/sim/iq2000/
H A Dcpu.h46 SI h_gr[32]; member in struct:__anon37915::__anon37916
47 #define GET_H_GR(index) (((index) == (0))) ? (0) : (CPU (h_gr[index]))
54 CPU (h_gr[(index)]) = (x);\
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt/router/gdb/sim/m32r/
H A Dcpu.h43 SI h_gr[16]; member in struct:__anon3917::__anon3918
44 #define GET_H_GR(a1) CPU (h_gr)[a1]
45 #define SET_H_GR(a1, x) (CPU (h_gr)[a1] = (x))
112 UINT h_gr; member in struct:__anon3919
H A Dcpu2.h43 SI h_gr[16]; member in struct:__anon3943::__anon3944
44 #define GET_H_GR(a1) CPU (h_gr)[a1]
45 #define SET_H_GR(a1, x) (CPU (h_gr)[a1] = (x))
H A Dcpux.h43 SI h_gr[16]; member in struct:__anon4045::__anon4046
44 #define GET_H_GR(a1) CPU (h_gr)[a1]
45 #define SET_H_GR(a1, x) (CPU (h_gr)[a1] = (x))
H A Dsem2-switch.c1034 CPU (h_gr[((UINT) 14)]) = opval;
1062 CPU (h_gr[((UINT) 14)]) = opval;
1091 CPU (h_gr[((UINT) 14)]) = opval;
1124 CPU (h_gr[((UINT) 14)]) = opval;
1274 CPU (h_gr[((UINT) 14)]) = opval;
1307 CPU (h_gr[((UINT) 14)]) = opval;
1782 CPU (h_gr[((UINT) 14)]) = opval;
3825 CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_SI_14);
3880 CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_SI_14);
4026 CPU (h_gr[((UIN
[all...]
H A Dsemx-switch.c1027 CPU (h_gr[((UINT) 14)]) = opval;
1055 CPU (h_gr[((UINT) 14)]) = opval;
1084 CPU (h_gr[((UINT) 14)]) = opval;
1117 CPU (h_gr[((UINT) 14)]) = opval;
1267 CPU (h_gr[((UINT) 14)]) = opval;
1300 CPU (h_gr[((UINT) 14)]) = opval;
1614 CPU (h_gr[((UINT) 14)]) = opval;
3657 CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_SI_14);
3712 CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_SI_14);
3858 CPU (h_gr[((UIN
[all...]
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt/router/gdb/sim/frv/
H A Dfrv.c138 return CPU (h_gr[gr]);
149 CPU (h_gr[gr]) = newval;
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src/router/gdb/sim/frv/
H A Dfrv.c138 return CPU (h_gr[gr]);
149 CPU (h_gr[gr]) = newval;
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/router/gdb/sim/frv/
H A Dfrv.c138 return CPU (h_gr[gr]);
149 CPU (h_gr[gr]) = newval;

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