1/* Simulator instruction semantics for m32r2f. 2 3THIS FILE IS MACHINE GENERATED WITH CGEN. 4 5Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. 6 7This file is part of the GNU simulators. 8 9This program is free software; you can redistribute it and/or modify 10it under the terms of the GNU General Public License as published by 11the Free Software Foundation; either version 3 of the License, or 12(at your option) any later version. 13 14This program is distributed in the hope that it will be useful, 15but WITHOUT ANY WARRANTY; without even the implied warranty of 16MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17GNU General Public License for more details. 18 19You should have received a copy of the GNU General Public License 20along with this program. If not, see <http://www.gnu.org/licenses/>. 21 22*/ 23 24#ifdef DEFINE_LABELS 25 26 /* The labels have the case they have because the enum of insn types 27 is all uppercase and in the non-stdc case the insn symbol is built 28 into the enum name. */ 29 30 static struct { 31 int index; 32 void *label; 33 } labels[] = { 34 { M32R2F_INSN_X_INVALID, && case_sem_INSN_X_INVALID }, 35 { M32R2F_INSN_X_AFTER, && case_sem_INSN_X_AFTER }, 36 { M32R2F_INSN_X_BEFORE, && case_sem_INSN_X_BEFORE }, 37 { M32R2F_INSN_X_CTI_CHAIN, && case_sem_INSN_X_CTI_CHAIN }, 38 { M32R2F_INSN_X_CHAIN, && case_sem_INSN_X_CHAIN }, 39 { M32R2F_INSN_X_BEGIN, && case_sem_INSN_X_BEGIN }, 40 { M32R2F_INSN_ADD, && case_sem_INSN_ADD }, 41 { M32R2F_INSN_ADD3, && case_sem_INSN_ADD3 }, 42 { M32R2F_INSN_AND, && case_sem_INSN_AND }, 43 { M32R2F_INSN_AND3, && case_sem_INSN_AND3 }, 44 { M32R2F_INSN_OR, && case_sem_INSN_OR }, 45 { M32R2F_INSN_OR3, && case_sem_INSN_OR3 }, 46 { M32R2F_INSN_XOR, && case_sem_INSN_XOR }, 47 { M32R2F_INSN_XOR3, && case_sem_INSN_XOR3 }, 48 { M32R2F_INSN_ADDI, && case_sem_INSN_ADDI }, 49 { M32R2F_INSN_ADDV, && case_sem_INSN_ADDV }, 50 { M32R2F_INSN_ADDV3, && case_sem_INSN_ADDV3 }, 51 { M32R2F_INSN_ADDX, && case_sem_INSN_ADDX }, 52 { M32R2F_INSN_BC8, && case_sem_INSN_BC8 }, 53 { M32R2F_INSN_BC24, && case_sem_INSN_BC24 }, 54 { M32R2F_INSN_BEQ, && case_sem_INSN_BEQ }, 55 { M32R2F_INSN_BEQZ, && case_sem_INSN_BEQZ }, 56 { M32R2F_INSN_BGEZ, && case_sem_INSN_BGEZ }, 57 { M32R2F_INSN_BGTZ, && case_sem_INSN_BGTZ }, 58 { M32R2F_INSN_BLEZ, && case_sem_INSN_BLEZ }, 59 { M32R2F_INSN_BLTZ, && case_sem_INSN_BLTZ }, 60 { M32R2F_INSN_BNEZ, && case_sem_INSN_BNEZ }, 61 { M32R2F_INSN_BL8, && case_sem_INSN_BL8 }, 62 { M32R2F_INSN_BL24, && case_sem_INSN_BL24 }, 63 { M32R2F_INSN_BCL8, && case_sem_INSN_BCL8 }, 64 { M32R2F_INSN_BCL24, && case_sem_INSN_BCL24 }, 65 { M32R2F_INSN_BNC8, && case_sem_INSN_BNC8 }, 66 { M32R2F_INSN_BNC24, && case_sem_INSN_BNC24 }, 67 { M32R2F_INSN_BNE, && case_sem_INSN_BNE }, 68 { M32R2F_INSN_BRA8, && case_sem_INSN_BRA8 }, 69 { M32R2F_INSN_BRA24, && case_sem_INSN_BRA24 }, 70 { M32R2F_INSN_BNCL8, && case_sem_INSN_BNCL8 }, 71 { M32R2F_INSN_BNCL24, && case_sem_INSN_BNCL24 }, 72 { M32R2F_INSN_CMP, && case_sem_INSN_CMP }, 73 { M32R2F_INSN_CMPI, && case_sem_INSN_CMPI }, 74 { M32R2F_INSN_CMPU, && case_sem_INSN_CMPU }, 75 { M32R2F_INSN_CMPUI, && case_sem_INSN_CMPUI }, 76 { M32R2F_INSN_CMPEQ, && case_sem_INSN_CMPEQ }, 77 { M32R2F_INSN_CMPZ, && case_sem_INSN_CMPZ }, 78 { M32R2F_INSN_DIV, && case_sem_INSN_DIV }, 79 { M32R2F_INSN_DIVU, && case_sem_INSN_DIVU }, 80 { M32R2F_INSN_REM, && case_sem_INSN_REM }, 81 { M32R2F_INSN_REMU, && case_sem_INSN_REMU }, 82 { M32R2F_INSN_REMH, && case_sem_INSN_REMH }, 83 { M32R2F_INSN_REMUH, && case_sem_INSN_REMUH }, 84 { M32R2F_INSN_REMB, && case_sem_INSN_REMB }, 85 { M32R2F_INSN_REMUB, && case_sem_INSN_REMUB }, 86 { M32R2F_INSN_DIVUH, && case_sem_INSN_DIVUH }, 87 { M32R2F_INSN_DIVB, && case_sem_INSN_DIVB }, 88 { M32R2F_INSN_DIVUB, && case_sem_INSN_DIVUB }, 89 { M32R2F_INSN_DIVH, && case_sem_INSN_DIVH }, 90 { M32R2F_INSN_JC, && case_sem_INSN_JC }, 91 { M32R2F_INSN_JNC, && case_sem_INSN_JNC }, 92 { M32R2F_INSN_JL, && case_sem_INSN_JL }, 93 { M32R2F_INSN_JMP, && case_sem_INSN_JMP }, 94 { M32R2F_INSN_LD, && case_sem_INSN_LD }, 95 { M32R2F_INSN_LD_D, && case_sem_INSN_LD_D }, 96 { M32R2F_INSN_LDB, && case_sem_INSN_LDB }, 97 { M32R2F_INSN_LDB_D, && case_sem_INSN_LDB_D }, 98 { M32R2F_INSN_LDH, && case_sem_INSN_LDH }, 99 { M32R2F_INSN_LDH_D, && case_sem_INSN_LDH_D }, 100 { M32R2F_INSN_LDUB, && case_sem_INSN_LDUB }, 101 { M32R2F_INSN_LDUB_D, && case_sem_INSN_LDUB_D }, 102 { M32R2F_INSN_LDUH, && case_sem_INSN_LDUH }, 103 { M32R2F_INSN_LDUH_D, && case_sem_INSN_LDUH_D }, 104 { M32R2F_INSN_LD_PLUS, && case_sem_INSN_LD_PLUS }, 105 { M32R2F_INSN_LD24, && case_sem_INSN_LD24 }, 106 { M32R2F_INSN_LDI8, && case_sem_INSN_LDI8 }, 107 { M32R2F_INSN_LDI16, && case_sem_INSN_LDI16 }, 108 { M32R2F_INSN_LOCK, && case_sem_INSN_LOCK }, 109 { M32R2F_INSN_MACHI_A, && case_sem_INSN_MACHI_A }, 110 { M32R2F_INSN_MACLO_A, && case_sem_INSN_MACLO_A }, 111 { M32R2F_INSN_MACWHI_A, && case_sem_INSN_MACWHI_A }, 112 { M32R2F_INSN_MACWLO_A, && case_sem_INSN_MACWLO_A }, 113 { M32R2F_INSN_MUL, && case_sem_INSN_MUL }, 114 { M32R2F_INSN_MULHI_A, && case_sem_INSN_MULHI_A }, 115 { M32R2F_INSN_MULLO_A, && case_sem_INSN_MULLO_A }, 116 { M32R2F_INSN_MULWHI_A, && case_sem_INSN_MULWHI_A }, 117 { M32R2F_INSN_MULWLO_A, && case_sem_INSN_MULWLO_A }, 118 { M32R2F_INSN_MV, && case_sem_INSN_MV }, 119 { M32R2F_INSN_MVFACHI_A, && case_sem_INSN_MVFACHI_A }, 120 { M32R2F_INSN_MVFACLO_A, && case_sem_INSN_MVFACLO_A }, 121 { M32R2F_INSN_MVFACMI_A, && case_sem_INSN_MVFACMI_A }, 122 { M32R2F_INSN_MVFC, && case_sem_INSN_MVFC }, 123 { M32R2F_INSN_MVTACHI_A, && case_sem_INSN_MVTACHI_A }, 124 { M32R2F_INSN_MVTACLO_A, && case_sem_INSN_MVTACLO_A }, 125 { M32R2F_INSN_MVTC, && case_sem_INSN_MVTC }, 126 { M32R2F_INSN_NEG, && case_sem_INSN_NEG }, 127 { M32R2F_INSN_NOP, && case_sem_INSN_NOP }, 128 { M32R2F_INSN_NOT, && case_sem_INSN_NOT }, 129 { M32R2F_INSN_RAC_DSI, && case_sem_INSN_RAC_DSI }, 130 { M32R2F_INSN_RACH_DSI, && case_sem_INSN_RACH_DSI }, 131 { M32R2F_INSN_RTE, && case_sem_INSN_RTE }, 132 { M32R2F_INSN_SETH, && case_sem_INSN_SETH }, 133 { M32R2F_INSN_SLL, && case_sem_INSN_SLL }, 134 { M32R2F_INSN_SLL3, && case_sem_INSN_SLL3 }, 135 { M32R2F_INSN_SLLI, && case_sem_INSN_SLLI }, 136 { M32R2F_INSN_SRA, && case_sem_INSN_SRA }, 137 { M32R2F_INSN_SRA3, && case_sem_INSN_SRA3 }, 138 { M32R2F_INSN_SRAI, && case_sem_INSN_SRAI }, 139 { M32R2F_INSN_SRL, && case_sem_INSN_SRL }, 140 { M32R2F_INSN_SRL3, && case_sem_INSN_SRL3 }, 141 { M32R2F_INSN_SRLI, && case_sem_INSN_SRLI }, 142 { M32R2F_INSN_ST, && case_sem_INSN_ST }, 143 { M32R2F_INSN_ST_D, && case_sem_INSN_ST_D }, 144 { M32R2F_INSN_STB, && case_sem_INSN_STB }, 145 { M32R2F_INSN_STB_D, && case_sem_INSN_STB_D }, 146 { M32R2F_INSN_STH, && case_sem_INSN_STH }, 147 { M32R2F_INSN_STH_D, && case_sem_INSN_STH_D }, 148 { M32R2F_INSN_ST_PLUS, && case_sem_INSN_ST_PLUS }, 149 { M32R2F_INSN_STH_PLUS, && case_sem_INSN_STH_PLUS }, 150 { M32R2F_INSN_STB_PLUS, && case_sem_INSN_STB_PLUS }, 151 { M32R2F_INSN_ST_MINUS, && case_sem_INSN_ST_MINUS }, 152 { M32R2F_INSN_SUB, && case_sem_INSN_SUB }, 153 { M32R2F_INSN_SUBV, && case_sem_INSN_SUBV }, 154 { M32R2F_INSN_SUBX, && case_sem_INSN_SUBX }, 155 { M32R2F_INSN_TRAP, && case_sem_INSN_TRAP }, 156 { M32R2F_INSN_UNLOCK, && case_sem_INSN_UNLOCK }, 157 { M32R2F_INSN_SATB, && case_sem_INSN_SATB }, 158 { M32R2F_INSN_SATH, && case_sem_INSN_SATH }, 159 { M32R2F_INSN_SAT, && case_sem_INSN_SAT }, 160 { M32R2F_INSN_PCMPBZ, && case_sem_INSN_PCMPBZ }, 161 { M32R2F_INSN_SADD, && case_sem_INSN_SADD }, 162 { M32R2F_INSN_MACWU1, && case_sem_INSN_MACWU1 }, 163 { M32R2F_INSN_MSBLO, && case_sem_INSN_MSBLO }, 164 { M32R2F_INSN_MULWU1, && case_sem_INSN_MULWU1 }, 165 { M32R2F_INSN_MACLH1, && case_sem_INSN_MACLH1 }, 166 { M32R2F_INSN_SC, && case_sem_INSN_SC }, 167 { M32R2F_INSN_SNC, && case_sem_INSN_SNC }, 168 { M32R2F_INSN_CLRPSW, && case_sem_INSN_CLRPSW }, 169 { M32R2F_INSN_SETPSW, && case_sem_INSN_SETPSW }, 170 { M32R2F_INSN_BSET, && case_sem_INSN_BSET }, 171 { M32R2F_INSN_BCLR, && case_sem_INSN_BCLR }, 172 { M32R2F_INSN_BTST, && case_sem_INSN_BTST }, 173 { M32R2F_INSN_PAR_ADD, && case_sem_INSN_PAR_ADD }, 174 { M32R2F_INSN_WRITE_ADD, && case_sem_INSN_WRITE_ADD }, 175 { M32R2F_INSN_PAR_AND, && case_sem_INSN_PAR_AND }, 176 { M32R2F_INSN_WRITE_AND, && case_sem_INSN_WRITE_AND }, 177 { M32R2F_INSN_PAR_OR, && case_sem_INSN_PAR_OR }, 178 { M32R2F_INSN_WRITE_OR, && case_sem_INSN_WRITE_OR }, 179 { M32R2F_INSN_PAR_XOR, && case_sem_INSN_PAR_XOR }, 180 { M32R2F_INSN_WRITE_XOR, && case_sem_INSN_WRITE_XOR }, 181 { M32R2F_INSN_PAR_ADDI, && case_sem_INSN_PAR_ADDI }, 182 { M32R2F_INSN_WRITE_ADDI, && case_sem_INSN_WRITE_ADDI }, 183 { M32R2F_INSN_PAR_ADDV, && case_sem_INSN_PAR_ADDV }, 184 { M32R2F_INSN_WRITE_ADDV, && case_sem_INSN_WRITE_ADDV }, 185 { M32R2F_INSN_PAR_ADDX, && case_sem_INSN_PAR_ADDX }, 186 { M32R2F_INSN_WRITE_ADDX, && case_sem_INSN_WRITE_ADDX }, 187 { M32R2F_INSN_PAR_BC8, && case_sem_INSN_PAR_BC8 }, 188 { M32R2F_INSN_WRITE_BC8, && case_sem_INSN_WRITE_BC8 }, 189 { M32R2F_INSN_PAR_BL8, && case_sem_INSN_PAR_BL8 }, 190 { M32R2F_INSN_WRITE_BL8, && case_sem_INSN_WRITE_BL8 }, 191 { M32R2F_INSN_PAR_BCL8, && case_sem_INSN_PAR_BCL8 }, 192 { M32R2F_INSN_WRITE_BCL8, && case_sem_INSN_WRITE_BCL8 }, 193 { M32R2F_INSN_PAR_BNC8, && case_sem_INSN_PAR_BNC8 }, 194 { M32R2F_INSN_WRITE_BNC8, && case_sem_INSN_WRITE_BNC8 }, 195 { M32R2F_INSN_PAR_BRA8, && case_sem_INSN_PAR_BRA8 }, 196 { M32R2F_INSN_WRITE_BRA8, && case_sem_INSN_WRITE_BRA8 }, 197 { M32R2F_INSN_PAR_BNCL8, && case_sem_INSN_PAR_BNCL8 }, 198 { M32R2F_INSN_WRITE_BNCL8, && case_sem_INSN_WRITE_BNCL8 }, 199 { M32R2F_INSN_PAR_CMP, && case_sem_INSN_PAR_CMP }, 200 { M32R2F_INSN_WRITE_CMP, && case_sem_INSN_WRITE_CMP }, 201 { M32R2F_INSN_PAR_CMPU, && case_sem_INSN_PAR_CMPU }, 202 { M32R2F_INSN_WRITE_CMPU, && case_sem_INSN_WRITE_CMPU }, 203 { M32R2F_INSN_PAR_CMPEQ, && case_sem_INSN_PAR_CMPEQ }, 204 { M32R2F_INSN_WRITE_CMPEQ, && case_sem_INSN_WRITE_CMPEQ }, 205 { M32R2F_INSN_PAR_CMPZ, && case_sem_INSN_PAR_CMPZ }, 206 { M32R2F_INSN_WRITE_CMPZ, && case_sem_INSN_WRITE_CMPZ }, 207 { M32R2F_INSN_PAR_JC, && case_sem_INSN_PAR_JC }, 208 { M32R2F_INSN_WRITE_JC, && case_sem_INSN_WRITE_JC }, 209 { M32R2F_INSN_PAR_JNC, && case_sem_INSN_PAR_JNC }, 210 { M32R2F_INSN_WRITE_JNC, && case_sem_INSN_WRITE_JNC }, 211 { M32R2F_INSN_PAR_JL, && case_sem_INSN_PAR_JL }, 212 { M32R2F_INSN_WRITE_JL, && case_sem_INSN_WRITE_JL }, 213 { M32R2F_INSN_PAR_JMP, && case_sem_INSN_PAR_JMP }, 214 { M32R2F_INSN_WRITE_JMP, && case_sem_INSN_WRITE_JMP }, 215 { M32R2F_INSN_PAR_LD, && case_sem_INSN_PAR_LD }, 216 { M32R2F_INSN_WRITE_LD, && case_sem_INSN_WRITE_LD }, 217 { M32R2F_INSN_PAR_LDB, && case_sem_INSN_PAR_LDB }, 218 { M32R2F_INSN_WRITE_LDB, && case_sem_INSN_WRITE_LDB }, 219 { M32R2F_INSN_PAR_LDH, && case_sem_INSN_PAR_LDH }, 220 { M32R2F_INSN_WRITE_LDH, && case_sem_INSN_WRITE_LDH }, 221 { M32R2F_INSN_PAR_LDUB, && case_sem_INSN_PAR_LDUB }, 222 { M32R2F_INSN_WRITE_LDUB, && case_sem_INSN_WRITE_LDUB }, 223 { M32R2F_INSN_PAR_LDUH, && case_sem_INSN_PAR_LDUH }, 224 { M32R2F_INSN_WRITE_LDUH, && case_sem_INSN_WRITE_LDUH }, 225 { M32R2F_INSN_PAR_LD_PLUS, && case_sem_INSN_PAR_LD_PLUS }, 226 { M32R2F_INSN_WRITE_LD_PLUS, && case_sem_INSN_WRITE_LD_PLUS }, 227 { M32R2F_INSN_PAR_LDI8, && case_sem_INSN_PAR_LDI8 }, 228 { M32R2F_INSN_WRITE_LDI8, && case_sem_INSN_WRITE_LDI8 }, 229 { M32R2F_INSN_PAR_LOCK, && case_sem_INSN_PAR_LOCK }, 230 { M32R2F_INSN_WRITE_LOCK, && case_sem_INSN_WRITE_LOCK }, 231 { M32R2F_INSN_PAR_MACHI_A, && case_sem_INSN_PAR_MACHI_A }, 232 { M32R2F_INSN_WRITE_MACHI_A, && case_sem_INSN_WRITE_MACHI_A }, 233 { M32R2F_INSN_PAR_MACLO_A, && case_sem_INSN_PAR_MACLO_A }, 234 { M32R2F_INSN_WRITE_MACLO_A, && case_sem_INSN_WRITE_MACLO_A }, 235 { M32R2F_INSN_PAR_MACWHI_A, && case_sem_INSN_PAR_MACWHI_A }, 236 { M32R2F_INSN_WRITE_MACWHI_A, && case_sem_INSN_WRITE_MACWHI_A }, 237 { M32R2F_INSN_PAR_MACWLO_A, && case_sem_INSN_PAR_MACWLO_A }, 238 { M32R2F_INSN_WRITE_MACWLO_A, && case_sem_INSN_WRITE_MACWLO_A }, 239 { M32R2F_INSN_PAR_MUL, && case_sem_INSN_PAR_MUL }, 240 { M32R2F_INSN_WRITE_MUL, && case_sem_INSN_WRITE_MUL }, 241 { M32R2F_INSN_PAR_MULHI_A, && case_sem_INSN_PAR_MULHI_A }, 242 { M32R2F_INSN_WRITE_MULHI_A, && case_sem_INSN_WRITE_MULHI_A }, 243 { M32R2F_INSN_PAR_MULLO_A, && case_sem_INSN_PAR_MULLO_A }, 244 { M32R2F_INSN_WRITE_MULLO_A, && case_sem_INSN_WRITE_MULLO_A }, 245 { M32R2F_INSN_PAR_MULWHI_A, && case_sem_INSN_PAR_MULWHI_A }, 246 { M32R2F_INSN_WRITE_MULWHI_A, && case_sem_INSN_WRITE_MULWHI_A }, 247 { M32R2F_INSN_PAR_MULWLO_A, && case_sem_INSN_PAR_MULWLO_A }, 248 { M32R2F_INSN_WRITE_MULWLO_A, && case_sem_INSN_WRITE_MULWLO_A }, 249 { M32R2F_INSN_PAR_MV, && case_sem_INSN_PAR_MV }, 250 { M32R2F_INSN_WRITE_MV, && case_sem_INSN_WRITE_MV }, 251 { M32R2F_INSN_PAR_MVFACHI_A, && case_sem_INSN_PAR_MVFACHI_A }, 252 { M32R2F_INSN_WRITE_MVFACHI_A, && case_sem_INSN_WRITE_MVFACHI_A }, 253 { M32R2F_INSN_PAR_MVFACLO_A, && case_sem_INSN_PAR_MVFACLO_A }, 254 { M32R2F_INSN_WRITE_MVFACLO_A, && case_sem_INSN_WRITE_MVFACLO_A }, 255 { M32R2F_INSN_PAR_MVFACMI_A, && case_sem_INSN_PAR_MVFACMI_A }, 256 { M32R2F_INSN_WRITE_MVFACMI_A, && case_sem_INSN_WRITE_MVFACMI_A }, 257 { M32R2F_INSN_PAR_MVFC, && case_sem_INSN_PAR_MVFC }, 258 { M32R2F_INSN_WRITE_MVFC, && case_sem_INSN_WRITE_MVFC }, 259 { M32R2F_INSN_PAR_MVTACHI_A, && case_sem_INSN_PAR_MVTACHI_A }, 260 { M32R2F_INSN_WRITE_MVTACHI_A, && case_sem_INSN_WRITE_MVTACHI_A }, 261 { M32R2F_INSN_PAR_MVTACLO_A, && case_sem_INSN_PAR_MVTACLO_A }, 262 { M32R2F_INSN_WRITE_MVTACLO_A, && case_sem_INSN_WRITE_MVTACLO_A }, 263 { M32R2F_INSN_PAR_MVTC, && case_sem_INSN_PAR_MVTC }, 264 { M32R2F_INSN_WRITE_MVTC, && case_sem_INSN_WRITE_MVTC }, 265 { M32R2F_INSN_PAR_NEG, && case_sem_INSN_PAR_NEG }, 266 { M32R2F_INSN_WRITE_NEG, && case_sem_INSN_WRITE_NEG }, 267 { M32R2F_INSN_PAR_NOP, && case_sem_INSN_PAR_NOP }, 268 { M32R2F_INSN_WRITE_NOP, && case_sem_INSN_WRITE_NOP }, 269 { M32R2F_INSN_PAR_NOT, && case_sem_INSN_PAR_NOT }, 270 { M32R2F_INSN_WRITE_NOT, && case_sem_INSN_WRITE_NOT }, 271 { M32R2F_INSN_PAR_RAC_DSI, && case_sem_INSN_PAR_RAC_DSI }, 272 { M32R2F_INSN_WRITE_RAC_DSI, && case_sem_INSN_WRITE_RAC_DSI }, 273 { M32R2F_INSN_PAR_RACH_DSI, && case_sem_INSN_PAR_RACH_DSI }, 274 { M32R2F_INSN_WRITE_RACH_DSI, && case_sem_INSN_WRITE_RACH_DSI }, 275 { M32R2F_INSN_PAR_RTE, && case_sem_INSN_PAR_RTE }, 276 { M32R2F_INSN_WRITE_RTE, && case_sem_INSN_WRITE_RTE }, 277 { M32R2F_INSN_PAR_SLL, && case_sem_INSN_PAR_SLL }, 278 { M32R2F_INSN_WRITE_SLL, && case_sem_INSN_WRITE_SLL }, 279 { M32R2F_INSN_PAR_SLLI, && case_sem_INSN_PAR_SLLI }, 280 { M32R2F_INSN_WRITE_SLLI, && case_sem_INSN_WRITE_SLLI }, 281 { M32R2F_INSN_PAR_SRA, && case_sem_INSN_PAR_SRA }, 282 { M32R2F_INSN_WRITE_SRA, && case_sem_INSN_WRITE_SRA }, 283 { M32R2F_INSN_PAR_SRAI, && case_sem_INSN_PAR_SRAI }, 284 { M32R2F_INSN_WRITE_SRAI, && case_sem_INSN_WRITE_SRAI }, 285 { M32R2F_INSN_PAR_SRL, && case_sem_INSN_PAR_SRL }, 286 { M32R2F_INSN_WRITE_SRL, && case_sem_INSN_WRITE_SRL }, 287 { M32R2F_INSN_PAR_SRLI, && case_sem_INSN_PAR_SRLI }, 288 { M32R2F_INSN_WRITE_SRLI, && case_sem_INSN_WRITE_SRLI }, 289 { M32R2F_INSN_PAR_ST, && case_sem_INSN_PAR_ST }, 290 { M32R2F_INSN_WRITE_ST, && case_sem_INSN_WRITE_ST }, 291 { M32R2F_INSN_PAR_STB, && case_sem_INSN_PAR_STB }, 292 { M32R2F_INSN_WRITE_STB, && case_sem_INSN_WRITE_STB }, 293 { M32R2F_INSN_PAR_STH, && case_sem_INSN_PAR_STH }, 294 { M32R2F_INSN_WRITE_STH, && case_sem_INSN_WRITE_STH }, 295 { M32R2F_INSN_PAR_ST_PLUS, && case_sem_INSN_PAR_ST_PLUS }, 296 { M32R2F_INSN_WRITE_ST_PLUS, && case_sem_INSN_WRITE_ST_PLUS }, 297 { M32R2F_INSN_PAR_STH_PLUS, && case_sem_INSN_PAR_STH_PLUS }, 298 { M32R2F_INSN_WRITE_STH_PLUS, && case_sem_INSN_WRITE_STH_PLUS }, 299 { M32R2F_INSN_PAR_STB_PLUS, && case_sem_INSN_PAR_STB_PLUS }, 300 { M32R2F_INSN_WRITE_STB_PLUS, && case_sem_INSN_WRITE_STB_PLUS }, 301 { M32R2F_INSN_PAR_ST_MINUS, && case_sem_INSN_PAR_ST_MINUS }, 302 { M32R2F_INSN_WRITE_ST_MINUS, && case_sem_INSN_WRITE_ST_MINUS }, 303 { M32R2F_INSN_PAR_SUB, && case_sem_INSN_PAR_SUB }, 304 { M32R2F_INSN_WRITE_SUB, && case_sem_INSN_WRITE_SUB }, 305 { M32R2F_INSN_PAR_SUBV, && case_sem_INSN_PAR_SUBV }, 306 { M32R2F_INSN_WRITE_SUBV, && case_sem_INSN_WRITE_SUBV }, 307 { M32R2F_INSN_PAR_SUBX, && case_sem_INSN_PAR_SUBX }, 308 { M32R2F_INSN_WRITE_SUBX, && case_sem_INSN_WRITE_SUBX }, 309 { M32R2F_INSN_PAR_TRAP, && case_sem_INSN_PAR_TRAP }, 310 { M32R2F_INSN_WRITE_TRAP, && case_sem_INSN_WRITE_TRAP }, 311 { M32R2F_INSN_PAR_UNLOCK, && case_sem_INSN_PAR_UNLOCK }, 312 { M32R2F_INSN_WRITE_UNLOCK, && case_sem_INSN_WRITE_UNLOCK }, 313 { M32R2F_INSN_PAR_PCMPBZ, && case_sem_INSN_PAR_PCMPBZ }, 314 { M32R2F_INSN_WRITE_PCMPBZ, && case_sem_INSN_WRITE_PCMPBZ }, 315 { M32R2F_INSN_PAR_SADD, && case_sem_INSN_PAR_SADD }, 316 { M32R2F_INSN_WRITE_SADD, && case_sem_INSN_WRITE_SADD }, 317 { M32R2F_INSN_PAR_MACWU1, && case_sem_INSN_PAR_MACWU1 }, 318 { M32R2F_INSN_WRITE_MACWU1, && case_sem_INSN_WRITE_MACWU1 }, 319 { M32R2F_INSN_PAR_MSBLO, && case_sem_INSN_PAR_MSBLO }, 320 { M32R2F_INSN_WRITE_MSBLO, && case_sem_INSN_WRITE_MSBLO }, 321 { M32R2F_INSN_PAR_MULWU1, && case_sem_INSN_PAR_MULWU1 }, 322 { M32R2F_INSN_WRITE_MULWU1, && case_sem_INSN_WRITE_MULWU1 }, 323 { M32R2F_INSN_PAR_MACLH1, && case_sem_INSN_PAR_MACLH1 }, 324 { M32R2F_INSN_WRITE_MACLH1, && case_sem_INSN_WRITE_MACLH1 }, 325 { M32R2F_INSN_PAR_SC, && case_sem_INSN_PAR_SC }, 326 { M32R2F_INSN_WRITE_SC, && case_sem_INSN_WRITE_SC }, 327 { M32R2F_INSN_PAR_SNC, && case_sem_INSN_PAR_SNC }, 328 { M32R2F_INSN_WRITE_SNC, && case_sem_INSN_WRITE_SNC }, 329 { M32R2F_INSN_PAR_CLRPSW, && case_sem_INSN_PAR_CLRPSW }, 330 { M32R2F_INSN_WRITE_CLRPSW, && case_sem_INSN_WRITE_CLRPSW }, 331 { M32R2F_INSN_PAR_SETPSW, && case_sem_INSN_PAR_SETPSW }, 332 { M32R2F_INSN_WRITE_SETPSW, && case_sem_INSN_WRITE_SETPSW }, 333 { M32R2F_INSN_PAR_BTST, && case_sem_INSN_PAR_BTST }, 334 { M32R2F_INSN_WRITE_BTST, && case_sem_INSN_WRITE_BTST }, 335 { 0, 0 } 336 }; 337 int i; 338 339 for (i = 0; labels[i].label != 0; ++i) 340 { 341#if FAST_P 342 CPU_IDESC (current_cpu) [labels[i].index].sem_fast_lab = labels[i].label; 343#else 344 CPU_IDESC (current_cpu) [labels[i].index].sem_full_lab = labels[i].label; 345#endif 346 } 347 348#undef DEFINE_LABELS 349#endif /* DEFINE_LABELS */ 350 351#ifdef DEFINE_SWITCH 352 353/* If hyper-fast [well not unnecessarily slow] execution is selected, turn 354 off frills like tracing and profiling. */ 355/* FIXME: A better way would be to have TRACE_RESULT check for something 356 that can cause it to be optimized out. Another way would be to emit 357 special handlers into the instruction "stream". */ 358 359#if FAST_P 360#undef TRACE_RESULT 361#define TRACE_RESULT(cpu, abuf, name, type, val) 362#endif 363 364#undef GET_ATTR 365#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE) 366#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr) 367#else 368#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_/**/attr) 369#endif 370 371{ 372 373#if WITH_SCACHE_PBB 374 375/* Branch to next handler without going around main loop. */ 376#define NEXT(vpc) goto * SEM_ARGBUF (vpc) -> semantic.sem_case 377SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) 378 379#else /* ! WITH_SCACHE_PBB */ 380 381#define NEXT(vpc) BREAK (sem) 382#ifdef __GNUC__ 383#if FAST_P 384 SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_fast_lab) 385#else 386 SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_full_lab) 387#endif 388#else 389 SWITCH (sem, SEM_ARGBUF (sc) -> idesc->num) 390#endif 391 392#endif /* ! WITH_SCACHE_PBB */ 393 394 { 395 396 CASE (sem, INSN_X_INVALID) : /* --invalid-- */ 397{ 398 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 399 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 400#define FLD(f) abuf->fields.fmt_empty.f 401 int UNUSED written = 0; 402 IADDR UNUSED pc = abuf->addr; 403 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 404 405 { 406 /* Update the recorded pc in the cpu state struct. 407 Only necessary for WITH_SCACHE case, but to avoid the 408 conditional compilation .... */ 409 SET_H_PC (pc); 410 /* Virtual insns have zero size. Overwrite vpc with address of next insn 411 using the default-insn-bitsize spec. When executing insns in parallel 412 we may want to queue the fault and continue execution. */ 413 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 414 vpc = sim_engine_invalid_insn (current_cpu, pc, vpc); 415 } 416 417#undef FLD 418} 419 NEXT (vpc); 420 421 CASE (sem, INSN_X_AFTER) : /* --after-- */ 422{ 423 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 424 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 425#define FLD(f) abuf->fields.fmt_empty.f 426 int UNUSED written = 0; 427 IADDR UNUSED pc = abuf->addr; 428 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 429 430 { 431#if WITH_SCACHE_PBB_M32R2F 432 m32r2f_pbb_after (current_cpu, sem_arg); 433#endif 434 } 435 436#undef FLD 437} 438 NEXT (vpc); 439 440 CASE (sem, INSN_X_BEFORE) : /* --before-- */ 441{ 442 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 443 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 444#define FLD(f) abuf->fields.fmt_empty.f 445 int UNUSED written = 0; 446 IADDR UNUSED pc = abuf->addr; 447 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 448 449 { 450#if WITH_SCACHE_PBB_M32R2F 451 m32r2f_pbb_before (current_cpu, sem_arg); 452#endif 453 } 454 455#undef FLD 456} 457 NEXT (vpc); 458 459 CASE (sem, INSN_X_CTI_CHAIN) : /* --cti-chain-- */ 460{ 461 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 462 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 463#define FLD(f) abuf->fields.fmt_empty.f 464 int UNUSED written = 0; 465 IADDR UNUSED pc = abuf->addr; 466 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 467 468 { 469#if WITH_SCACHE_PBB_M32R2F 470#ifdef DEFINE_SWITCH 471 vpc = m32r2f_pbb_cti_chain (current_cpu, sem_arg, 472 pbb_br_type, pbb_br_npc); 473 BREAK (sem); 474#else 475 /* FIXME: Allow provision of explicit ifmt spec in insn spec. */ 476 vpc = m32r2f_pbb_cti_chain (current_cpu, sem_arg, 477 CPU_PBB_BR_TYPE (current_cpu), 478 CPU_PBB_BR_NPC (current_cpu)); 479#endif 480#endif 481 } 482 483#undef FLD 484} 485 NEXT (vpc); 486 487 CASE (sem, INSN_X_CHAIN) : /* --chain-- */ 488{ 489 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 490 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 491#define FLD(f) abuf->fields.fmt_empty.f 492 int UNUSED written = 0; 493 IADDR UNUSED pc = abuf->addr; 494 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 495 496 { 497#if WITH_SCACHE_PBB_M32R2F 498 vpc = m32r2f_pbb_chain (current_cpu, sem_arg); 499#ifdef DEFINE_SWITCH 500 BREAK (sem); 501#endif 502#endif 503 } 504 505#undef FLD 506} 507 NEXT (vpc); 508 509 CASE (sem, INSN_X_BEGIN) : /* --begin-- */ 510{ 511 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 512 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 513#define FLD(f) abuf->fields.fmt_empty.f 514 int UNUSED written = 0; 515 IADDR UNUSED pc = abuf->addr; 516 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 517 518 { 519#if WITH_SCACHE_PBB_M32R2F 520#if defined DEFINE_SWITCH || defined FAST_P 521 /* In the switch case FAST_P is a constant, allowing several optimizations 522 in any called inline functions. */ 523 vpc = m32r2f_pbb_begin (current_cpu, FAST_P); 524#else 525#if 0 /* cgen engine can't handle dynamic fast/full switching yet. */ 526 vpc = m32r2f_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu))); 527#else 528 vpc = m32r2f_pbb_begin (current_cpu, 0); 529#endif 530#endif 531#endif 532 } 533 534#undef FLD 535} 536 NEXT (vpc); 537 538 CASE (sem, INSN_ADD) : /* add $dr,$sr */ 539{ 540 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 541 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 542#define FLD(f) abuf->fields.sfmt_add.f 543 int UNUSED written = 0; 544 IADDR UNUSED pc = abuf->addr; 545 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 546 547 { 548 SI opval = ADDSI (* FLD (i_dr), * FLD (i_sr)); 549 * FLD (i_dr) = opval; 550 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 551 } 552 553#undef FLD 554} 555 NEXT (vpc); 556 557 CASE (sem, INSN_ADD3) : /* add3 $dr,$sr,$hash$slo16 */ 558{ 559 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 560 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 561#define FLD(f) abuf->fields.sfmt_add3.f 562 int UNUSED written = 0; 563 IADDR UNUSED pc = abuf->addr; 564 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 565 566 { 567 SI opval = ADDSI (* FLD (i_sr), FLD (f_simm16)); 568 * FLD (i_dr) = opval; 569 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 570 } 571 572#undef FLD 573} 574 NEXT (vpc); 575 576 CASE (sem, INSN_AND) : /* and $dr,$sr */ 577{ 578 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 579 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 580#define FLD(f) abuf->fields.sfmt_add.f 581 int UNUSED written = 0; 582 IADDR UNUSED pc = abuf->addr; 583 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 584 585 { 586 SI opval = ANDSI (* FLD (i_dr), * FLD (i_sr)); 587 * FLD (i_dr) = opval; 588 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 589 } 590 591#undef FLD 592} 593 NEXT (vpc); 594 595 CASE (sem, INSN_AND3) : /* and3 $dr,$sr,$uimm16 */ 596{ 597 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 598 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 599#define FLD(f) abuf->fields.sfmt_and3.f 600 int UNUSED written = 0; 601 IADDR UNUSED pc = abuf->addr; 602 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 603 604 { 605 SI opval = ANDSI (* FLD (i_sr), FLD (f_uimm16)); 606 * FLD (i_dr) = opval; 607 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 608 } 609 610#undef FLD 611} 612 NEXT (vpc); 613 614 CASE (sem, INSN_OR) : /* or $dr,$sr */ 615{ 616 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 617 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 618#define FLD(f) abuf->fields.sfmt_add.f 619 int UNUSED written = 0; 620 IADDR UNUSED pc = abuf->addr; 621 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 622 623 { 624 SI opval = ORSI (* FLD (i_dr), * FLD (i_sr)); 625 * FLD (i_dr) = opval; 626 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 627 } 628 629#undef FLD 630} 631 NEXT (vpc); 632 633 CASE (sem, INSN_OR3) : /* or3 $dr,$sr,$hash$ulo16 */ 634{ 635 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 636 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 637#define FLD(f) abuf->fields.sfmt_and3.f 638 int UNUSED written = 0; 639 IADDR UNUSED pc = abuf->addr; 640 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 641 642 { 643 SI opval = ORSI (* FLD (i_sr), FLD (f_uimm16)); 644 * FLD (i_dr) = opval; 645 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 646 } 647 648#undef FLD 649} 650 NEXT (vpc); 651 652 CASE (sem, INSN_XOR) : /* xor $dr,$sr */ 653{ 654 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 655 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 656#define FLD(f) abuf->fields.sfmt_add.f 657 int UNUSED written = 0; 658 IADDR UNUSED pc = abuf->addr; 659 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 660 661 { 662 SI opval = XORSI (* FLD (i_dr), * FLD (i_sr)); 663 * FLD (i_dr) = opval; 664 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 665 } 666 667#undef FLD 668} 669 NEXT (vpc); 670 671 CASE (sem, INSN_XOR3) : /* xor3 $dr,$sr,$uimm16 */ 672{ 673 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 674 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 675#define FLD(f) abuf->fields.sfmt_and3.f 676 int UNUSED written = 0; 677 IADDR UNUSED pc = abuf->addr; 678 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 679 680 { 681 SI opval = XORSI (* FLD (i_sr), FLD (f_uimm16)); 682 * FLD (i_dr) = opval; 683 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 684 } 685 686#undef FLD 687} 688 NEXT (vpc); 689 690 CASE (sem, INSN_ADDI) : /* addi $dr,$simm8 */ 691{ 692 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 693 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 694#define FLD(f) abuf->fields.sfmt_addi.f 695 int UNUSED written = 0; 696 IADDR UNUSED pc = abuf->addr; 697 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 698 699 { 700 SI opval = ADDSI (* FLD (i_dr), FLD (f_simm8)); 701 * FLD (i_dr) = opval; 702 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 703 } 704 705#undef FLD 706} 707 NEXT (vpc); 708 709 CASE (sem, INSN_ADDV) : /* addv $dr,$sr */ 710{ 711 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 712 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 713#define FLD(f) abuf->fields.sfmt_add.f 714 int UNUSED written = 0; 715 IADDR UNUSED pc = abuf->addr; 716 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 717 718{ 719 SI temp0;BI temp1; 720 temp0 = ADDSI (* FLD (i_dr), * FLD (i_sr)); 721 temp1 = ADDOFSI (* FLD (i_dr), * FLD (i_sr), 0); 722 { 723 SI opval = temp0; 724 * FLD (i_dr) = opval; 725 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 726 } 727 { 728 BI opval = temp1; 729 CPU (h_cond) = opval; 730 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 731 } 732} 733 734#undef FLD 735} 736 NEXT (vpc); 737 738 CASE (sem, INSN_ADDV3) : /* addv3 $dr,$sr,$simm16 */ 739{ 740 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 741 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 742#define FLD(f) abuf->fields.sfmt_add3.f 743 int UNUSED written = 0; 744 IADDR UNUSED pc = abuf->addr; 745 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 746 747{ 748 SI temp0;BI temp1; 749 temp0 = ADDSI (* FLD (i_sr), FLD (f_simm16)); 750 temp1 = ADDOFSI (* FLD (i_sr), FLD (f_simm16), 0); 751 { 752 SI opval = temp0; 753 * FLD (i_dr) = opval; 754 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 755 } 756 { 757 BI opval = temp1; 758 CPU (h_cond) = opval; 759 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 760 } 761} 762 763#undef FLD 764} 765 NEXT (vpc); 766 767 CASE (sem, INSN_ADDX) : /* addx $dr,$sr */ 768{ 769 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 770 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 771#define FLD(f) abuf->fields.sfmt_add.f 772 int UNUSED written = 0; 773 IADDR UNUSED pc = abuf->addr; 774 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 775 776{ 777 SI temp0;BI temp1; 778 temp0 = ADDCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond)); 779 temp1 = ADDCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond)); 780 { 781 SI opval = temp0; 782 * FLD (i_dr) = opval; 783 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 784 } 785 { 786 BI opval = temp1; 787 CPU (h_cond) = opval; 788 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 789 } 790} 791 792#undef FLD 793} 794 NEXT (vpc); 795 796 CASE (sem, INSN_BC8) : /* bc.s $disp8 */ 797{ 798 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 799 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 800#define FLD(f) abuf->fields.sfmt_bl8.f 801 int UNUSED written = 0; 802 IADDR UNUSED pc = abuf->addr; 803 SEM_BRANCH_INIT 804 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 805 806if (CPU (h_cond)) { 807 { 808 USI opval = FLD (i_disp8); 809 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 810 written |= (1 << 2); 811 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 812 } 813} 814 815 abuf->written = written; 816 SEM_BRANCH_FINI (vpc); 817#undef FLD 818} 819 NEXT (vpc); 820 821 CASE (sem, INSN_BC24) : /* bc.l $disp24 */ 822{ 823 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 824 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 825#define FLD(f) abuf->fields.sfmt_bl24.f 826 int UNUSED written = 0; 827 IADDR UNUSED pc = abuf->addr; 828 SEM_BRANCH_INIT 829 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 830 831if (CPU (h_cond)) { 832 { 833 USI opval = FLD (i_disp24); 834 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 835 written |= (1 << 2); 836 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 837 } 838} 839 840 abuf->written = written; 841 SEM_BRANCH_FINI (vpc); 842#undef FLD 843} 844 NEXT (vpc); 845 846 CASE (sem, INSN_BEQ) : /* beq $src1,$src2,$disp16 */ 847{ 848 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 849 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 850#define FLD(f) abuf->fields.sfmt_beq.f 851 int UNUSED written = 0; 852 IADDR UNUSED pc = abuf->addr; 853 SEM_BRANCH_INIT 854 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 855 856if (EQSI (* FLD (i_src1), * FLD (i_src2))) { 857 { 858 USI opval = FLD (i_disp16); 859 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 860 written |= (1 << 3); 861 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 862 } 863} 864 865 abuf->written = written; 866 SEM_BRANCH_FINI (vpc); 867#undef FLD 868} 869 NEXT (vpc); 870 871 CASE (sem, INSN_BEQZ) : /* beqz $src2,$disp16 */ 872{ 873 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 874 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 875#define FLD(f) abuf->fields.sfmt_beq.f 876 int UNUSED written = 0; 877 IADDR UNUSED pc = abuf->addr; 878 SEM_BRANCH_INIT 879 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 880 881if (EQSI (* FLD (i_src2), 0)) { 882 { 883 USI opval = FLD (i_disp16); 884 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 885 written |= (1 << 2); 886 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 887 } 888} 889 890 abuf->written = written; 891 SEM_BRANCH_FINI (vpc); 892#undef FLD 893} 894 NEXT (vpc); 895 896 CASE (sem, INSN_BGEZ) : /* bgez $src2,$disp16 */ 897{ 898 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 899 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 900#define FLD(f) abuf->fields.sfmt_beq.f 901 int UNUSED written = 0; 902 IADDR UNUSED pc = abuf->addr; 903 SEM_BRANCH_INIT 904 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 905 906if (GESI (* FLD (i_src2), 0)) { 907 { 908 USI opval = FLD (i_disp16); 909 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 910 written |= (1 << 2); 911 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 912 } 913} 914 915 abuf->written = written; 916 SEM_BRANCH_FINI (vpc); 917#undef FLD 918} 919 NEXT (vpc); 920 921 CASE (sem, INSN_BGTZ) : /* bgtz $src2,$disp16 */ 922{ 923 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 924 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 925#define FLD(f) abuf->fields.sfmt_beq.f 926 int UNUSED written = 0; 927 IADDR UNUSED pc = abuf->addr; 928 SEM_BRANCH_INIT 929 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 930 931if (GTSI (* FLD (i_src2), 0)) { 932 { 933 USI opval = FLD (i_disp16); 934 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 935 written |= (1 << 2); 936 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 937 } 938} 939 940 abuf->written = written; 941 SEM_BRANCH_FINI (vpc); 942#undef FLD 943} 944 NEXT (vpc); 945 946 CASE (sem, INSN_BLEZ) : /* blez $src2,$disp16 */ 947{ 948 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 949 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 950#define FLD(f) abuf->fields.sfmt_beq.f 951 int UNUSED written = 0; 952 IADDR UNUSED pc = abuf->addr; 953 SEM_BRANCH_INIT 954 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 955 956if (LESI (* FLD (i_src2), 0)) { 957 { 958 USI opval = FLD (i_disp16); 959 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 960 written |= (1 << 2); 961 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 962 } 963} 964 965 abuf->written = written; 966 SEM_BRANCH_FINI (vpc); 967#undef FLD 968} 969 NEXT (vpc); 970 971 CASE (sem, INSN_BLTZ) : /* bltz $src2,$disp16 */ 972{ 973 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 974 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 975#define FLD(f) abuf->fields.sfmt_beq.f 976 int UNUSED written = 0; 977 IADDR UNUSED pc = abuf->addr; 978 SEM_BRANCH_INIT 979 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 980 981if (LTSI (* FLD (i_src2), 0)) { 982 { 983 USI opval = FLD (i_disp16); 984 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 985 written |= (1 << 2); 986 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 987 } 988} 989 990 abuf->written = written; 991 SEM_BRANCH_FINI (vpc); 992#undef FLD 993} 994 NEXT (vpc); 995 996 CASE (sem, INSN_BNEZ) : /* bnez $src2,$disp16 */ 997{ 998 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 999 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1000#define FLD(f) abuf->fields.sfmt_beq.f 1001 int UNUSED written = 0; 1002 IADDR UNUSED pc = abuf->addr; 1003 SEM_BRANCH_INIT 1004 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1005 1006if (NESI (* FLD (i_src2), 0)) { 1007 { 1008 USI opval = FLD (i_disp16); 1009 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 1010 written |= (1 << 2); 1011 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 1012 } 1013} 1014 1015 abuf->written = written; 1016 SEM_BRANCH_FINI (vpc); 1017#undef FLD 1018} 1019 NEXT (vpc); 1020 1021 CASE (sem, INSN_BL8) : /* bl.s $disp8 */ 1022{ 1023 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1024 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1025#define FLD(f) abuf->fields.sfmt_bl8.f 1026 int UNUSED written = 0; 1027 IADDR UNUSED pc = abuf->addr; 1028 SEM_BRANCH_INIT 1029 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1030 1031{ 1032 { 1033 SI opval = ADDSI (ANDSI (pc, -4), 4); 1034 CPU (h_gr[((UINT) 14)]) = opval; 1035 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1036 } 1037 { 1038 USI opval = FLD (i_disp8); 1039 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 1040 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 1041 } 1042} 1043 1044 SEM_BRANCH_FINI (vpc); 1045#undef FLD 1046} 1047 NEXT (vpc); 1048 1049 CASE (sem, INSN_BL24) : /* bl.l $disp24 */ 1050{ 1051 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1052 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1053#define FLD(f) abuf->fields.sfmt_bl24.f 1054 int UNUSED written = 0; 1055 IADDR UNUSED pc = abuf->addr; 1056 SEM_BRANCH_INIT 1057 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1058 1059{ 1060 { 1061 SI opval = ADDSI (pc, 4); 1062 CPU (h_gr[((UINT) 14)]) = opval; 1063 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1064 } 1065 { 1066 USI opval = FLD (i_disp24); 1067 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 1068 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 1069 } 1070} 1071 1072 SEM_BRANCH_FINI (vpc); 1073#undef FLD 1074} 1075 NEXT (vpc); 1076 1077 CASE (sem, INSN_BCL8) : /* bcl.s $disp8 */ 1078{ 1079 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1080 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1081#define FLD(f) abuf->fields.sfmt_bl8.f 1082 int UNUSED written = 0; 1083 IADDR UNUSED pc = abuf->addr; 1084 SEM_BRANCH_INIT 1085 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1086 1087if (CPU (h_cond)) { 1088{ 1089 { 1090 SI opval = ADDSI (ANDSI (pc, -4), 4); 1091 CPU (h_gr[((UINT) 14)]) = opval; 1092 written |= (1 << 3); 1093 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1094 } 1095 { 1096 USI opval = FLD (i_disp8); 1097 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 1098 written |= (1 << 4); 1099 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 1100 } 1101} 1102} 1103 1104 abuf->written = written; 1105 SEM_BRANCH_FINI (vpc); 1106#undef FLD 1107} 1108 NEXT (vpc); 1109 1110 CASE (sem, INSN_BCL24) : /* bcl.l $disp24 */ 1111{ 1112 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1113 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1114#define FLD(f) abuf->fields.sfmt_bl24.f 1115 int UNUSED written = 0; 1116 IADDR UNUSED pc = abuf->addr; 1117 SEM_BRANCH_INIT 1118 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1119 1120if (CPU (h_cond)) { 1121{ 1122 { 1123 SI opval = ADDSI (pc, 4); 1124 CPU (h_gr[((UINT) 14)]) = opval; 1125 written |= (1 << 3); 1126 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1127 } 1128 { 1129 USI opval = FLD (i_disp24); 1130 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 1131 written |= (1 << 4); 1132 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 1133 } 1134} 1135} 1136 1137 abuf->written = written; 1138 SEM_BRANCH_FINI (vpc); 1139#undef FLD 1140} 1141 NEXT (vpc); 1142 1143 CASE (sem, INSN_BNC8) : /* bnc.s $disp8 */ 1144{ 1145 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1146 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1147#define FLD(f) abuf->fields.sfmt_bl8.f 1148 int UNUSED written = 0; 1149 IADDR UNUSED pc = abuf->addr; 1150 SEM_BRANCH_INIT 1151 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1152 1153if (NOTBI (CPU (h_cond))) { 1154 { 1155 USI opval = FLD (i_disp8); 1156 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 1157 written |= (1 << 2); 1158 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 1159 } 1160} 1161 1162 abuf->written = written; 1163 SEM_BRANCH_FINI (vpc); 1164#undef FLD 1165} 1166 NEXT (vpc); 1167 1168 CASE (sem, INSN_BNC24) : /* bnc.l $disp24 */ 1169{ 1170 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1171 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1172#define FLD(f) abuf->fields.sfmt_bl24.f 1173 int UNUSED written = 0; 1174 IADDR UNUSED pc = abuf->addr; 1175 SEM_BRANCH_INIT 1176 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1177 1178if (NOTBI (CPU (h_cond))) { 1179 { 1180 USI opval = FLD (i_disp24); 1181 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 1182 written |= (1 << 2); 1183 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 1184 } 1185} 1186 1187 abuf->written = written; 1188 SEM_BRANCH_FINI (vpc); 1189#undef FLD 1190} 1191 NEXT (vpc); 1192 1193 CASE (sem, INSN_BNE) : /* bne $src1,$src2,$disp16 */ 1194{ 1195 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1196 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1197#define FLD(f) abuf->fields.sfmt_beq.f 1198 int UNUSED written = 0; 1199 IADDR UNUSED pc = abuf->addr; 1200 SEM_BRANCH_INIT 1201 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1202 1203if (NESI (* FLD (i_src1), * FLD (i_src2))) { 1204 { 1205 USI opval = FLD (i_disp16); 1206 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 1207 written |= (1 << 3); 1208 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 1209 } 1210} 1211 1212 abuf->written = written; 1213 SEM_BRANCH_FINI (vpc); 1214#undef FLD 1215} 1216 NEXT (vpc); 1217 1218 CASE (sem, INSN_BRA8) : /* bra.s $disp8 */ 1219{ 1220 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1221 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1222#define FLD(f) abuf->fields.sfmt_bl8.f 1223 int UNUSED written = 0; 1224 IADDR UNUSED pc = abuf->addr; 1225 SEM_BRANCH_INIT 1226 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1227 1228 { 1229 USI opval = FLD (i_disp8); 1230 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 1231 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 1232 } 1233 1234 SEM_BRANCH_FINI (vpc); 1235#undef FLD 1236} 1237 NEXT (vpc); 1238 1239 CASE (sem, INSN_BRA24) : /* bra.l $disp24 */ 1240{ 1241 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1242 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1243#define FLD(f) abuf->fields.sfmt_bl24.f 1244 int UNUSED written = 0; 1245 IADDR UNUSED pc = abuf->addr; 1246 SEM_BRANCH_INIT 1247 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1248 1249 { 1250 USI opval = FLD (i_disp24); 1251 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 1252 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 1253 } 1254 1255 SEM_BRANCH_FINI (vpc); 1256#undef FLD 1257} 1258 NEXT (vpc); 1259 1260 CASE (sem, INSN_BNCL8) : /* bncl.s $disp8 */ 1261{ 1262 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1263 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1264#define FLD(f) abuf->fields.sfmt_bl8.f 1265 int UNUSED written = 0; 1266 IADDR UNUSED pc = abuf->addr; 1267 SEM_BRANCH_INIT 1268 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1269 1270if (NOTBI (CPU (h_cond))) { 1271{ 1272 { 1273 SI opval = ADDSI (ANDSI (pc, -4), 4); 1274 CPU (h_gr[((UINT) 14)]) = opval; 1275 written |= (1 << 3); 1276 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1277 } 1278 { 1279 USI opval = FLD (i_disp8); 1280 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 1281 written |= (1 << 4); 1282 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 1283 } 1284} 1285} 1286 1287 abuf->written = written; 1288 SEM_BRANCH_FINI (vpc); 1289#undef FLD 1290} 1291 NEXT (vpc); 1292 1293 CASE (sem, INSN_BNCL24) : /* bncl.l $disp24 */ 1294{ 1295 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1296 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1297#define FLD(f) abuf->fields.sfmt_bl24.f 1298 int UNUSED written = 0; 1299 IADDR UNUSED pc = abuf->addr; 1300 SEM_BRANCH_INIT 1301 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1302 1303if (NOTBI (CPU (h_cond))) { 1304{ 1305 { 1306 SI opval = ADDSI (pc, 4); 1307 CPU (h_gr[((UINT) 14)]) = opval; 1308 written |= (1 << 3); 1309 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1310 } 1311 { 1312 USI opval = FLD (i_disp24); 1313 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 1314 written |= (1 << 4); 1315 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 1316 } 1317} 1318} 1319 1320 abuf->written = written; 1321 SEM_BRANCH_FINI (vpc); 1322#undef FLD 1323} 1324 NEXT (vpc); 1325 1326 CASE (sem, INSN_CMP) : /* cmp $src1,$src2 */ 1327{ 1328 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1329 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1330#define FLD(f) abuf->fields.sfmt_st_plus.f 1331 int UNUSED written = 0; 1332 IADDR UNUSED pc = abuf->addr; 1333 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1334 1335 { 1336 BI opval = LTSI (* FLD (i_src1), * FLD (i_src2)); 1337 CPU (h_cond) = opval; 1338 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 1339 } 1340 1341#undef FLD 1342} 1343 NEXT (vpc); 1344 1345 CASE (sem, INSN_CMPI) : /* cmpi $src2,$simm16 */ 1346{ 1347 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1348 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1349#define FLD(f) abuf->fields.sfmt_st_d.f 1350 int UNUSED written = 0; 1351 IADDR UNUSED pc = abuf->addr; 1352 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1353 1354 { 1355 BI opval = LTSI (* FLD (i_src2), FLD (f_simm16)); 1356 CPU (h_cond) = opval; 1357 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 1358 } 1359 1360#undef FLD 1361} 1362 NEXT (vpc); 1363 1364 CASE (sem, INSN_CMPU) : /* cmpu $src1,$src2 */ 1365{ 1366 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1367 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1368#define FLD(f) abuf->fields.sfmt_st_plus.f 1369 int UNUSED written = 0; 1370 IADDR UNUSED pc = abuf->addr; 1371 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1372 1373 { 1374 BI opval = LTUSI (* FLD (i_src1), * FLD (i_src2)); 1375 CPU (h_cond) = opval; 1376 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 1377 } 1378 1379#undef FLD 1380} 1381 NEXT (vpc); 1382 1383 CASE (sem, INSN_CMPUI) : /* cmpui $src2,$simm16 */ 1384{ 1385 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1386 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1387#define FLD(f) abuf->fields.sfmt_st_d.f 1388 int UNUSED written = 0; 1389 IADDR UNUSED pc = abuf->addr; 1390 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1391 1392 { 1393 BI opval = LTUSI (* FLD (i_src2), FLD (f_simm16)); 1394 CPU (h_cond) = opval; 1395 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 1396 } 1397 1398#undef FLD 1399} 1400 NEXT (vpc); 1401 1402 CASE (sem, INSN_CMPEQ) : /* cmpeq $src1,$src2 */ 1403{ 1404 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1405 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1406#define FLD(f) abuf->fields.sfmt_st_plus.f 1407 int UNUSED written = 0; 1408 IADDR UNUSED pc = abuf->addr; 1409 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1410 1411 { 1412 BI opval = EQSI (* FLD (i_src1), * FLD (i_src2)); 1413 CPU (h_cond) = opval; 1414 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 1415 } 1416 1417#undef FLD 1418} 1419 NEXT (vpc); 1420 1421 CASE (sem, INSN_CMPZ) : /* cmpz $src2 */ 1422{ 1423 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1424 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1425#define FLD(f) abuf->fields.sfmt_st_plus.f 1426 int UNUSED written = 0; 1427 IADDR UNUSED pc = abuf->addr; 1428 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1429 1430 { 1431 BI opval = EQSI (* FLD (i_src2), 0); 1432 CPU (h_cond) = opval; 1433 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 1434 } 1435 1436#undef FLD 1437} 1438 NEXT (vpc); 1439 1440 CASE (sem, INSN_DIV) : /* div $dr,$sr */ 1441{ 1442 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1443 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1444#define FLD(f) abuf->fields.sfmt_add.f 1445 int UNUSED written = 0; 1446 IADDR UNUSED pc = abuf->addr; 1447 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1448 1449if (NESI (* FLD (i_sr), 0)) { 1450 { 1451 SI opval = DIVSI (* FLD (i_dr), * FLD (i_sr)); 1452 * FLD (i_dr) = opval; 1453 written |= (1 << 2); 1454 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1455 } 1456} 1457 1458 abuf->written = written; 1459#undef FLD 1460} 1461 NEXT (vpc); 1462 1463 CASE (sem, INSN_DIVU) : /* divu $dr,$sr */ 1464{ 1465 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1466 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1467#define FLD(f) abuf->fields.sfmt_add.f 1468 int UNUSED written = 0; 1469 IADDR UNUSED pc = abuf->addr; 1470 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1471 1472if (NESI (* FLD (i_sr), 0)) { 1473 { 1474 SI opval = UDIVSI (* FLD (i_dr), * FLD (i_sr)); 1475 * FLD (i_dr) = opval; 1476 written |= (1 << 2); 1477 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1478 } 1479} 1480 1481 abuf->written = written; 1482#undef FLD 1483} 1484 NEXT (vpc); 1485 1486 CASE (sem, INSN_REM) : /* rem $dr,$sr */ 1487{ 1488 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1489 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1490#define FLD(f) abuf->fields.sfmt_add.f 1491 int UNUSED written = 0; 1492 IADDR UNUSED pc = abuf->addr; 1493 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1494 1495if (NESI (* FLD (i_sr), 0)) { 1496 { 1497 SI opval = MODSI (* FLD (i_dr), * FLD (i_sr)); 1498 * FLD (i_dr) = opval; 1499 written |= (1 << 2); 1500 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1501 } 1502} 1503 1504 abuf->written = written; 1505#undef FLD 1506} 1507 NEXT (vpc); 1508 1509 CASE (sem, INSN_REMU) : /* remu $dr,$sr */ 1510{ 1511 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1512 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1513#define FLD(f) abuf->fields.sfmt_add.f 1514 int UNUSED written = 0; 1515 IADDR UNUSED pc = abuf->addr; 1516 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1517 1518if (NESI (* FLD (i_sr), 0)) { 1519 { 1520 SI opval = UMODSI (* FLD (i_dr), * FLD (i_sr)); 1521 * FLD (i_dr) = opval; 1522 written |= (1 << 2); 1523 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1524 } 1525} 1526 1527 abuf->written = written; 1528#undef FLD 1529} 1530 NEXT (vpc); 1531 1532 CASE (sem, INSN_REMH) : /* remh $dr,$sr */ 1533{ 1534 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1535 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1536#define FLD(f) abuf->fields.sfmt_add.f 1537 int UNUSED written = 0; 1538 IADDR UNUSED pc = abuf->addr; 1539 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1540 1541if (NESI (* FLD (i_sr), 0)) { 1542 { 1543 SI opval = MODSI (EXTHISI (TRUNCSIHI (* FLD (i_dr))), * FLD (i_sr)); 1544 * FLD (i_dr) = opval; 1545 written |= (1 << 2); 1546 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1547 } 1548} 1549 1550 abuf->written = written; 1551#undef FLD 1552} 1553 NEXT (vpc); 1554 1555 CASE (sem, INSN_REMUH) : /* remuh $dr,$sr */ 1556{ 1557 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1558 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1559#define FLD(f) abuf->fields.sfmt_add.f 1560 int UNUSED written = 0; 1561 IADDR UNUSED pc = abuf->addr; 1562 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1563 1564if (NESI (* FLD (i_sr), 0)) { 1565 { 1566 SI opval = UMODSI (* FLD (i_dr), * FLD (i_sr)); 1567 * FLD (i_dr) = opval; 1568 written |= (1 << 2); 1569 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1570 } 1571} 1572 1573 abuf->written = written; 1574#undef FLD 1575} 1576 NEXT (vpc); 1577 1578 CASE (sem, INSN_REMB) : /* remb $dr,$sr */ 1579{ 1580 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1581 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1582#define FLD(f) abuf->fields.sfmt_add.f 1583 int UNUSED written = 0; 1584 IADDR UNUSED pc = abuf->addr; 1585 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1586 1587if (NESI (* FLD (i_sr), 0)) { 1588 { 1589 SI opval = MODSI (EXTBISI (TRUNCSIBI (* FLD (i_dr))), * FLD (i_sr)); 1590 * FLD (i_dr) = opval; 1591 written |= (1 << 2); 1592 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1593 } 1594} 1595 1596 abuf->written = written; 1597#undef FLD 1598} 1599 NEXT (vpc); 1600 1601 CASE (sem, INSN_REMUB) : /* remub $dr,$sr */ 1602{ 1603 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1604 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1605#define FLD(f) abuf->fields.sfmt_add.f 1606 int UNUSED written = 0; 1607 IADDR UNUSED pc = abuf->addr; 1608 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1609 1610if (NESI (* FLD (i_sr), 0)) { 1611 { 1612 SI opval = UMODSI (* FLD (i_dr), * FLD (i_sr)); 1613 * FLD (i_dr) = opval; 1614 written |= (1 << 2); 1615 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1616 } 1617} 1618 1619 abuf->written = written; 1620#undef FLD 1621} 1622 NEXT (vpc); 1623 1624 CASE (sem, INSN_DIVUH) : /* divuh $dr,$sr */ 1625{ 1626 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1627 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1628#define FLD(f) abuf->fields.sfmt_add.f 1629 int UNUSED written = 0; 1630 IADDR UNUSED pc = abuf->addr; 1631 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1632 1633if (NESI (* FLD (i_sr), 0)) { 1634 { 1635 SI opval = UDIVSI (* FLD (i_dr), * FLD (i_sr)); 1636 * FLD (i_dr) = opval; 1637 written |= (1 << 2); 1638 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1639 } 1640} 1641 1642 abuf->written = written; 1643#undef FLD 1644} 1645 NEXT (vpc); 1646 1647 CASE (sem, INSN_DIVB) : /* divb $dr,$sr */ 1648{ 1649 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1650 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1651#define FLD(f) abuf->fields.sfmt_add.f 1652 int UNUSED written = 0; 1653 IADDR UNUSED pc = abuf->addr; 1654 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1655 1656if (NESI (* FLD (i_sr), 0)) { 1657 { 1658 SI opval = DIVSI (EXTBISI (TRUNCSIBI (* FLD (i_dr))), * FLD (i_sr)); 1659 * FLD (i_dr) = opval; 1660 written |= (1 << 2); 1661 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1662 } 1663} 1664 1665 abuf->written = written; 1666#undef FLD 1667} 1668 NEXT (vpc); 1669 1670 CASE (sem, INSN_DIVUB) : /* divub $dr,$sr */ 1671{ 1672 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1673 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1674#define FLD(f) abuf->fields.sfmt_add.f 1675 int UNUSED written = 0; 1676 IADDR UNUSED pc = abuf->addr; 1677 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1678 1679if (NESI (* FLD (i_sr), 0)) { 1680 { 1681 SI opval = UDIVSI (* FLD (i_dr), * FLD (i_sr)); 1682 * FLD (i_dr) = opval; 1683 written |= (1 << 2); 1684 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1685 } 1686} 1687 1688 abuf->written = written; 1689#undef FLD 1690} 1691 NEXT (vpc); 1692 1693 CASE (sem, INSN_DIVH) : /* divh $dr,$sr */ 1694{ 1695 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1696 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1697#define FLD(f) abuf->fields.sfmt_add.f 1698 int UNUSED written = 0; 1699 IADDR UNUSED pc = abuf->addr; 1700 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1701 1702if (NESI (* FLD (i_sr), 0)) { 1703 { 1704 SI opval = DIVSI (EXTHISI (TRUNCSIHI (* FLD (i_dr))), * FLD (i_sr)); 1705 * FLD (i_dr) = opval; 1706 written |= (1 << 2); 1707 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1708 } 1709} 1710 1711 abuf->written = written; 1712#undef FLD 1713} 1714 NEXT (vpc); 1715 1716 CASE (sem, INSN_JC) : /* jc $sr */ 1717{ 1718 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1719 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1720#define FLD(f) abuf->fields.sfmt_jl.f 1721 int UNUSED written = 0; 1722 IADDR UNUSED pc = abuf->addr; 1723 SEM_BRANCH_INIT 1724 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1725 1726if (CPU (h_cond)) { 1727 { 1728 USI opval = ANDSI (* FLD (i_sr), -4); 1729 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); 1730 written |= (1 << 2); 1731 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 1732 } 1733} 1734 1735 abuf->written = written; 1736 SEM_BRANCH_FINI (vpc); 1737#undef FLD 1738} 1739 NEXT (vpc); 1740 1741 CASE (sem, INSN_JNC) : /* jnc $sr */ 1742{ 1743 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1744 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1745#define FLD(f) abuf->fields.sfmt_jl.f 1746 int UNUSED written = 0; 1747 IADDR UNUSED pc = abuf->addr; 1748 SEM_BRANCH_INIT 1749 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1750 1751if (NOTBI (CPU (h_cond))) { 1752 { 1753 USI opval = ANDSI (* FLD (i_sr), -4); 1754 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); 1755 written |= (1 << 2); 1756 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 1757 } 1758} 1759 1760 abuf->written = written; 1761 SEM_BRANCH_FINI (vpc); 1762#undef FLD 1763} 1764 NEXT (vpc); 1765 1766 CASE (sem, INSN_JL) : /* jl $sr */ 1767{ 1768 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1769 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1770#define FLD(f) abuf->fields.sfmt_jl.f 1771 int UNUSED written = 0; 1772 IADDR UNUSED pc = abuf->addr; 1773 SEM_BRANCH_INIT 1774 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1775 1776{ 1777 SI temp0;USI temp1; 1778 temp0 = ADDSI (ANDSI (pc, -4), 4); 1779 temp1 = ANDSI (* FLD (i_sr), -4); 1780 { 1781 SI opval = temp0; 1782 CPU (h_gr[((UINT) 14)]) = opval; 1783 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1784 } 1785 { 1786 USI opval = temp1; 1787 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); 1788 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 1789 } 1790} 1791 1792 SEM_BRANCH_FINI (vpc); 1793#undef FLD 1794} 1795 NEXT (vpc); 1796 1797 CASE (sem, INSN_JMP) : /* jmp $sr */ 1798{ 1799 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1800 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1801#define FLD(f) abuf->fields.sfmt_jl.f 1802 int UNUSED written = 0; 1803 IADDR UNUSED pc = abuf->addr; 1804 SEM_BRANCH_INIT 1805 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1806 1807 { 1808 USI opval = ANDSI (* FLD (i_sr), -4); 1809 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); 1810 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 1811 } 1812 1813 SEM_BRANCH_FINI (vpc); 1814#undef FLD 1815} 1816 NEXT (vpc); 1817 1818 CASE (sem, INSN_LD) : /* ld $dr,@$sr */ 1819{ 1820 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1821 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1822#define FLD(f) abuf->fields.sfmt_ld_plus.f 1823 int UNUSED written = 0; 1824 IADDR UNUSED pc = abuf->addr; 1825 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1826 1827 { 1828 SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr)); 1829 * FLD (i_dr) = opval; 1830 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1831 } 1832 1833#undef FLD 1834} 1835 NEXT (vpc); 1836 1837 CASE (sem, INSN_LD_D) : /* ld $dr,@($slo16,$sr) */ 1838{ 1839 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1840 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1841#define FLD(f) abuf->fields.sfmt_add3.f 1842 int UNUSED written = 0; 1843 IADDR UNUSED pc = abuf->addr; 1844 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1845 1846 { 1847 SI opval = GETMEMSI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))); 1848 * FLD (i_dr) = opval; 1849 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1850 } 1851 1852#undef FLD 1853} 1854 NEXT (vpc); 1855 1856 CASE (sem, INSN_LDB) : /* ldb $dr,@$sr */ 1857{ 1858 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1859 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1860#define FLD(f) abuf->fields.sfmt_ld_plus.f 1861 int UNUSED written = 0; 1862 IADDR UNUSED pc = abuf->addr; 1863 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1864 1865 { 1866 SI opval = EXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr))); 1867 * FLD (i_dr) = opval; 1868 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1869 } 1870 1871#undef FLD 1872} 1873 NEXT (vpc); 1874 1875 CASE (sem, INSN_LDB_D) : /* ldb $dr,@($slo16,$sr) */ 1876{ 1877 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1878 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1879#define FLD(f) abuf->fields.sfmt_add3.f 1880 int UNUSED written = 0; 1881 IADDR UNUSED pc = abuf->addr; 1882 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1883 1884 { 1885 SI opval = EXTQISI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)))); 1886 * FLD (i_dr) = opval; 1887 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1888 } 1889 1890#undef FLD 1891} 1892 NEXT (vpc); 1893 1894 CASE (sem, INSN_LDH) : /* ldh $dr,@$sr */ 1895{ 1896 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1897 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1898#define FLD(f) abuf->fields.sfmt_ld_plus.f 1899 int UNUSED written = 0; 1900 IADDR UNUSED pc = abuf->addr; 1901 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1902 1903 { 1904 SI opval = EXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr))); 1905 * FLD (i_dr) = opval; 1906 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1907 } 1908 1909#undef FLD 1910} 1911 NEXT (vpc); 1912 1913 CASE (sem, INSN_LDH_D) : /* ldh $dr,@($slo16,$sr) */ 1914{ 1915 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1916 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1917#define FLD(f) abuf->fields.sfmt_add3.f 1918 int UNUSED written = 0; 1919 IADDR UNUSED pc = abuf->addr; 1920 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1921 1922 { 1923 SI opval = EXTHISI (GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)))); 1924 * FLD (i_dr) = opval; 1925 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1926 } 1927 1928#undef FLD 1929} 1930 NEXT (vpc); 1931 1932 CASE (sem, INSN_LDUB) : /* ldub $dr,@$sr */ 1933{ 1934 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1935 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1936#define FLD(f) abuf->fields.sfmt_ld_plus.f 1937 int UNUSED written = 0; 1938 IADDR UNUSED pc = abuf->addr; 1939 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1940 1941 { 1942 SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr))); 1943 * FLD (i_dr) = opval; 1944 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1945 } 1946 1947#undef FLD 1948} 1949 NEXT (vpc); 1950 1951 CASE (sem, INSN_LDUB_D) : /* ldub $dr,@($slo16,$sr) */ 1952{ 1953 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1954 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1955#define FLD(f) abuf->fields.sfmt_add3.f 1956 int UNUSED written = 0; 1957 IADDR UNUSED pc = abuf->addr; 1958 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1959 1960 { 1961 SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)))); 1962 * FLD (i_dr) = opval; 1963 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1964 } 1965 1966#undef FLD 1967} 1968 NEXT (vpc); 1969 1970 CASE (sem, INSN_LDUH) : /* lduh $dr,@$sr */ 1971{ 1972 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1973 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1974#define FLD(f) abuf->fields.sfmt_ld_plus.f 1975 int UNUSED written = 0; 1976 IADDR UNUSED pc = abuf->addr; 1977 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1978 1979 { 1980 SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr))); 1981 * FLD (i_dr) = opval; 1982 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1983 } 1984 1985#undef FLD 1986} 1987 NEXT (vpc); 1988 1989 CASE (sem, INSN_LDUH_D) : /* lduh $dr,@($slo16,$sr) */ 1990{ 1991 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1992 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1993#define FLD(f) abuf->fields.sfmt_add3.f 1994 int UNUSED written = 0; 1995 IADDR UNUSED pc = abuf->addr; 1996 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1997 1998 { 1999 SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)))); 2000 * FLD (i_dr) = opval; 2001 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2002 } 2003 2004#undef FLD 2005} 2006 NEXT (vpc); 2007 2008 CASE (sem, INSN_LD_PLUS) : /* ld $dr,@$sr+ */ 2009{ 2010 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2011 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2012#define FLD(f) abuf->fields.sfmt_ld_plus.f 2013 int UNUSED written = 0; 2014 IADDR UNUSED pc = abuf->addr; 2015 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2016 2017{ 2018 SI temp0;SI temp1; 2019 temp0 = GETMEMSI (current_cpu, pc, * FLD (i_sr)); 2020 temp1 = ADDSI (* FLD (i_sr), 4); 2021 { 2022 SI opval = temp0; 2023 * FLD (i_dr) = opval; 2024 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2025 } 2026 { 2027 SI opval = temp1; 2028 * FLD (i_sr) = opval; 2029 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2030 } 2031} 2032 2033#undef FLD 2034} 2035 NEXT (vpc); 2036 2037 CASE (sem, INSN_LD24) : /* ld24 $dr,$uimm24 */ 2038{ 2039 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2040 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2041#define FLD(f) abuf->fields.sfmt_ld24.f 2042 int UNUSED written = 0; 2043 IADDR UNUSED pc = abuf->addr; 2044 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 2045 2046 { 2047 SI opval = FLD (i_uimm24); 2048 * FLD (i_dr) = opval; 2049 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2050 } 2051 2052#undef FLD 2053} 2054 NEXT (vpc); 2055 2056 CASE (sem, INSN_LDI8) : /* ldi8 $dr,$simm8 */ 2057{ 2058 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2059 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2060#define FLD(f) abuf->fields.sfmt_addi.f 2061 int UNUSED written = 0; 2062 IADDR UNUSED pc = abuf->addr; 2063 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2064 2065 { 2066 SI opval = FLD (f_simm8); 2067 * FLD (i_dr) = opval; 2068 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2069 } 2070 2071#undef FLD 2072} 2073 NEXT (vpc); 2074 2075 CASE (sem, INSN_LDI16) : /* ldi16 $dr,$hash$slo16 */ 2076{ 2077 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2078 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2079#define FLD(f) abuf->fields.sfmt_add3.f 2080 int UNUSED written = 0; 2081 IADDR UNUSED pc = abuf->addr; 2082 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 2083 2084 { 2085 SI opval = FLD (f_simm16); 2086 * FLD (i_dr) = opval; 2087 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2088 } 2089 2090#undef FLD 2091} 2092 NEXT (vpc); 2093 2094 CASE (sem, INSN_LOCK) : /* lock $dr,@$sr */ 2095{ 2096 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2097 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2098#define FLD(f) abuf->fields.sfmt_ld_plus.f 2099 int UNUSED written = 0; 2100 IADDR UNUSED pc = abuf->addr; 2101 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2102 2103{ 2104 { 2105 BI opval = 1; 2106 CPU (h_lock) = opval; 2107 TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval); 2108 } 2109 { 2110 SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr)); 2111 * FLD (i_dr) = opval; 2112 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2113 } 2114} 2115 2116#undef FLD 2117} 2118 NEXT (vpc); 2119 2120 CASE (sem, INSN_MACHI_A) : /* machi $src1,$src2,$acc */ 2121{ 2122 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2123 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2124#define FLD(f) abuf->fields.sfmt_machi_a.f 2125 int UNUSED written = 0; 2126 IADDR UNUSED pc = abuf->addr; 2127 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2128 2129 { 2130 DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))), 8), 8); 2131 SET_H_ACCUMS (FLD (f_acc), opval); 2132 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 2133 } 2134 2135#undef FLD 2136} 2137 NEXT (vpc); 2138 2139 CASE (sem, INSN_MACLO_A) : /* maclo $src1,$src2,$acc */ 2140{ 2141 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2142 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2143#define FLD(f) abuf->fields.sfmt_machi_a.f 2144 int UNUSED written = 0; 2145 IADDR UNUSED pc = abuf->addr; 2146 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2147 2148 { 2149 DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))), 8), 8); 2150 SET_H_ACCUMS (FLD (f_acc), opval); 2151 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 2152 } 2153 2154#undef FLD 2155} 2156 NEXT (vpc); 2157 2158 CASE (sem, INSN_MACWHI_A) : /* macwhi $src1,$src2,$acc */ 2159{ 2160 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2161 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2162#define FLD(f) abuf->fields.sfmt_machi_a.f 2163 int UNUSED written = 0; 2164 IADDR UNUSED pc = abuf->addr; 2165 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2166 2167 { 2168 DI opval = ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))); 2169 SET_H_ACCUMS (FLD (f_acc), opval); 2170 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 2171 } 2172 2173#undef FLD 2174} 2175 NEXT (vpc); 2176 2177 CASE (sem, INSN_MACWLO_A) : /* macwlo $src1,$src2,$acc */ 2178{ 2179 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2180 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2181#define FLD(f) abuf->fields.sfmt_machi_a.f 2182 int UNUSED written = 0; 2183 IADDR UNUSED pc = abuf->addr; 2184 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2185 2186 { 2187 DI opval = ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))); 2188 SET_H_ACCUMS (FLD (f_acc), opval); 2189 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 2190 } 2191 2192#undef FLD 2193} 2194 NEXT (vpc); 2195 2196 CASE (sem, INSN_MUL) : /* mul $dr,$sr */ 2197{ 2198 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2199 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2200#define FLD(f) abuf->fields.sfmt_add.f 2201 int UNUSED written = 0; 2202 IADDR UNUSED pc = abuf->addr; 2203 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2204 2205 { 2206 SI opval = MULSI (* FLD (i_dr), * FLD (i_sr)); 2207 * FLD (i_dr) = opval; 2208 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2209 } 2210 2211#undef FLD 2212} 2213 NEXT (vpc); 2214 2215 CASE (sem, INSN_MULHI_A) : /* mulhi $src1,$src2,$acc */ 2216{ 2217 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2218 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2219#define FLD(f) abuf->fields.sfmt_machi_a.f 2220 int UNUSED written = 0; 2221 IADDR UNUSED pc = abuf->addr; 2222 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2223 2224 { 2225 DI opval = SRADI (SLLDI (MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))), 16), 16); 2226 SET_H_ACCUMS (FLD (f_acc), opval); 2227 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 2228 } 2229 2230#undef FLD 2231} 2232 NEXT (vpc); 2233 2234 CASE (sem, INSN_MULLO_A) : /* mullo $src1,$src2,$acc */ 2235{ 2236 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2237 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2238#define FLD(f) abuf->fields.sfmt_machi_a.f 2239 int UNUSED written = 0; 2240 IADDR UNUSED pc = abuf->addr; 2241 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2242 2243 { 2244 DI opval = SRADI (SLLDI (MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 16), 16); 2245 SET_H_ACCUMS (FLD (f_acc), opval); 2246 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 2247 } 2248 2249#undef FLD 2250} 2251 NEXT (vpc); 2252 2253 CASE (sem, INSN_MULWHI_A) : /* mulwhi $src1,$src2,$acc */ 2254{ 2255 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2256 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2257#define FLD(f) abuf->fields.sfmt_machi_a.f 2258 int UNUSED written = 0; 2259 IADDR UNUSED pc = abuf->addr; 2260 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2261 2262 { 2263 DI opval = MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))); 2264 SET_H_ACCUMS (FLD (f_acc), opval); 2265 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 2266 } 2267 2268#undef FLD 2269} 2270 NEXT (vpc); 2271 2272 CASE (sem, INSN_MULWLO_A) : /* mulwlo $src1,$src2,$acc */ 2273{ 2274 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2275 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2276#define FLD(f) abuf->fields.sfmt_machi_a.f 2277 int UNUSED written = 0; 2278 IADDR UNUSED pc = abuf->addr; 2279 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2280 2281 { 2282 DI opval = MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))); 2283 SET_H_ACCUMS (FLD (f_acc), opval); 2284 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 2285 } 2286 2287#undef FLD 2288} 2289 NEXT (vpc); 2290 2291 CASE (sem, INSN_MV) : /* mv $dr,$sr */ 2292{ 2293 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2294 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2295#define FLD(f) abuf->fields.sfmt_ld_plus.f 2296 int UNUSED written = 0; 2297 IADDR UNUSED pc = abuf->addr; 2298 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2299 2300 { 2301 SI opval = * FLD (i_sr); 2302 * FLD (i_dr) = opval; 2303 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2304 } 2305 2306#undef FLD 2307} 2308 NEXT (vpc); 2309 2310 CASE (sem, INSN_MVFACHI_A) : /* mvfachi $dr,$accs */ 2311{ 2312 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2313 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2314#define FLD(f) abuf->fields.sfmt_mvfachi_a.f 2315 int UNUSED written = 0; 2316 IADDR UNUSED pc = abuf->addr; 2317 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2318 2319 { 2320 SI opval = TRUNCDISI (SRADI (GET_H_ACCUMS (FLD (f_accs)), 32)); 2321 * FLD (i_dr) = opval; 2322 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2323 } 2324 2325#undef FLD 2326} 2327 NEXT (vpc); 2328 2329 CASE (sem, INSN_MVFACLO_A) : /* mvfaclo $dr,$accs */ 2330{ 2331 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2332 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2333#define FLD(f) abuf->fields.sfmt_mvfachi_a.f 2334 int UNUSED written = 0; 2335 IADDR UNUSED pc = abuf->addr; 2336 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2337 2338 { 2339 SI opval = TRUNCDISI (GET_H_ACCUMS (FLD (f_accs))); 2340 * FLD (i_dr) = opval; 2341 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2342 } 2343 2344#undef FLD 2345} 2346 NEXT (vpc); 2347 2348 CASE (sem, INSN_MVFACMI_A) : /* mvfacmi $dr,$accs */ 2349{ 2350 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2351 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2352#define FLD(f) abuf->fields.sfmt_mvfachi_a.f 2353 int UNUSED written = 0; 2354 IADDR UNUSED pc = abuf->addr; 2355 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2356 2357 { 2358 SI opval = TRUNCDISI (SRADI (GET_H_ACCUMS (FLD (f_accs)), 16)); 2359 * FLD (i_dr) = opval; 2360 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2361 } 2362 2363#undef FLD 2364} 2365 NEXT (vpc); 2366 2367 CASE (sem, INSN_MVFC) : /* mvfc $dr,$scr */ 2368{ 2369 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2370 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2371#define FLD(f) abuf->fields.sfmt_ld_plus.f 2372 int UNUSED written = 0; 2373 IADDR UNUSED pc = abuf->addr; 2374 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2375 2376 { 2377 SI opval = GET_H_CR (FLD (f_r2)); 2378 * FLD (i_dr) = opval; 2379 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2380 } 2381 2382#undef FLD 2383} 2384 NEXT (vpc); 2385 2386 CASE (sem, INSN_MVTACHI_A) : /* mvtachi $src1,$accs */ 2387{ 2388 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2389 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2390#define FLD(f) abuf->fields.sfmt_mvtachi_a.f 2391 int UNUSED written = 0; 2392 IADDR UNUSED pc = abuf->addr; 2393 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2394 2395 { 2396 DI opval = ORDI (ANDDI (GET_H_ACCUMS (FLD (f_accs)), MAKEDI (0, 0xffffffff)), SLLDI (EXTSIDI (* FLD (i_src1)), 32)); 2397 SET_H_ACCUMS (FLD (f_accs), opval); 2398 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 2399 } 2400 2401#undef FLD 2402} 2403 NEXT (vpc); 2404 2405 CASE (sem, INSN_MVTACLO_A) : /* mvtaclo $src1,$accs */ 2406{ 2407 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2408 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2409#define FLD(f) abuf->fields.sfmt_mvtachi_a.f 2410 int UNUSED written = 0; 2411 IADDR UNUSED pc = abuf->addr; 2412 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2413 2414 { 2415 DI opval = ORDI (ANDDI (GET_H_ACCUMS (FLD (f_accs)), MAKEDI (0xffffffff, 0)), ZEXTSIDI (* FLD (i_src1))); 2416 SET_H_ACCUMS (FLD (f_accs), opval); 2417 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 2418 } 2419 2420#undef FLD 2421} 2422 NEXT (vpc); 2423 2424 CASE (sem, INSN_MVTC) : /* mvtc $sr,$dcr */ 2425{ 2426 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2427 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2428#define FLD(f) abuf->fields.sfmt_ld_plus.f 2429 int UNUSED written = 0; 2430 IADDR UNUSED pc = abuf->addr; 2431 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2432 2433 { 2434 USI opval = * FLD (i_sr); 2435 SET_H_CR (FLD (f_r1), opval); 2436 TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval); 2437 } 2438 2439#undef FLD 2440} 2441 NEXT (vpc); 2442 2443 CASE (sem, INSN_NEG) : /* neg $dr,$sr */ 2444{ 2445 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2446 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2447#define FLD(f) abuf->fields.sfmt_ld_plus.f 2448 int UNUSED written = 0; 2449 IADDR UNUSED pc = abuf->addr; 2450 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2451 2452 { 2453 SI opval = NEGSI (* FLD (i_sr)); 2454 * FLD (i_dr) = opval; 2455 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2456 } 2457 2458#undef FLD 2459} 2460 NEXT (vpc); 2461 2462 CASE (sem, INSN_NOP) : /* nop */ 2463{ 2464 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2465 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2466#define FLD(f) abuf->fields.fmt_empty.f 2467 int UNUSED written = 0; 2468 IADDR UNUSED pc = abuf->addr; 2469 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2470 2471PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr); 2472 2473#undef FLD 2474} 2475 NEXT (vpc); 2476 2477 CASE (sem, INSN_NOT) : /* not $dr,$sr */ 2478{ 2479 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2480 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2481#define FLD(f) abuf->fields.sfmt_ld_plus.f 2482 int UNUSED written = 0; 2483 IADDR UNUSED pc = abuf->addr; 2484 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2485 2486 { 2487 SI opval = INVSI (* FLD (i_sr)); 2488 * FLD (i_dr) = opval; 2489 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2490 } 2491 2492#undef FLD 2493} 2494 NEXT (vpc); 2495 2496 CASE (sem, INSN_RAC_DSI) : /* rac $accd,$accs,$imm1 */ 2497{ 2498 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2499 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2500#define FLD(f) abuf->fields.sfmt_rac_dsi.f 2501 int UNUSED written = 0; 2502 IADDR UNUSED pc = abuf->addr; 2503 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2504 2505{ 2506 DI tmp_tmp1; 2507 tmp_tmp1 = SLLDI (GET_H_ACCUMS (FLD (f_accs)), FLD (f_imm1)); 2508 tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 32768)); 2509 { 2510 DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0xffff0000))) ? (MAKEDI (32767, 0xffff0000)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0xffff0000))); 2511 SET_H_ACCUMS (FLD (f_accd), opval); 2512 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 2513 } 2514} 2515 2516#undef FLD 2517} 2518 NEXT (vpc); 2519 2520 CASE (sem, INSN_RACH_DSI) : /* rach $accd,$accs,$imm1 */ 2521{ 2522 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2523 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2524#define FLD(f) abuf->fields.sfmt_rac_dsi.f 2525 int UNUSED written = 0; 2526 IADDR UNUSED pc = abuf->addr; 2527 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2528 2529{ 2530 DI tmp_tmp1; 2531 tmp_tmp1 = SLLDI (GET_H_ACCUMS (FLD (f_accs)), FLD (f_imm1)); 2532 tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 0x80000000)); 2533 { 2534 DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0))) ? (MAKEDI (32767, 0)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0))); 2535 SET_H_ACCUMS (FLD (f_accd), opval); 2536 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 2537 } 2538} 2539 2540#undef FLD 2541} 2542 NEXT (vpc); 2543 2544 CASE (sem, INSN_RTE) : /* rte */ 2545{ 2546 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2547 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2548#define FLD(f) abuf->fields.fmt_empty.f 2549 int UNUSED written = 0; 2550 IADDR UNUSED pc = abuf->addr; 2551 SEM_BRANCH_INIT 2552 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2553 2554{ 2555 { 2556 USI opval = ANDSI (GET_H_CR (((UINT) 6)), -4); 2557 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); 2558 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 2559 } 2560 { 2561 USI opval = GET_H_CR (((UINT) 14)); 2562 SET_H_CR (((UINT) 6), opval); 2563 TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval); 2564 } 2565 { 2566 UQI opval = CPU (h_bpsw); 2567 SET_H_PSW (opval); 2568 TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval); 2569 } 2570 { 2571 UQI opval = CPU (h_bbpsw); 2572 CPU (h_bpsw) = opval; 2573 TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval); 2574 } 2575} 2576 2577 SEM_BRANCH_FINI (vpc); 2578#undef FLD 2579} 2580 NEXT (vpc); 2581 2582 CASE (sem, INSN_SETH) : /* seth $dr,$hash$hi16 */ 2583{ 2584 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2585 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2586#define FLD(f) abuf->fields.sfmt_seth.f 2587 int UNUSED written = 0; 2588 IADDR UNUSED pc = abuf->addr; 2589 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 2590 2591 { 2592 SI opval = SLLSI (FLD (f_hi16), 16); 2593 * FLD (i_dr) = opval; 2594 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2595 } 2596 2597#undef FLD 2598} 2599 NEXT (vpc); 2600 2601 CASE (sem, INSN_SLL) : /* sll $dr,$sr */ 2602{ 2603 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2604 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2605#define FLD(f) abuf->fields.sfmt_add.f 2606 int UNUSED written = 0; 2607 IADDR UNUSED pc = abuf->addr; 2608 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2609 2610 { 2611 SI opval = SLLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31)); 2612 * FLD (i_dr) = opval; 2613 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2614 } 2615 2616#undef FLD 2617} 2618 NEXT (vpc); 2619 2620 CASE (sem, INSN_SLL3) : /* sll3 $dr,$sr,$simm16 */ 2621{ 2622 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2623 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2624#define FLD(f) abuf->fields.sfmt_add3.f 2625 int UNUSED written = 0; 2626 IADDR UNUSED pc = abuf->addr; 2627 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 2628 2629 { 2630 SI opval = SLLSI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31)); 2631 * FLD (i_dr) = opval; 2632 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2633 } 2634 2635#undef FLD 2636} 2637 NEXT (vpc); 2638 2639 CASE (sem, INSN_SLLI) : /* slli $dr,$uimm5 */ 2640{ 2641 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2642 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2643#define FLD(f) abuf->fields.sfmt_slli.f 2644 int UNUSED written = 0; 2645 IADDR UNUSED pc = abuf->addr; 2646 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2647 2648 { 2649 SI opval = SLLSI (* FLD (i_dr), FLD (f_uimm5)); 2650 * FLD (i_dr) = opval; 2651 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2652 } 2653 2654#undef FLD 2655} 2656 NEXT (vpc); 2657 2658 CASE (sem, INSN_SRA) : /* sra $dr,$sr */ 2659{ 2660 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2661 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2662#define FLD(f) abuf->fields.sfmt_add.f 2663 int UNUSED written = 0; 2664 IADDR UNUSED pc = abuf->addr; 2665 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2666 2667 { 2668 SI opval = SRASI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31)); 2669 * FLD (i_dr) = opval; 2670 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2671 } 2672 2673#undef FLD 2674} 2675 NEXT (vpc); 2676 2677 CASE (sem, INSN_SRA3) : /* sra3 $dr,$sr,$simm16 */ 2678{ 2679 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2680 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2681#define FLD(f) abuf->fields.sfmt_add3.f 2682 int UNUSED written = 0; 2683 IADDR UNUSED pc = abuf->addr; 2684 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 2685 2686 { 2687 SI opval = SRASI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31)); 2688 * FLD (i_dr) = opval; 2689 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2690 } 2691 2692#undef FLD 2693} 2694 NEXT (vpc); 2695 2696 CASE (sem, INSN_SRAI) : /* srai $dr,$uimm5 */ 2697{ 2698 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2699 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2700#define FLD(f) abuf->fields.sfmt_slli.f 2701 int UNUSED written = 0; 2702 IADDR UNUSED pc = abuf->addr; 2703 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2704 2705 { 2706 SI opval = SRASI (* FLD (i_dr), FLD (f_uimm5)); 2707 * FLD (i_dr) = opval; 2708 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2709 } 2710 2711#undef FLD 2712} 2713 NEXT (vpc); 2714 2715 CASE (sem, INSN_SRL) : /* srl $dr,$sr */ 2716{ 2717 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2718 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2719#define FLD(f) abuf->fields.sfmt_add.f 2720 int UNUSED written = 0; 2721 IADDR UNUSED pc = abuf->addr; 2722 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2723 2724 { 2725 SI opval = SRLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31)); 2726 * FLD (i_dr) = opval; 2727 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2728 } 2729 2730#undef FLD 2731} 2732 NEXT (vpc); 2733 2734 CASE (sem, INSN_SRL3) : /* srl3 $dr,$sr,$simm16 */ 2735{ 2736 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2737 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2738#define FLD(f) abuf->fields.sfmt_add3.f 2739 int UNUSED written = 0; 2740 IADDR UNUSED pc = abuf->addr; 2741 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 2742 2743 { 2744 SI opval = SRLSI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31)); 2745 * FLD (i_dr) = opval; 2746 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2747 } 2748 2749#undef FLD 2750} 2751 NEXT (vpc); 2752 2753 CASE (sem, INSN_SRLI) : /* srli $dr,$uimm5 */ 2754{ 2755 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2756 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2757#define FLD(f) abuf->fields.sfmt_slli.f 2758 int UNUSED written = 0; 2759 IADDR UNUSED pc = abuf->addr; 2760 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2761 2762 { 2763 SI opval = SRLSI (* FLD (i_dr), FLD (f_uimm5)); 2764 * FLD (i_dr) = opval; 2765 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2766 } 2767 2768#undef FLD 2769} 2770 NEXT (vpc); 2771 2772 CASE (sem, INSN_ST) : /* st $src1,@$src2 */ 2773{ 2774 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2775 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2776#define FLD(f) abuf->fields.sfmt_st_plus.f 2777 int UNUSED written = 0; 2778 IADDR UNUSED pc = abuf->addr; 2779 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2780 2781 { 2782 SI opval = * FLD (i_src1); 2783 SETMEMSI (current_cpu, pc, * FLD (i_src2), opval); 2784 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 2785 } 2786 2787#undef FLD 2788} 2789 NEXT (vpc); 2790 2791 CASE (sem, INSN_ST_D) : /* st $src1,@($slo16,$src2) */ 2792{ 2793 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2794 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2795#define FLD(f) abuf->fields.sfmt_st_d.f 2796 int UNUSED written = 0; 2797 IADDR UNUSED pc = abuf->addr; 2798 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 2799 2800 { 2801 SI opval = * FLD (i_src1); 2802 SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval); 2803 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 2804 } 2805 2806#undef FLD 2807} 2808 NEXT (vpc); 2809 2810 CASE (sem, INSN_STB) : /* stb $src1,@$src2 */ 2811{ 2812 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2813 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2814#define FLD(f) abuf->fields.sfmt_st_plus.f 2815 int UNUSED written = 0; 2816 IADDR UNUSED pc = abuf->addr; 2817 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2818 2819 { 2820 QI opval = * FLD (i_src1); 2821 SETMEMQI (current_cpu, pc, * FLD (i_src2), opval); 2822 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 2823 } 2824 2825#undef FLD 2826} 2827 NEXT (vpc); 2828 2829 CASE (sem, INSN_STB_D) : /* stb $src1,@($slo16,$src2) */ 2830{ 2831 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2832 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2833#define FLD(f) abuf->fields.sfmt_st_d.f 2834 int UNUSED written = 0; 2835 IADDR UNUSED pc = abuf->addr; 2836 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 2837 2838 { 2839 QI opval = * FLD (i_src1); 2840 SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval); 2841 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 2842 } 2843 2844#undef FLD 2845} 2846 NEXT (vpc); 2847 2848 CASE (sem, INSN_STH) : /* sth $src1,@$src2 */ 2849{ 2850 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2851 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2852#define FLD(f) abuf->fields.sfmt_st_plus.f 2853 int UNUSED written = 0; 2854 IADDR UNUSED pc = abuf->addr; 2855 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2856 2857 { 2858 HI opval = * FLD (i_src1); 2859 SETMEMHI (current_cpu, pc, * FLD (i_src2), opval); 2860 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 2861 } 2862 2863#undef FLD 2864} 2865 NEXT (vpc); 2866 2867 CASE (sem, INSN_STH_D) : /* sth $src1,@($slo16,$src2) */ 2868{ 2869 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2870 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2871#define FLD(f) abuf->fields.sfmt_st_d.f 2872 int UNUSED written = 0; 2873 IADDR UNUSED pc = abuf->addr; 2874 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 2875 2876 { 2877 HI opval = * FLD (i_src1); 2878 SETMEMHI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval); 2879 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 2880 } 2881 2882#undef FLD 2883} 2884 NEXT (vpc); 2885 2886 CASE (sem, INSN_ST_PLUS) : /* st $src1,@+$src2 */ 2887{ 2888 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2889 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2890#define FLD(f) abuf->fields.sfmt_st_plus.f 2891 int UNUSED written = 0; 2892 IADDR UNUSED pc = abuf->addr; 2893 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2894 2895{ 2896 SI tmp_new_src2; 2897 tmp_new_src2 = ADDSI (* FLD (i_src2), 4); 2898 { 2899 SI opval = * FLD (i_src1); 2900 SETMEMSI (current_cpu, pc, tmp_new_src2, opval); 2901 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 2902 } 2903 { 2904 SI opval = tmp_new_src2; 2905 * FLD (i_src2) = opval; 2906 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2907 } 2908} 2909 2910#undef FLD 2911} 2912 NEXT (vpc); 2913 2914 CASE (sem, INSN_STH_PLUS) : /* sth $src1,@$src2+ */ 2915{ 2916 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2917 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2918#define FLD(f) abuf->fields.sfmt_st_plus.f 2919 int UNUSED written = 0; 2920 IADDR UNUSED pc = abuf->addr; 2921 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2922 2923{ 2924 HI tmp_new_src2; 2925 { 2926 HI opval = * FLD (i_src1); 2927 SETMEMHI (current_cpu, pc, tmp_new_src2, opval); 2928 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 2929 } 2930 tmp_new_src2 = ADDSI (* FLD (i_src2), 2); 2931 { 2932 SI opval = tmp_new_src2; 2933 * FLD (i_src2) = opval; 2934 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2935 } 2936} 2937 2938#undef FLD 2939} 2940 NEXT (vpc); 2941 2942 CASE (sem, INSN_STB_PLUS) : /* stb $src1,@$src2+ */ 2943{ 2944 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2945 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2946#define FLD(f) abuf->fields.sfmt_st_plus.f 2947 int UNUSED written = 0; 2948 IADDR UNUSED pc = abuf->addr; 2949 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2950 2951{ 2952 QI tmp_new_src2; 2953 { 2954 QI opval = * FLD (i_src1); 2955 SETMEMQI (current_cpu, pc, tmp_new_src2, opval); 2956 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 2957 } 2958 tmp_new_src2 = ADDSI (* FLD (i_src2), 1); 2959 { 2960 SI opval = tmp_new_src2; 2961 * FLD (i_src2) = opval; 2962 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2963 } 2964} 2965 2966#undef FLD 2967} 2968 NEXT (vpc); 2969 2970 CASE (sem, INSN_ST_MINUS) : /* st $src1,@-$src2 */ 2971{ 2972 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2973 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2974#define FLD(f) abuf->fields.sfmt_st_plus.f 2975 int UNUSED written = 0; 2976 IADDR UNUSED pc = abuf->addr; 2977 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2978 2979{ 2980 SI tmp_new_src2; 2981 tmp_new_src2 = SUBSI (* FLD (i_src2), 4); 2982 { 2983 SI opval = * FLD (i_src1); 2984 SETMEMSI (current_cpu, pc, tmp_new_src2, opval); 2985 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 2986 } 2987 { 2988 SI opval = tmp_new_src2; 2989 * FLD (i_src2) = opval; 2990 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2991 } 2992} 2993 2994#undef FLD 2995} 2996 NEXT (vpc); 2997 2998 CASE (sem, INSN_SUB) : /* sub $dr,$sr */ 2999{ 3000 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3001 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3002#define FLD(f) abuf->fields.sfmt_add.f 3003 int UNUSED written = 0; 3004 IADDR UNUSED pc = abuf->addr; 3005 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3006 3007 { 3008 SI opval = SUBSI (* FLD (i_dr), * FLD (i_sr)); 3009 * FLD (i_dr) = opval; 3010 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3011 } 3012 3013#undef FLD 3014} 3015 NEXT (vpc); 3016 3017 CASE (sem, INSN_SUBV) : /* subv $dr,$sr */ 3018{ 3019 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3020 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3021#define FLD(f) abuf->fields.sfmt_add.f 3022 int UNUSED written = 0; 3023 IADDR UNUSED pc = abuf->addr; 3024 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3025 3026{ 3027 SI temp0;BI temp1; 3028 temp0 = SUBSI (* FLD (i_dr), * FLD (i_sr)); 3029 temp1 = SUBOFSI (* FLD (i_dr), * FLD (i_sr), 0); 3030 { 3031 SI opval = temp0; 3032 * FLD (i_dr) = opval; 3033 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3034 } 3035 { 3036 BI opval = temp1; 3037 CPU (h_cond) = opval; 3038 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 3039 } 3040} 3041 3042#undef FLD 3043} 3044 NEXT (vpc); 3045 3046 CASE (sem, INSN_SUBX) : /* subx $dr,$sr */ 3047{ 3048 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3049 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3050#define FLD(f) abuf->fields.sfmt_add.f 3051 int UNUSED written = 0; 3052 IADDR UNUSED pc = abuf->addr; 3053 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3054 3055{ 3056 SI temp0;BI temp1; 3057 temp0 = SUBCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond)); 3058 temp1 = SUBCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond)); 3059 { 3060 SI opval = temp0; 3061 * FLD (i_dr) = opval; 3062 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3063 } 3064 { 3065 BI opval = temp1; 3066 CPU (h_cond) = opval; 3067 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 3068 } 3069} 3070 3071#undef FLD 3072} 3073 NEXT (vpc); 3074 3075 CASE (sem, INSN_TRAP) : /* trap $uimm4 */ 3076{ 3077 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3078 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3079#define FLD(f) abuf->fields.sfmt_trap.f 3080 int UNUSED written = 0; 3081 IADDR UNUSED pc = abuf->addr; 3082 SEM_BRANCH_INIT 3083 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3084 3085{ 3086 { 3087 USI opval = GET_H_CR (((UINT) 6)); 3088 SET_H_CR (((UINT) 14), opval); 3089 TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval); 3090 } 3091 { 3092 USI opval = ADDSI (pc, 4); 3093 SET_H_CR (((UINT) 6), opval); 3094 TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval); 3095 } 3096 { 3097 UQI opval = CPU (h_bpsw); 3098 CPU (h_bbpsw) = opval; 3099 TRACE_RESULT (current_cpu, abuf, "bbpsw", 'x', opval); 3100 } 3101 { 3102 UQI opval = GET_H_PSW (); 3103 CPU (h_bpsw) = opval; 3104 TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval); 3105 } 3106 { 3107 UQI opval = ANDQI (GET_H_PSW (), 128); 3108 SET_H_PSW (opval); 3109 TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval); 3110 } 3111 { 3112 SI opval = m32r_trap (current_cpu, pc, FLD (f_uimm4)); 3113 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); 3114 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 3115 } 3116} 3117 3118 SEM_BRANCH_FINI (vpc); 3119#undef FLD 3120} 3121 NEXT (vpc); 3122 3123 CASE (sem, INSN_UNLOCK) : /* unlock $src1,@$src2 */ 3124{ 3125 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3126 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3127#define FLD(f) abuf->fields.sfmt_st_plus.f 3128 int UNUSED written = 0; 3129 IADDR UNUSED pc = abuf->addr; 3130 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3131 3132{ 3133if (CPU (h_lock)) { 3134 { 3135 SI opval = * FLD (i_src1); 3136 SETMEMSI (current_cpu, pc, * FLD (i_src2), opval); 3137 written |= (1 << 4); 3138 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 3139 } 3140} 3141 { 3142 BI opval = 0; 3143 CPU (h_lock) = opval; 3144 TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval); 3145 } 3146} 3147 3148 abuf->written = written; 3149#undef FLD 3150} 3151 NEXT (vpc); 3152 3153 CASE (sem, INSN_SATB) : /* satb $dr,$sr */ 3154{ 3155 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3156 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3157#define FLD(f) abuf->fields.sfmt_ld_plus.f 3158 int UNUSED written = 0; 3159 IADDR UNUSED pc = abuf->addr; 3160 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 3161 3162 { 3163 SI opval = (GESI (* FLD (i_sr), 127)) ? (127) : (LESI (* FLD (i_sr), -128)) ? (-128) : (* FLD (i_sr)); 3164 * FLD (i_dr) = opval; 3165 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3166 } 3167 3168#undef FLD 3169} 3170 NEXT (vpc); 3171 3172 CASE (sem, INSN_SATH) : /* sath $dr,$sr */ 3173{ 3174 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3175 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3176#define FLD(f) abuf->fields.sfmt_ld_plus.f 3177 int UNUSED written = 0; 3178 IADDR UNUSED pc = abuf->addr; 3179 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 3180 3181 { 3182 SI opval = (GESI (* FLD (i_sr), 32767)) ? (32767) : (LESI (* FLD (i_sr), -32768)) ? (-32768) : (* FLD (i_sr)); 3183 * FLD (i_dr) = opval; 3184 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3185 } 3186 3187#undef FLD 3188} 3189 NEXT (vpc); 3190 3191 CASE (sem, INSN_SAT) : /* sat $dr,$sr */ 3192{ 3193 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3194 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3195#define FLD(f) abuf->fields.sfmt_ld_plus.f 3196 int UNUSED written = 0; 3197 IADDR UNUSED pc = abuf->addr; 3198 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 3199 3200 { 3201 SI opval = ((CPU (h_cond)) ? (((LTSI (* FLD (i_sr), 0)) ? (2147483647) : (0x80000000))) : (* FLD (i_sr))); 3202 * FLD (i_dr) = opval; 3203 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3204 } 3205 3206#undef FLD 3207} 3208 NEXT (vpc); 3209 3210 CASE (sem, INSN_PCMPBZ) : /* pcmpbz $src2 */ 3211{ 3212 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3213 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3214#define FLD(f) abuf->fields.sfmt_st_plus.f 3215 int UNUSED written = 0; 3216 IADDR UNUSED pc = abuf->addr; 3217 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3218 3219 { 3220 BI opval = (EQSI (ANDSI (* FLD (i_src2), 255), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 65280), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 16711680), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 0xff000000), 0)) ? (1) : (0); 3221 CPU (h_cond) = opval; 3222 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 3223 } 3224 3225#undef FLD 3226} 3227 NEXT (vpc); 3228 3229 CASE (sem, INSN_SADD) : /* sadd */ 3230{ 3231 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3232 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3233#define FLD(f) abuf->fields.fmt_empty.f 3234 int UNUSED written = 0; 3235 IADDR UNUSED pc = abuf->addr; 3236 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3237 3238 { 3239 DI opval = ADDDI (SRADI (GET_H_ACCUMS (((UINT) 1)), 16), GET_H_ACCUMS (((UINT) 0))); 3240 SET_H_ACCUMS (((UINT) 0), opval); 3241 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 3242 } 3243 3244#undef FLD 3245} 3246 NEXT (vpc); 3247 3248 CASE (sem, INSN_MACWU1) : /* macwu1 $src1,$src2 */ 3249{ 3250 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3251 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3252#define FLD(f) abuf->fields.sfmt_st_plus.f 3253 int UNUSED written = 0; 3254 IADDR UNUSED pc = abuf->addr; 3255 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3256 3257 { 3258 DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (((UINT) 1)), MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535)))), 8), 8); 3259 SET_H_ACCUMS (((UINT) 1), opval); 3260 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 3261 } 3262 3263#undef FLD 3264} 3265 NEXT (vpc); 3266 3267 CASE (sem, INSN_MSBLO) : /* msblo $src1,$src2 */ 3268{ 3269 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3270 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3271#define FLD(f) abuf->fields.sfmt_st_plus.f 3272 int UNUSED written = 0; 3273 IADDR UNUSED pc = abuf->addr; 3274 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3275 3276 { 3277 DI opval = SRADI (SLLDI (SUBDI (GET_H_ACCUM (), SRADI (SLLDI (MULDI (EXTHIDI (TRUNCSIHI (* FLD (i_src1))), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 32), 16)), 8), 8); 3278 SET_H_ACCUM (opval); 3279 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval); 3280 } 3281 3282#undef FLD 3283} 3284 NEXT (vpc); 3285 3286 CASE (sem, INSN_MULWU1) : /* mulwu1 $src1,$src2 */ 3287{ 3288 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3289 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3290#define FLD(f) abuf->fields.sfmt_st_plus.f 3291 int UNUSED written = 0; 3292 IADDR UNUSED pc = abuf->addr; 3293 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3294 3295 { 3296 DI opval = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535))), 16), 16); 3297 SET_H_ACCUMS (((UINT) 1), opval); 3298 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 3299 } 3300 3301#undef FLD 3302} 3303 NEXT (vpc); 3304 3305 CASE (sem, INSN_MACLH1) : /* maclh1 $src1,$src2 */ 3306{ 3307 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3308 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3309#define FLD(f) abuf->fields.sfmt_st_plus.f 3310 int UNUSED written = 0; 3311 IADDR UNUSED pc = abuf->addr; 3312 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3313 3314 { 3315 DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (((UINT) 1)), SLLDI (EXTSIDI (MULSI (EXTHISI (TRUNCSIHI (* FLD (i_src1))), SRASI (* FLD (i_src2), 16))), 16)), 8), 8); 3316 SET_H_ACCUMS (((UINT) 1), opval); 3317 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 3318 } 3319 3320#undef FLD 3321} 3322 NEXT (vpc); 3323 3324 CASE (sem, INSN_SC) : /* sc */ 3325{ 3326 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3327 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3328#define FLD(f) abuf->fields.fmt_empty.f 3329 int UNUSED written = 0; 3330 IADDR UNUSED pc = abuf->addr; 3331 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3332 3333if (ZEXTBISI (CPU (h_cond))) 3334 SEM_SKIP_INSN (current_cpu, sem_arg, vpc); 3335 3336#undef FLD 3337} 3338 NEXT (vpc); 3339 3340 CASE (sem, INSN_SNC) : /* snc */ 3341{ 3342 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3343 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3344#define FLD(f) abuf->fields.fmt_empty.f 3345 int UNUSED written = 0; 3346 IADDR UNUSED pc = abuf->addr; 3347 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3348 3349if (ZEXTBISI (NOTBI (CPU (h_cond)))) 3350 SEM_SKIP_INSN (current_cpu, sem_arg, vpc); 3351 3352#undef FLD 3353} 3354 NEXT (vpc); 3355 3356 CASE (sem, INSN_CLRPSW) : /* clrpsw $uimm8 */ 3357{ 3358 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3359 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3360#define FLD(f) abuf->fields.sfmt_clrpsw.f 3361 int UNUSED written = 0; 3362 IADDR UNUSED pc = abuf->addr; 3363 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3364 3365 { 3366 SI opval = ANDSI (GET_H_CR (((UINT) 0)), ORSI (INVBI (FLD (f_uimm8)), 65280)); 3367 SET_H_CR (((UINT) 0), opval); 3368 TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval); 3369 } 3370 3371#undef FLD 3372} 3373 NEXT (vpc); 3374 3375 CASE (sem, INSN_SETPSW) : /* setpsw $uimm8 */ 3376{ 3377 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3378 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3379#define FLD(f) abuf->fields.sfmt_clrpsw.f 3380 int UNUSED written = 0; 3381 IADDR UNUSED pc = abuf->addr; 3382 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3383 3384 { 3385 SI opval = FLD (f_uimm8); 3386 SET_H_CR (((UINT) 0), opval); 3387 TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval); 3388 } 3389 3390#undef FLD 3391} 3392 NEXT (vpc); 3393 3394 CASE (sem, INSN_BSET) : /* bset $uimm3,@($slo16,$sr) */ 3395{ 3396 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3397 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3398#define FLD(f) abuf->fields.sfmt_bset.f 3399 int UNUSED written = 0; 3400 IADDR UNUSED pc = abuf->addr; 3401 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 3402 3403 { 3404 QI opval = ORQI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))), SLLSI (1, SUBSI (7, FLD (f_uimm3)))); 3405 SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)), opval); 3406 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 3407 } 3408 3409#undef FLD 3410} 3411 NEXT (vpc); 3412 3413 CASE (sem, INSN_BCLR) : /* bclr $uimm3,@($slo16,$sr) */ 3414{ 3415 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3416 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3417#define FLD(f) abuf->fields.sfmt_bset.f 3418 int UNUSED written = 0; 3419 IADDR UNUSED pc = abuf->addr; 3420 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 3421 3422 { 3423 QI opval = ANDQI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))), INVQI (SLLSI (1, SUBSI (7, FLD (f_uimm3))))); 3424 SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)), opval); 3425 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 3426 } 3427 3428#undef FLD 3429} 3430 NEXT (vpc); 3431 3432 CASE (sem, INSN_BTST) : /* btst $uimm3,$sr */ 3433{ 3434 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3435 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3436#define FLD(f) abuf->fields.sfmt_bset.f 3437 int UNUSED written = 0; 3438 IADDR UNUSED pc = abuf->addr; 3439 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3440 3441 { 3442 BI opval = ANDQI (SRLSI (* FLD (i_sr), SUBSI (7, FLD (f_uimm3))), 1); 3443 CPU (h_cond) = opval; 3444 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 3445 } 3446 3447#undef FLD 3448} 3449 NEXT (vpc); 3450 3451 CASE (sem, INSN_PAR_ADD) : /* add $dr,$sr */ 3452{ 3453 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3454 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3455#define FLD(f) abuf->fields.sfmt_add.f 3456#define OPRND(f) par_exec->operands.sfmt_add.f 3457 int UNUSED written = 0; 3458 IADDR UNUSED pc = abuf->addr; 3459 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3460 3461 { 3462 SI opval = ADDSI (* FLD (i_dr), * FLD (i_sr)); 3463 OPRND (dr) = opval; 3464 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3465 } 3466 3467#undef OPRND 3468#undef FLD 3469} 3470 NEXT (vpc); 3471 3472CASE (sem, INSN_WRITE_ADD) : /* add $dr,$sr */ 3473 { 3474 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3475 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 3476#define FLD(f) abuf->fields.sfmt_add.f 3477#define OPRND(f) par_exec->operands.sfmt_add.f 3478 int UNUSED written = abuf->written; 3479 IADDR UNUSED pc = abuf->addr; 3480 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 3481 3482 * FLD (i_dr) = OPRND (dr); 3483 3484#undef OPRND 3485#undef FLD 3486 } 3487 NEXT (vpc); 3488 3489 CASE (sem, INSN_PAR_AND) : /* and $dr,$sr */ 3490{ 3491 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3492 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3493#define FLD(f) abuf->fields.sfmt_add.f 3494#define OPRND(f) par_exec->operands.sfmt_add.f 3495 int UNUSED written = 0; 3496 IADDR UNUSED pc = abuf->addr; 3497 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3498 3499 { 3500 SI opval = ANDSI (* FLD (i_dr), * FLD (i_sr)); 3501 OPRND (dr) = opval; 3502 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3503 } 3504 3505#undef OPRND 3506#undef FLD 3507} 3508 NEXT (vpc); 3509 3510CASE (sem, INSN_WRITE_AND) : /* and $dr,$sr */ 3511 { 3512 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3513 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 3514#define FLD(f) abuf->fields.sfmt_add.f 3515#define OPRND(f) par_exec->operands.sfmt_add.f 3516 int UNUSED written = abuf->written; 3517 IADDR UNUSED pc = abuf->addr; 3518 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 3519 3520 * FLD (i_dr) = OPRND (dr); 3521 3522#undef OPRND 3523#undef FLD 3524 } 3525 NEXT (vpc); 3526 3527 CASE (sem, INSN_PAR_OR) : /* or $dr,$sr */ 3528{ 3529 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3530 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3531#define FLD(f) abuf->fields.sfmt_add.f 3532#define OPRND(f) par_exec->operands.sfmt_add.f 3533 int UNUSED written = 0; 3534 IADDR UNUSED pc = abuf->addr; 3535 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3536 3537 { 3538 SI opval = ORSI (* FLD (i_dr), * FLD (i_sr)); 3539 OPRND (dr) = opval; 3540 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3541 } 3542 3543#undef OPRND 3544#undef FLD 3545} 3546 NEXT (vpc); 3547 3548CASE (sem, INSN_WRITE_OR) : /* or $dr,$sr */ 3549 { 3550 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3551 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 3552#define FLD(f) abuf->fields.sfmt_add.f 3553#define OPRND(f) par_exec->operands.sfmt_add.f 3554 int UNUSED written = abuf->written; 3555 IADDR UNUSED pc = abuf->addr; 3556 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 3557 3558 * FLD (i_dr) = OPRND (dr); 3559 3560#undef OPRND 3561#undef FLD 3562 } 3563 NEXT (vpc); 3564 3565 CASE (sem, INSN_PAR_XOR) : /* xor $dr,$sr */ 3566{ 3567 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3568 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3569#define FLD(f) abuf->fields.sfmt_add.f 3570#define OPRND(f) par_exec->operands.sfmt_add.f 3571 int UNUSED written = 0; 3572 IADDR UNUSED pc = abuf->addr; 3573 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3574 3575 { 3576 SI opval = XORSI (* FLD (i_dr), * FLD (i_sr)); 3577 OPRND (dr) = opval; 3578 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3579 } 3580 3581#undef OPRND 3582#undef FLD 3583} 3584 NEXT (vpc); 3585 3586CASE (sem, INSN_WRITE_XOR) : /* xor $dr,$sr */ 3587 { 3588 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3589 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 3590#define FLD(f) abuf->fields.sfmt_add.f 3591#define OPRND(f) par_exec->operands.sfmt_add.f 3592 int UNUSED written = abuf->written; 3593 IADDR UNUSED pc = abuf->addr; 3594 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 3595 3596 * FLD (i_dr) = OPRND (dr); 3597 3598#undef OPRND 3599#undef FLD 3600 } 3601 NEXT (vpc); 3602 3603 CASE (sem, INSN_PAR_ADDI) : /* addi $dr,$simm8 */ 3604{ 3605 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3606 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3607#define FLD(f) abuf->fields.sfmt_addi.f 3608#define OPRND(f) par_exec->operands.sfmt_addi.f 3609 int UNUSED written = 0; 3610 IADDR UNUSED pc = abuf->addr; 3611 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3612 3613 { 3614 SI opval = ADDSI (* FLD (i_dr), FLD (f_simm8)); 3615 OPRND (dr) = opval; 3616 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3617 } 3618 3619#undef OPRND 3620#undef FLD 3621} 3622 NEXT (vpc); 3623 3624CASE (sem, INSN_WRITE_ADDI) : /* addi $dr,$simm8 */ 3625 { 3626 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3627 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 3628#define FLD(f) abuf->fields.sfmt_addi.f 3629#define OPRND(f) par_exec->operands.sfmt_addi.f 3630 int UNUSED written = abuf->written; 3631 IADDR UNUSED pc = abuf->addr; 3632 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 3633 3634 * FLD (i_dr) = OPRND (dr); 3635 3636#undef OPRND 3637#undef FLD 3638 } 3639 NEXT (vpc); 3640 3641 CASE (sem, INSN_PAR_ADDV) : /* addv $dr,$sr */ 3642{ 3643 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3644 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3645#define FLD(f) abuf->fields.sfmt_add.f 3646#define OPRND(f) par_exec->operands.sfmt_addv.f 3647 int UNUSED written = 0; 3648 IADDR UNUSED pc = abuf->addr; 3649 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3650 3651{ 3652 SI temp0;BI temp1; 3653 temp0 = ADDSI (* FLD (i_dr), * FLD (i_sr)); 3654 temp1 = ADDOFSI (* FLD (i_dr), * FLD (i_sr), 0); 3655 { 3656 SI opval = temp0; 3657 OPRND (dr) = opval; 3658 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3659 } 3660 { 3661 BI opval = temp1; 3662 OPRND (condbit) = opval; 3663 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 3664 } 3665} 3666 3667#undef OPRND 3668#undef FLD 3669} 3670 NEXT (vpc); 3671 3672CASE (sem, INSN_WRITE_ADDV) : /* addv $dr,$sr */ 3673 { 3674 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3675 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 3676#define FLD(f) abuf->fields.sfmt_add.f 3677#define OPRND(f) par_exec->operands.sfmt_addv.f 3678 int UNUSED written = abuf->written; 3679 IADDR UNUSED pc = abuf->addr; 3680 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 3681 3682 CPU (h_cond) = OPRND (condbit); 3683 * FLD (i_dr) = OPRND (dr); 3684 3685#undef OPRND 3686#undef FLD 3687 } 3688 NEXT (vpc); 3689 3690 CASE (sem, INSN_PAR_ADDX) : /* addx $dr,$sr */ 3691{ 3692 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3693 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3694#define FLD(f) abuf->fields.sfmt_add.f 3695#define OPRND(f) par_exec->operands.sfmt_addx.f 3696 int UNUSED written = 0; 3697 IADDR UNUSED pc = abuf->addr; 3698 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3699 3700{ 3701 SI temp0;BI temp1; 3702 temp0 = ADDCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond)); 3703 temp1 = ADDCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond)); 3704 { 3705 SI opval = temp0; 3706 OPRND (dr) = opval; 3707 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3708 } 3709 { 3710 BI opval = temp1; 3711 OPRND (condbit) = opval; 3712 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 3713 } 3714} 3715 3716#undef OPRND 3717#undef FLD 3718} 3719 NEXT (vpc); 3720 3721CASE (sem, INSN_WRITE_ADDX) : /* addx $dr,$sr */ 3722 { 3723 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3724 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 3725#define FLD(f) abuf->fields.sfmt_add.f 3726#define OPRND(f) par_exec->operands.sfmt_addx.f 3727 int UNUSED written = abuf->written; 3728 IADDR UNUSED pc = abuf->addr; 3729 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 3730 3731 CPU (h_cond) = OPRND (condbit); 3732 * FLD (i_dr) = OPRND (dr); 3733 3734#undef OPRND 3735#undef FLD 3736 } 3737 NEXT (vpc); 3738 3739 CASE (sem, INSN_PAR_BC8) : /* bc.s $disp8 */ 3740{ 3741 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3742 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3743#define FLD(f) abuf->fields.sfmt_bl8.f 3744#define OPRND(f) par_exec->operands.sfmt_bc8.f 3745 int UNUSED written = 0; 3746 IADDR UNUSED pc = abuf->addr; 3747 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3748 3749if (CPU (h_cond)) { 3750 { 3751 USI opval = FLD (i_disp8); 3752 OPRND (pc) = opval; 3753 written |= (1 << 2); 3754 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 3755 } 3756} 3757 3758 abuf->written = written; 3759#undef OPRND 3760#undef FLD 3761} 3762 NEXT (vpc); 3763 3764CASE (sem, INSN_WRITE_BC8) : /* bc.s $disp8 */ 3765 { 3766 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3767 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 3768#define FLD(f) abuf->fields.sfmt_bl8.f 3769#define OPRND(f) par_exec->operands.sfmt_bc8.f 3770 int UNUSED written = abuf->written; 3771 IADDR UNUSED pc = abuf->addr; 3772 SEM_BRANCH_INIT 3773 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 3774 3775 if (written & (1 << 2)) 3776 { 3777 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc); 3778 } 3779 3780 SEM_BRANCH_FINI (vpc); 3781#undef OPRND 3782#undef FLD 3783 } 3784 NEXT (vpc); 3785 3786 CASE (sem, INSN_PAR_BL8) : /* bl.s $disp8 */ 3787{ 3788 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3789 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3790#define FLD(f) abuf->fields.sfmt_bl8.f 3791#define OPRND(f) par_exec->operands.sfmt_bl8.f 3792 int UNUSED written = 0; 3793 IADDR UNUSED pc = abuf->addr; 3794 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3795 3796{ 3797 { 3798 SI opval = ADDSI (ANDSI (pc, -4), 4); 3799 OPRND (h_gr_SI_14) = opval; 3800 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3801 } 3802 { 3803 USI opval = FLD (i_disp8); 3804 OPRND (pc) = opval; 3805 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 3806 } 3807} 3808 3809#undef OPRND 3810#undef FLD 3811} 3812 NEXT (vpc); 3813 3814CASE (sem, INSN_WRITE_BL8) : /* bl.s $disp8 */ 3815 { 3816 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3817 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 3818#define FLD(f) abuf->fields.sfmt_bl8.f 3819#define OPRND(f) par_exec->operands.sfmt_bl8.f 3820 int UNUSED written = abuf->written; 3821 IADDR UNUSED pc = abuf->addr; 3822 SEM_BRANCH_INIT 3823 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 3824 3825 CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_SI_14); 3826 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc); 3827 3828 SEM_BRANCH_FINI (vpc); 3829#undef OPRND 3830#undef FLD 3831 } 3832 NEXT (vpc); 3833 3834 CASE (sem, INSN_PAR_BCL8) : /* bcl.s $disp8 */ 3835{ 3836 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3837 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3838#define FLD(f) abuf->fields.sfmt_bl8.f 3839#define OPRND(f) par_exec->operands.sfmt_bcl8.f 3840 int UNUSED written = 0; 3841 IADDR UNUSED pc = abuf->addr; 3842 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3843 3844if (CPU (h_cond)) { 3845{ 3846 { 3847 SI opval = ADDSI (ANDSI (pc, -4), 4); 3848 OPRND (h_gr_SI_14) = opval; 3849 written |= (1 << 3); 3850 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3851 } 3852 { 3853 USI opval = FLD (i_disp8); 3854 OPRND (pc) = opval; 3855 written |= (1 << 4); 3856 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 3857 } 3858} 3859} 3860 3861 abuf->written = written; 3862#undef OPRND 3863#undef FLD 3864} 3865 NEXT (vpc); 3866 3867CASE (sem, INSN_WRITE_BCL8) : /* bcl.s $disp8 */ 3868 { 3869 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3870 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 3871#define FLD(f) abuf->fields.sfmt_bl8.f 3872#define OPRND(f) par_exec->operands.sfmt_bcl8.f 3873 int UNUSED written = abuf->written; 3874 IADDR UNUSED pc = abuf->addr; 3875 SEM_BRANCH_INIT 3876 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 3877 3878 if (written & (1 << 3)) 3879 { 3880 CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_SI_14); 3881 } 3882 if (written & (1 << 4)) 3883 { 3884 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc); 3885 } 3886 3887 SEM_BRANCH_FINI (vpc); 3888#undef OPRND 3889#undef FLD 3890 } 3891 NEXT (vpc); 3892 3893 CASE (sem, INSN_PAR_BNC8) : /* bnc.s $disp8 */ 3894{ 3895 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3896 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3897#define FLD(f) abuf->fields.sfmt_bl8.f 3898#define OPRND(f) par_exec->operands.sfmt_bc8.f 3899 int UNUSED written = 0; 3900 IADDR UNUSED pc = abuf->addr; 3901 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3902 3903if (NOTBI (CPU (h_cond))) { 3904 { 3905 USI opval = FLD (i_disp8); 3906 OPRND (pc) = opval; 3907 written |= (1 << 2); 3908 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 3909 } 3910} 3911 3912 abuf->written = written; 3913#undef OPRND 3914#undef FLD 3915} 3916 NEXT (vpc); 3917 3918CASE (sem, INSN_WRITE_BNC8) : /* bnc.s $disp8 */ 3919 { 3920 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3921 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 3922#define FLD(f) abuf->fields.sfmt_bl8.f 3923#define OPRND(f) par_exec->operands.sfmt_bc8.f 3924 int UNUSED written = abuf->written; 3925 IADDR UNUSED pc = abuf->addr; 3926 SEM_BRANCH_INIT 3927 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 3928 3929 if (written & (1 << 2)) 3930 { 3931 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc); 3932 } 3933 3934 SEM_BRANCH_FINI (vpc); 3935#undef OPRND 3936#undef FLD 3937 } 3938 NEXT (vpc); 3939 3940 CASE (sem, INSN_PAR_BRA8) : /* bra.s $disp8 */ 3941{ 3942 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3943 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3944#define FLD(f) abuf->fields.sfmt_bl8.f 3945#define OPRND(f) par_exec->operands.sfmt_bra8.f 3946 int UNUSED written = 0; 3947 IADDR UNUSED pc = abuf->addr; 3948 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3949 3950 { 3951 USI opval = FLD (i_disp8); 3952 OPRND (pc) = opval; 3953 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 3954 } 3955 3956#undef OPRND 3957#undef FLD 3958} 3959 NEXT (vpc); 3960 3961CASE (sem, INSN_WRITE_BRA8) : /* bra.s $disp8 */ 3962 { 3963 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3964 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 3965#define FLD(f) abuf->fields.sfmt_bl8.f 3966#define OPRND(f) par_exec->operands.sfmt_bra8.f 3967 int UNUSED written = abuf->written; 3968 IADDR UNUSED pc = abuf->addr; 3969 SEM_BRANCH_INIT 3970 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 3971 3972 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc); 3973 3974 SEM_BRANCH_FINI (vpc); 3975#undef OPRND 3976#undef FLD 3977 } 3978 NEXT (vpc); 3979 3980 CASE (sem, INSN_PAR_BNCL8) : /* bncl.s $disp8 */ 3981{ 3982 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3983 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3984#define FLD(f) abuf->fields.sfmt_bl8.f 3985#define OPRND(f) par_exec->operands.sfmt_bcl8.f 3986 int UNUSED written = 0; 3987 IADDR UNUSED pc = abuf->addr; 3988 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3989 3990if (NOTBI (CPU (h_cond))) { 3991{ 3992 { 3993 SI opval = ADDSI (ANDSI (pc, -4), 4); 3994 OPRND (h_gr_SI_14) = opval; 3995 written |= (1 << 3); 3996 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 3997 } 3998 { 3999 USI opval = FLD (i_disp8); 4000 OPRND (pc) = opval; 4001 written |= (1 << 4); 4002 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 4003 } 4004} 4005} 4006 4007 abuf->written = written; 4008#undef OPRND 4009#undef FLD 4010} 4011 NEXT (vpc); 4012 4013CASE (sem, INSN_WRITE_BNCL8) : /* bncl.s $disp8 */ 4014 { 4015 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4016 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 4017#define FLD(f) abuf->fields.sfmt_bl8.f 4018#define OPRND(f) par_exec->operands.sfmt_bcl8.f 4019 int UNUSED written = abuf->written; 4020 IADDR UNUSED pc = abuf->addr; 4021 SEM_BRANCH_INIT 4022 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 4023 4024 if (written & (1 << 3)) 4025 { 4026 CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_SI_14); 4027 } 4028 if (written & (1 << 4)) 4029 { 4030 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc); 4031 } 4032 4033 SEM_BRANCH_FINI (vpc); 4034#undef OPRND 4035#undef FLD 4036 } 4037 NEXT (vpc); 4038 4039 CASE (sem, INSN_PAR_CMP) : /* cmp $src1,$src2 */ 4040{ 4041 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4042 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4043#define FLD(f) abuf->fields.sfmt_st_plus.f 4044#define OPRND(f) par_exec->operands.sfmt_cmp.f 4045 int UNUSED written = 0; 4046 IADDR UNUSED pc = abuf->addr; 4047 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4048 4049 { 4050 BI opval = LTSI (* FLD (i_src1), * FLD (i_src2)); 4051 OPRND (condbit) = opval; 4052 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 4053 } 4054 4055#undef OPRND 4056#undef FLD 4057} 4058 NEXT (vpc); 4059 4060CASE (sem, INSN_WRITE_CMP) : /* cmp $src1,$src2 */ 4061 { 4062 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4063 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 4064#define FLD(f) abuf->fields.sfmt_st_plus.f 4065#define OPRND(f) par_exec->operands.sfmt_cmp.f 4066 int UNUSED written = abuf->written; 4067 IADDR UNUSED pc = abuf->addr; 4068 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 4069 4070 CPU (h_cond) = OPRND (condbit); 4071 4072#undef OPRND 4073#undef FLD 4074 } 4075 NEXT (vpc); 4076 4077 CASE (sem, INSN_PAR_CMPU) : /* cmpu $src1,$src2 */ 4078{ 4079 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4080 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4081#define FLD(f) abuf->fields.sfmt_st_plus.f 4082#define OPRND(f) par_exec->operands.sfmt_cmp.f 4083 int UNUSED written = 0; 4084 IADDR UNUSED pc = abuf->addr; 4085 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4086 4087 { 4088 BI opval = LTUSI (* FLD (i_src1), * FLD (i_src2)); 4089 OPRND (condbit) = opval; 4090 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 4091 } 4092 4093#undef OPRND 4094#undef FLD 4095} 4096 NEXT (vpc); 4097 4098CASE (sem, INSN_WRITE_CMPU) : /* cmpu $src1,$src2 */ 4099 { 4100 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4101 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 4102#define FLD(f) abuf->fields.sfmt_st_plus.f 4103#define OPRND(f) par_exec->operands.sfmt_cmp.f 4104 int UNUSED written = abuf->written; 4105 IADDR UNUSED pc = abuf->addr; 4106 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 4107 4108 CPU (h_cond) = OPRND (condbit); 4109 4110#undef OPRND 4111#undef FLD 4112 } 4113 NEXT (vpc); 4114 4115 CASE (sem, INSN_PAR_CMPEQ) : /* cmpeq $src1,$src2 */ 4116{ 4117 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4118 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4119#define FLD(f) abuf->fields.sfmt_st_plus.f 4120#define OPRND(f) par_exec->operands.sfmt_cmp.f 4121 int UNUSED written = 0; 4122 IADDR UNUSED pc = abuf->addr; 4123 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4124 4125 { 4126 BI opval = EQSI (* FLD (i_src1), * FLD (i_src2)); 4127 OPRND (condbit) = opval; 4128 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 4129 } 4130 4131#undef OPRND 4132#undef FLD 4133} 4134 NEXT (vpc); 4135 4136CASE (sem, INSN_WRITE_CMPEQ) : /* cmpeq $src1,$src2 */ 4137 { 4138 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4139 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 4140#define FLD(f) abuf->fields.sfmt_st_plus.f 4141#define OPRND(f) par_exec->operands.sfmt_cmp.f 4142 int UNUSED written = abuf->written; 4143 IADDR UNUSED pc = abuf->addr; 4144 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 4145 4146 CPU (h_cond) = OPRND (condbit); 4147 4148#undef OPRND 4149#undef FLD 4150 } 4151 NEXT (vpc); 4152 4153 CASE (sem, INSN_PAR_CMPZ) : /* cmpz $src2 */ 4154{ 4155 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4156 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4157#define FLD(f) abuf->fields.sfmt_st_plus.f 4158#define OPRND(f) par_exec->operands.sfmt_cmpz.f 4159 int UNUSED written = 0; 4160 IADDR UNUSED pc = abuf->addr; 4161 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4162 4163 { 4164 BI opval = EQSI (* FLD (i_src2), 0); 4165 OPRND (condbit) = opval; 4166 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 4167 } 4168 4169#undef OPRND 4170#undef FLD 4171} 4172 NEXT (vpc); 4173 4174CASE (sem, INSN_WRITE_CMPZ) : /* cmpz $src2 */ 4175 { 4176 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4177 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 4178#define FLD(f) abuf->fields.sfmt_st_plus.f 4179#define OPRND(f) par_exec->operands.sfmt_cmpz.f 4180 int UNUSED written = abuf->written; 4181 IADDR UNUSED pc = abuf->addr; 4182 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 4183 4184 CPU (h_cond) = OPRND (condbit); 4185 4186#undef OPRND 4187#undef FLD 4188 } 4189 NEXT (vpc); 4190 4191 CASE (sem, INSN_PAR_JC) : /* jc $sr */ 4192{ 4193 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4194 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4195#define FLD(f) abuf->fields.sfmt_jl.f 4196#define OPRND(f) par_exec->operands.sfmt_jc.f 4197 int UNUSED written = 0; 4198 IADDR UNUSED pc = abuf->addr; 4199 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4200 4201if (CPU (h_cond)) { 4202 { 4203 USI opval = ANDSI (* FLD (i_sr), -4); 4204 OPRND (pc) = opval; 4205 written |= (1 << 2); 4206 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 4207 } 4208} 4209 4210 abuf->written = written; 4211#undef OPRND 4212#undef FLD 4213} 4214 NEXT (vpc); 4215 4216CASE (sem, INSN_WRITE_JC) : /* jc $sr */ 4217 { 4218 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4219 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 4220#define FLD(f) abuf->fields.sfmt_jl.f 4221#define OPRND(f) par_exec->operands.sfmt_jc.f 4222 int UNUSED written = abuf->written; 4223 IADDR UNUSED pc = abuf->addr; 4224 SEM_BRANCH_INIT 4225 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 4226 4227 if (written & (1 << 2)) 4228 { 4229 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc); 4230 } 4231 4232 SEM_BRANCH_FINI (vpc); 4233#undef OPRND 4234#undef FLD 4235 } 4236 NEXT (vpc); 4237 4238 CASE (sem, INSN_PAR_JNC) : /* jnc $sr */ 4239{ 4240 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4241 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4242#define FLD(f) abuf->fields.sfmt_jl.f 4243#define OPRND(f) par_exec->operands.sfmt_jc.f 4244 int UNUSED written = 0; 4245 IADDR UNUSED pc = abuf->addr; 4246 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4247 4248if (NOTBI (CPU (h_cond))) { 4249 { 4250 USI opval = ANDSI (* FLD (i_sr), -4); 4251 OPRND (pc) = opval; 4252 written |= (1 << 2); 4253 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 4254 } 4255} 4256 4257 abuf->written = written; 4258#undef OPRND 4259#undef FLD 4260} 4261 NEXT (vpc); 4262 4263CASE (sem, INSN_WRITE_JNC) : /* jnc $sr */ 4264 { 4265 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4266 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 4267#define FLD(f) abuf->fields.sfmt_jl.f 4268#define OPRND(f) par_exec->operands.sfmt_jc.f 4269 int UNUSED written = abuf->written; 4270 IADDR UNUSED pc = abuf->addr; 4271 SEM_BRANCH_INIT 4272 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 4273 4274 if (written & (1 << 2)) 4275 { 4276 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc); 4277 } 4278 4279 SEM_BRANCH_FINI (vpc); 4280#undef OPRND 4281#undef FLD 4282 } 4283 NEXT (vpc); 4284 4285 CASE (sem, INSN_PAR_JL) : /* jl $sr */ 4286{ 4287 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4288 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4289#define FLD(f) abuf->fields.sfmt_jl.f 4290#define OPRND(f) par_exec->operands.sfmt_jl.f 4291 int UNUSED written = 0; 4292 IADDR UNUSED pc = abuf->addr; 4293 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4294 4295{ 4296 SI temp0;USI temp1; 4297 temp0 = ADDSI (ANDSI (pc, -4), 4); 4298 temp1 = ANDSI (* FLD (i_sr), -4); 4299 { 4300 SI opval = temp0; 4301 OPRND (h_gr_SI_14) = opval; 4302 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4303 } 4304 { 4305 USI opval = temp1; 4306 OPRND (pc) = opval; 4307 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 4308 } 4309} 4310 4311#undef OPRND 4312#undef FLD 4313} 4314 NEXT (vpc); 4315 4316CASE (sem, INSN_WRITE_JL) : /* jl $sr */ 4317 { 4318 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4319 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 4320#define FLD(f) abuf->fields.sfmt_jl.f 4321#define OPRND(f) par_exec->operands.sfmt_jl.f 4322 int UNUSED written = abuf->written; 4323 IADDR UNUSED pc = abuf->addr; 4324 SEM_BRANCH_INIT 4325 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 4326 4327 CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_SI_14); 4328 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc); 4329 4330 SEM_BRANCH_FINI (vpc); 4331#undef OPRND 4332#undef FLD 4333 } 4334 NEXT (vpc); 4335 4336 CASE (sem, INSN_PAR_JMP) : /* jmp $sr */ 4337{ 4338 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4339 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4340#define FLD(f) abuf->fields.sfmt_jl.f 4341#define OPRND(f) par_exec->operands.sfmt_jmp.f 4342 int UNUSED written = 0; 4343 IADDR UNUSED pc = abuf->addr; 4344 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4345 4346 { 4347 USI opval = ANDSI (* FLD (i_sr), -4); 4348 OPRND (pc) = opval; 4349 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 4350 } 4351 4352#undef OPRND 4353#undef FLD 4354} 4355 NEXT (vpc); 4356 4357CASE (sem, INSN_WRITE_JMP) : /* jmp $sr */ 4358 { 4359 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4360 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 4361#define FLD(f) abuf->fields.sfmt_jl.f 4362#define OPRND(f) par_exec->operands.sfmt_jmp.f 4363 int UNUSED written = abuf->written; 4364 IADDR UNUSED pc = abuf->addr; 4365 SEM_BRANCH_INIT 4366 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 4367 4368 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc); 4369 4370 SEM_BRANCH_FINI (vpc); 4371#undef OPRND 4372#undef FLD 4373 } 4374 NEXT (vpc); 4375 4376 CASE (sem, INSN_PAR_LD) : /* ld $dr,@$sr */ 4377{ 4378 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4379 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4380#define FLD(f) abuf->fields.sfmt_ld_plus.f 4381#define OPRND(f) par_exec->operands.sfmt_ld.f 4382 int UNUSED written = 0; 4383 IADDR UNUSED pc = abuf->addr; 4384 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4385 4386 { 4387 SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr)); 4388 OPRND (dr) = opval; 4389 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4390 } 4391 4392#undef OPRND 4393#undef FLD 4394} 4395 NEXT (vpc); 4396 4397CASE (sem, INSN_WRITE_LD) : /* ld $dr,@$sr */ 4398 { 4399 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4400 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 4401#define FLD(f) abuf->fields.sfmt_ld_plus.f 4402#define OPRND(f) par_exec->operands.sfmt_ld.f 4403 int UNUSED written = abuf->written; 4404 IADDR UNUSED pc = abuf->addr; 4405 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 4406 4407 * FLD (i_dr) = OPRND (dr); 4408 4409#undef OPRND 4410#undef FLD 4411 } 4412 NEXT (vpc); 4413 4414 CASE (sem, INSN_PAR_LDB) : /* ldb $dr,@$sr */ 4415{ 4416 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4417 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4418#define FLD(f) abuf->fields.sfmt_ld_plus.f 4419#define OPRND(f) par_exec->operands.sfmt_ldb.f 4420 int UNUSED written = 0; 4421 IADDR UNUSED pc = abuf->addr; 4422 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4423 4424 { 4425 SI opval = EXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr))); 4426 OPRND (dr) = opval; 4427 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4428 } 4429 4430#undef OPRND 4431#undef FLD 4432} 4433 NEXT (vpc); 4434 4435CASE (sem, INSN_WRITE_LDB) : /* ldb $dr,@$sr */ 4436 { 4437 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4438 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 4439#define FLD(f) abuf->fields.sfmt_ld_plus.f 4440#define OPRND(f) par_exec->operands.sfmt_ldb.f 4441 int UNUSED written = abuf->written; 4442 IADDR UNUSED pc = abuf->addr; 4443 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 4444 4445 * FLD (i_dr) = OPRND (dr); 4446 4447#undef OPRND 4448#undef FLD 4449 } 4450 NEXT (vpc); 4451 4452 CASE (sem, INSN_PAR_LDH) : /* ldh $dr,@$sr */ 4453{ 4454 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4455 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4456#define FLD(f) abuf->fields.sfmt_ld_plus.f 4457#define OPRND(f) par_exec->operands.sfmt_ldh.f 4458 int UNUSED written = 0; 4459 IADDR UNUSED pc = abuf->addr; 4460 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4461 4462 { 4463 SI opval = EXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr))); 4464 OPRND (dr) = opval; 4465 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4466 } 4467 4468#undef OPRND 4469#undef FLD 4470} 4471 NEXT (vpc); 4472 4473CASE (sem, INSN_WRITE_LDH) : /* ldh $dr,@$sr */ 4474 { 4475 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4476 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 4477#define FLD(f) abuf->fields.sfmt_ld_plus.f 4478#define OPRND(f) par_exec->operands.sfmt_ldh.f 4479 int UNUSED written = abuf->written; 4480 IADDR UNUSED pc = abuf->addr; 4481 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 4482 4483 * FLD (i_dr) = OPRND (dr); 4484 4485#undef OPRND 4486#undef FLD 4487 } 4488 NEXT (vpc); 4489 4490 CASE (sem, INSN_PAR_LDUB) : /* ldub $dr,@$sr */ 4491{ 4492 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4493 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4494#define FLD(f) abuf->fields.sfmt_ld_plus.f 4495#define OPRND(f) par_exec->operands.sfmt_ldb.f 4496 int UNUSED written = 0; 4497 IADDR UNUSED pc = abuf->addr; 4498 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4499 4500 { 4501 SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr))); 4502 OPRND (dr) = opval; 4503 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4504 } 4505 4506#undef OPRND 4507#undef FLD 4508} 4509 NEXT (vpc); 4510 4511CASE (sem, INSN_WRITE_LDUB) : /* ldub $dr,@$sr */ 4512 { 4513 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4514 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 4515#define FLD(f) abuf->fields.sfmt_ld_plus.f 4516#define OPRND(f) par_exec->operands.sfmt_ldb.f 4517 int UNUSED written = abuf->written; 4518 IADDR UNUSED pc = abuf->addr; 4519 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 4520 4521 * FLD (i_dr) = OPRND (dr); 4522 4523#undef OPRND 4524#undef FLD 4525 } 4526 NEXT (vpc); 4527 4528 CASE (sem, INSN_PAR_LDUH) : /* lduh $dr,@$sr */ 4529{ 4530 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4531 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4532#define FLD(f) abuf->fields.sfmt_ld_plus.f 4533#define OPRND(f) par_exec->operands.sfmt_ldh.f 4534 int UNUSED written = 0; 4535 IADDR UNUSED pc = abuf->addr; 4536 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4537 4538 { 4539 SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr))); 4540 OPRND (dr) = opval; 4541 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4542 } 4543 4544#undef OPRND 4545#undef FLD 4546} 4547 NEXT (vpc); 4548 4549CASE (sem, INSN_WRITE_LDUH) : /* lduh $dr,@$sr */ 4550 { 4551 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4552 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 4553#define FLD(f) abuf->fields.sfmt_ld_plus.f 4554#define OPRND(f) par_exec->operands.sfmt_ldh.f 4555 int UNUSED written = abuf->written; 4556 IADDR UNUSED pc = abuf->addr; 4557 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 4558 4559 * FLD (i_dr) = OPRND (dr); 4560 4561#undef OPRND 4562#undef FLD 4563 } 4564 NEXT (vpc); 4565 4566 CASE (sem, INSN_PAR_LD_PLUS) : /* ld $dr,@$sr+ */ 4567{ 4568 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4569 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4570#define FLD(f) abuf->fields.sfmt_ld_plus.f 4571#define OPRND(f) par_exec->operands.sfmt_ld_plus.f 4572 int UNUSED written = 0; 4573 IADDR UNUSED pc = abuf->addr; 4574 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4575 4576{ 4577 SI temp0;SI temp1; 4578 temp0 = GETMEMSI (current_cpu, pc, * FLD (i_sr)); 4579 temp1 = ADDSI (* FLD (i_sr), 4); 4580 { 4581 SI opval = temp0; 4582 OPRND (dr) = opval; 4583 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4584 } 4585 { 4586 SI opval = temp1; 4587 OPRND (sr) = opval; 4588 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4589 } 4590} 4591 4592#undef OPRND 4593#undef FLD 4594} 4595 NEXT (vpc); 4596 4597CASE (sem, INSN_WRITE_LD_PLUS) : /* ld $dr,@$sr+ */ 4598 { 4599 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4600 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 4601#define FLD(f) abuf->fields.sfmt_ld_plus.f 4602#define OPRND(f) par_exec->operands.sfmt_ld_plus.f 4603 int UNUSED written = abuf->written; 4604 IADDR UNUSED pc = abuf->addr; 4605 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 4606 4607 * FLD (i_dr) = OPRND (dr); 4608 * FLD (i_sr) = OPRND (sr); 4609 4610#undef OPRND 4611#undef FLD 4612 } 4613 NEXT (vpc); 4614 4615 CASE (sem, INSN_PAR_LDI8) : /* ldi8 $dr,$simm8 */ 4616{ 4617 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4618 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4619#define FLD(f) abuf->fields.sfmt_addi.f 4620#define OPRND(f) par_exec->operands.sfmt_ldi8.f 4621 int UNUSED written = 0; 4622 IADDR UNUSED pc = abuf->addr; 4623 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4624 4625 { 4626 SI opval = FLD (f_simm8); 4627 OPRND (dr) = opval; 4628 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4629 } 4630 4631#undef OPRND 4632#undef FLD 4633} 4634 NEXT (vpc); 4635 4636CASE (sem, INSN_WRITE_LDI8) : /* ldi8 $dr,$simm8 */ 4637 { 4638 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4639 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 4640#define FLD(f) abuf->fields.sfmt_addi.f 4641#define OPRND(f) par_exec->operands.sfmt_ldi8.f 4642 int UNUSED written = abuf->written; 4643 IADDR UNUSED pc = abuf->addr; 4644 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 4645 4646 * FLD (i_dr) = OPRND (dr); 4647 4648#undef OPRND 4649#undef FLD 4650 } 4651 NEXT (vpc); 4652 4653 CASE (sem, INSN_PAR_LOCK) : /* lock $dr,@$sr */ 4654{ 4655 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4656 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4657#define FLD(f) abuf->fields.sfmt_ld_plus.f 4658#define OPRND(f) par_exec->operands.sfmt_lock.f 4659 int UNUSED written = 0; 4660 IADDR UNUSED pc = abuf->addr; 4661 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4662 4663{ 4664 { 4665 BI opval = 1; 4666 OPRND (h_lock_BI) = opval; 4667 TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval); 4668 } 4669 { 4670 SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr)); 4671 OPRND (dr) = opval; 4672 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4673 } 4674} 4675 4676#undef OPRND 4677#undef FLD 4678} 4679 NEXT (vpc); 4680 4681CASE (sem, INSN_WRITE_LOCK) : /* lock $dr,@$sr */ 4682 { 4683 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4684 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 4685#define FLD(f) abuf->fields.sfmt_ld_plus.f 4686#define OPRND(f) par_exec->operands.sfmt_lock.f 4687 int UNUSED written = abuf->written; 4688 IADDR UNUSED pc = abuf->addr; 4689 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 4690 4691 * FLD (i_dr) = OPRND (dr); 4692 CPU (h_lock) = OPRND (h_lock_BI); 4693 4694#undef OPRND 4695#undef FLD 4696 } 4697 NEXT (vpc); 4698 4699 CASE (sem, INSN_PAR_MACHI_A) : /* machi $src1,$src2,$acc */ 4700{ 4701 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4702 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4703#define FLD(f) abuf->fields.sfmt_machi_a.f 4704#define OPRND(f) par_exec->operands.sfmt_machi_a.f 4705 int UNUSED written = 0; 4706 IADDR UNUSED pc = abuf->addr; 4707 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4708 4709 { 4710 DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))), 8), 8); 4711 OPRND (acc) = opval; 4712 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 4713 } 4714 4715#undef OPRND 4716#undef FLD 4717} 4718 NEXT (vpc); 4719 4720CASE (sem, INSN_WRITE_MACHI_A) : /* machi $src1,$src2,$acc */ 4721 { 4722 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4723 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 4724#define FLD(f) abuf->fields.sfmt_machi_a.f 4725#define OPRND(f) par_exec->operands.sfmt_machi_a.f 4726 int UNUSED written = abuf->written; 4727 IADDR UNUSED pc = abuf->addr; 4728 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 4729 4730 SET_H_ACCUMS (FLD (f_acc), OPRND (acc)); 4731 4732#undef OPRND 4733#undef FLD 4734 } 4735 NEXT (vpc); 4736 4737 CASE (sem, INSN_PAR_MACLO_A) : /* maclo $src1,$src2,$acc */ 4738{ 4739 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4740 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4741#define FLD(f) abuf->fields.sfmt_machi_a.f 4742#define OPRND(f) par_exec->operands.sfmt_machi_a.f 4743 int UNUSED written = 0; 4744 IADDR UNUSED pc = abuf->addr; 4745 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4746 4747 { 4748 DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))), 8), 8); 4749 OPRND (acc) = opval; 4750 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 4751 } 4752 4753#undef OPRND 4754#undef FLD 4755} 4756 NEXT (vpc); 4757 4758CASE (sem, INSN_WRITE_MACLO_A) : /* maclo $src1,$src2,$acc */ 4759 { 4760 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4761 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 4762#define FLD(f) abuf->fields.sfmt_machi_a.f 4763#define OPRND(f) par_exec->operands.sfmt_machi_a.f 4764 int UNUSED written = abuf->written; 4765 IADDR UNUSED pc = abuf->addr; 4766 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 4767 4768 SET_H_ACCUMS (FLD (f_acc), OPRND (acc)); 4769 4770#undef OPRND 4771#undef FLD 4772 } 4773 NEXT (vpc); 4774 4775 CASE (sem, INSN_PAR_MACWHI_A) : /* macwhi $src1,$src2,$acc */ 4776{ 4777 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4778 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4779#define FLD(f) abuf->fields.sfmt_machi_a.f 4780#define OPRND(f) par_exec->operands.sfmt_machi_a.f 4781 int UNUSED written = 0; 4782 IADDR UNUSED pc = abuf->addr; 4783 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4784 4785 { 4786 DI opval = ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))); 4787 OPRND (acc) = opval; 4788 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 4789 } 4790 4791#undef OPRND 4792#undef FLD 4793} 4794 NEXT (vpc); 4795 4796CASE (sem, INSN_WRITE_MACWHI_A) : /* macwhi $src1,$src2,$acc */ 4797 { 4798 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4799 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 4800#define FLD(f) abuf->fields.sfmt_machi_a.f 4801#define OPRND(f) par_exec->operands.sfmt_machi_a.f 4802 int UNUSED written = abuf->written; 4803 IADDR UNUSED pc = abuf->addr; 4804 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 4805 4806 SET_H_ACCUMS (FLD (f_acc), OPRND (acc)); 4807 4808#undef OPRND 4809#undef FLD 4810 } 4811 NEXT (vpc); 4812 4813 CASE (sem, INSN_PAR_MACWLO_A) : /* macwlo $src1,$src2,$acc */ 4814{ 4815 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4816 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4817#define FLD(f) abuf->fields.sfmt_machi_a.f 4818#define OPRND(f) par_exec->operands.sfmt_machi_a.f 4819 int UNUSED written = 0; 4820 IADDR UNUSED pc = abuf->addr; 4821 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4822 4823 { 4824 DI opval = ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))); 4825 OPRND (acc) = opval; 4826 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 4827 } 4828 4829#undef OPRND 4830#undef FLD 4831} 4832 NEXT (vpc); 4833 4834CASE (sem, INSN_WRITE_MACWLO_A) : /* macwlo $src1,$src2,$acc */ 4835 { 4836 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4837 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 4838#define FLD(f) abuf->fields.sfmt_machi_a.f 4839#define OPRND(f) par_exec->operands.sfmt_machi_a.f 4840 int UNUSED written = abuf->written; 4841 IADDR UNUSED pc = abuf->addr; 4842 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 4843 4844 SET_H_ACCUMS (FLD (f_acc), OPRND (acc)); 4845 4846#undef OPRND 4847#undef FLD 4848 } 4849 NEXT (vpc); 4850 4851 CASE (sem, INSN_PAR_MUL) : /* mul $dr,$sr */ 4852{ 4853 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4854 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4855#define FLD(f) abuf->fields.sfmt_add.f 4856#define OPRND(f) par_exec->operands.sfmt_add.f 4857 int UNUSED written = 0; 4858 IADDR UNUSED pc = abuf->addr; 4859 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4860 4861 { 4862 SI opval = MULSI (* FLD (i_dr), * FLD (i_sr)); 4863 OPRND (dr) = opval; 4864 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 4865 } 4866 4867#undef OPRND 4868#undef FLD 4869} 4870 NEXT (vpc); 4871 4872CASE (sem, INSN_WRITE_MUL) : /* mul $dr,$sr */ 4873 { 4874 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4875 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 4876#define FLD(f) abuf->fields.sfmt_add.f 4877#define OPRND(f) par_exec->operands.sfmt_add.f 4878 int UNUSED written = abuf->written; 4879 IADDR UNUSED pc = abuf->addr; 4880 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 4881 4882 * FLD (i_dr) = OPRND (dr); 4883 4884#undef OPRND 4885#undef FLD 4886 } 4887 NEXT (vpc); 4888 4889 CASE (sem, INSN_PAR_MULHI_A) : /* mulhi $src1,$src2,$acc */ 4890{ 4891 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4892 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4893#define FLD(f) abuf->fields.sfmt_machi_a.f 4894#define OPRND(f) par_exec->operands.sfmt_mulhi_a.f 4895 int UNUSED written = 0; 4896 IADDR UNUSED pc = abuf->addr; 4897 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4898 4899 { 4900 DI opval = SRADI (SLLDI (MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))), 16), 16); 4901 OPRND (acc) = opval; 4902 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 4903 } 4904 4905#undef OPRND 4906#undef FLD 4907} 4908 NEXT (vpc); 4909 4910CASE (sem, INSN_WRITE_MULHI_A) : /* mulhi $src1,$src2,$acc */ 4911 { 4912 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4913 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 4914#define FLD(f) abuf->fields.sfmt_machi_a.f 4915#define OPRND(f) par_exec->operands.sfmt_mulhi_a.f 4916 int UNUSED written = abuf->written; 4917 IADDR UNUSED pc = abuf->addr; 4918 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 4919 4920 SET_H_ACCUMS (FLD (f_acc), OPRND (acc)); 4921 4922#undef OPRND 4923#undef FLD 4924 } 4925 NEXT (vpc); 4926 4927 CASE (sem, INSN_PAR_MULLO_A) : /* mullo $src1,$src2,$acc */ 4928{ 4929 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4930 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4931#define FLD(f) abuf->fields.sfmt_machi_a.f 4932#define OPRND(f) par_exec->operands.sfmt_mulhi_a.f 4933 int UNUSED written = 0; 4934 IADDR UNUSED pc = abuf->addr; 4935 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4936 4937 { 4938 DI opval = SRADI (SLLDI (MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 16), 16); 4939 OPRND (acc) = opval; 4940 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 4941 } 4942 4943#undef OPRND 4944#undef FLD 4945} 4946 NEXT (vpc); 4947 4948CASE (sem, INSN_WRITE_MULLO_A) : /* mullo $src1,$src2,$acc */ 4949 { 4950 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4951 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 4952#define FLD(f) abuf->fields.sfmt_machi_a.f 4953#define OPRND(f) par_exec->operands.sfmt_mulhi_a.f 4954 int UNUSED written = abuf->written; 4955 IADDR UNUSED pc = abuf->addr; 4956 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 4957 4958 SET_H_ACCUMS (FLD (f_acc), OPRND (acc)); 4959 4960#undef OPRND 4961#undef FLD 4962 } 4963 NEXT (vpc); 4964 4965 CASE (sem, INSN_PAR_MULWHI_A) : /* mulwhi $src1,$src2,$acc */ 4966{ 4967 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4968 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4969#define FLD(f) abuf->fields.sfmt_machi_a.f 4970#define OPRND(f) par_exec->operands.sfmt_mulhi_a.f 4971 int UNUSED written = 0; 4972 IADDR UNUSED pc = abuf->addr; 4973 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4974 4975 { 4976 DI opval = MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))); 4977 OPRND (acc) = opval; 4978 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 4979 } 4980 4981#undef OPRND 4982#undef FLD 4983} 4984 NEXT (vpc); 4985 4986CASE (sem, INSN_WRITE_MULWHI_A) : /* mulwhi $src1,$src2,$acc */ 4987 { 4988 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4989 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 4990#define FLD(f) abuf->fields.sfmt_machi_a.f 4991#define OPRND(f) par_exec->operands.sfmt_mulhi_a.f 4992 int UNUSED written = abuf->written; 4993 IADDR UNUSED pc = abuf->addr; 4994 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 4995 4996 SET_H_ACCUMS (FLD (f_acc), OPRND (acc)); 4997 4998#undef OPRND 4999#undef FLD 5000 } 5001 NEXT (vpc); 5002 5003 CASE (sem, INSN_PAR_MULWLO_A) : /* mulwlo $src1,$src2,$acc */ 5004{ 5005 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5006 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5007#define FLD(f) abuf->fields.sfmt_machi_a.f 5008#define OPRND(f) par_exec->operands.sfmt_mulhi_a.f 5009 int UNUSED written = 0; 5010 IADDR UNUSED pc = abuf->addr; 5011 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5012 5013 { 5014 DI opval = MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))); 5015 OPRND (acc) = opval; 5016 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 5017 } 5018 5019#undef OPRND 5020#undef FLD 5021} 5022 NEXT (vpc); 5023 5024CASE (sem, INSN_WRITE_MULWLO_A) : /* mulwlo $src1,$src2,$acc */ 5025 { 5026 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5027 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 5028#define FLD(f) abuf->fields.sfmt_machi_a.f 5029#define OPRND(f) par_exec->operands.sfmt_mulhi_a.f 5030 int UNUSED written = abuf->written; 5031 IADDR UNUSED pc = abuf->addr; 5032 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 5033 5034 SET_H_ACCUMS (FLD (f_acc), OPRND (acc)); 5035 5036#undef OPRND 5037#undef FLD 5038 } 5039 NEXT (vpc); 5040 5041 CASE (sem, INSN_PAR_MV) : /* mv $dr,$sr */ 5042{ 5043 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5044 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5045#define FLD(f) abuf->fields.sfmt_ld_plus.f 5046#define OPRND(f) par_exec->operands.sfmt_mv.f 5047 int UNUSED written = 0; 5048 IADDR UNUSED pc = abuf->addr; 5049 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5050 5051 { 5052 SI opval = * FLD (i_sr); 5053 OPRND (dr) = opval; 5054 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5055 } 5056 5057#undef OPRND 5058#undef FLD 5059} 5060 NEXT (vpc); 5061 5062CASE (sem, INSN_WRITE_MV) : /* mv $dr,$sr */ 5063 { 5064 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5065 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 5066#define FLD(f) abuf->fields.sfmt_ld_plus.f 5067#define OPRND(f) par_exec->operands.sfmt_mv.f 5068 int UNUSED written = abuf->written; 5069 IADDR UNUSED pc = abuf->addr; 5070 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 5071 5072 * FLD (i_dr) = OPRND (dr); 5073 5074#undef OPRND 5075#undef FLD 5076 } 5077 NEXT (vpc); 5078 5079 CASE (sem, INSN_PAR_MVFACHI_A) : /* mvfachi $dr,$accs */ 5080{ 5081 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5082 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5083#define FLD(f) abuf->fields.sfmt_mvfachi_a.f 5084#define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f 5085 int UNUSED written = 0; 5086 IADDR UNUSED pc = abuf->addr; 5087 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5088 5089 { 5090 SI opval = TRUNCDISI (SRADI (GET_H_ACCUMS (FLD (f_accs)), 32)); 5091 OPRND (dr) = opval; 5092 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5093 } 5094 5095#undef OPRND 5096#undef FLD 5097} 5098 NEXT (vpc); 5099 5100CASE (sem, INSN_WRITE_MVFACHI_A) : /* mvfachi $dr,$accs */ 5101 { 5102 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5103 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 5104#define FLD(f) abuf->fields.sfmt_mvfachi_a.f 5105#define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f 5106 int UNUSED written = abuf->written; 5107 IADDR UNUSED pc = abuf->addr; 5108 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 5109 5110 * FLD (i_dr) = OPRND (dr); 5111 5112#undef OPRND 5113#undef FLD 5114 } 5115 NEXT (vpc); 5116 5117 CASE (sem, INSN_PAR_MVFACLO_A) : /* mvfaclo $dr,$accs */ 5118{ 5119 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5120 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5121#define FLD(f) abuf->fields.sfmt_mvfachi_a.f 5122#define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f 5123 int UNUSED written = 0; 5124 IADDR UNUSED pc = abuf->addr; 5125 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5126 5127 { 5128 SI opval = TRUNCDISI (GET_H_ACCUMS (FLD (f_accs))); 5129 OPRND (dr) = opval; 5130 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5131 } 5132 5133#undef OPRND 5134#undef FLD 5135} 5136 NEXT (vpc); 5137 5138CASE (sem, INSN_WRITE_MVFACLO_A) : /* mvfaclo $dr,$accs */ 5139 { 5140 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5141 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 5142#define FLD(f) abuf->fields.sfmt_mvfachi_a.f 5143#define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f 5144 int UNUSED written = abuf->written; 5145 IADDR UNUSED pc = abuf->addr; 5146 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 5147 5148 * FLD (i_dr) = OPRND (dr); 5149 5150#undef OPRND 5151#undef FLD 5152 } 5153 NEXT (vpc); 5154 5155 CASE (sem, INSN_PAR_MVFACMI_A) : /* mvfacmi $dr,$accs */ 5156{ 5157 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5158 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5159#define FLD(f) abuf->fields.sfmt_mvfachi_a.f 5160#define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f 5161 int UNUSED written = 0; 5162 IADDR UNUSED pc = abuf->addr; 5163 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5164 5165 { 5166 SI opval = TRUNCDISI (SRADI (GET_H_ACCUMS (FLD (f_accs)), 16)); 5167 OPRND (dr) = opval; 5168 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5169 } 5170 5171#undef OPRND 5172#undef FLD 5173} 5174 NEXT (vpc); 5175 5176CASE (sem, INSN_WRITE_MVFACMI_A) : /* mvfacmi $dr,$accs */ 5177 { 5178 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5179 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 5180#define FLD(f) abuf->fields.sfmt_mvfachi_a.f 5181#define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f 5182 int UNUSED written = abuf->written; 5183 IADDR UNUSED pc = abuf->addr; 5184 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 5185 5186 * FLD (i_dr) = OPRND (dr); 5187 5188#undef OPRND 5189#undef FLD 5190 } 5191 NEXT (vpc); 5192 5193 CASE (sem, INSN_PAR_MVFC) : /* mvfc $dr,$scr */ 5194{ 5195 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5196 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5197#define FLD(f) abuf->fields.sfmt_ld_plus.f 5198#define OPRND(f) par_exec->operands.sfmt_mvfc.f 5199 int UNUSED written = 0; 5200 IADDR UNUSED pc = abuf->addr; 5201 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5202 5203 { 5204 SI opval = GET_H_CR (FLD (f_r2)); 5205 OPRND (dr) = opval; 5206 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5207 } 5208 5209#undef OPRND 5210#undef FLD 5211} 5212 NEXT (vpc); 5213 5214CASE (sem, INSN_WRITE_MVFC) : /* mvfc $dr,$scr */ 5215 { 5216 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5217 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 5218#define FLD(f) abuf->fields.sfmt_ld_plus.f 5219#define OPRND(f) par_exec->operands.sfmt_mvfc.f 5220 int UNUSED written = abuf->written; 5221 IADDR UNUSED pc = abuf->addr; 5222 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 5223 5224 * FLD (i_dr) = OPRND (dr); 5225 5226#undef OPRND 5227#undef FLD 5228 } 5229 NEXT (vpc); 5230 5231 CASE (sem, INSN_PAR_MVTACHI_A) : /* mvtachi $src1,$accs */ 5232{ 5233 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5234 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5235#define FLD(f) abuf->fields.sfmt_mvtachi_a.f 5236#define OPRND(f) par_exec->operands.sfmt_mvtachi_a.f 5237 int UNUSED written = 0; 5238 IADDR UNUSED pc = abuf->addr; 5239 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5240 5241 { 5242 DI opval = ORDI (ANDDI (GET_H_ACCUMS (FLD (f_accs)), MAKEDI (0, 0xffffffff)), SLLDI (EXTSIDI (* FLD (i_src1)), 32)); 5243 OPRND (accs) = opval; 5244 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 5245 } 5246 5247#undef OPRND 5248#undef FLD 5249} 5250 NEXT (vpc); 5251 5252CASE (sem, INSN_WRITE_MVTACHI_A) : /* mvtachi $src1,$accs */ 5253 { 5254 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5255 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 5256#define FLD(f) abuf->fields.sfmt_mvtachi_a.f 5257#define OPRND(f) par_exec->operands.sfmt_mvtachi_a.f 5258 int UNUSED written = abuf->written; 5259 IADDR UNUSED pc = abuf->addr; 5260 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 5261 5262 SET_H_ACCUMS (FLD (f_accs), OPRND (accs)); 5263 5264#undef OPRND 5265#undef FLD 5266 } 5267 NEXT (vpc); 5268 5269 CASE (sem, INSN_PAR_MVTACLO_A) : /* mvtaclo $src1,$accs */ 5270{ 5271 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5272 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5273#define FLD(f) abuf->fields.sfmt_mvtachi_a.f 5274#define OPRND(f) par_exec->operands.sfmt_mvtachi_a.f 5275 int UNUSED written = 0; 5276 IADDR UNUSED pc = abuf->addr; 5277 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5278 5279 { 5280 DI opval = ORDI (ANDDI (GET_H_ACCUMS (FLD (f_accs)), MAKEDI (0xffffffff, 0)), ZEXTSIDI (* FLD (i_src1))); 5281 OPRND (accs) = opval; 5282 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 5283 } 5284 5285#undef OPRND 5286#undef FLD 5287} 5288 NEXT (vpc); 5289 5290CASE (sem, INSN_WRITE_MVTACLO_A) : /* mvtaclo $src1,$accs */ 5291 { 5292 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5293 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 5294#define FLD(f) abuf->fields.sfmt_mvtachi_a.f 5295#define OPRND(f) par_exec->operands.sfmt_mvtachi_a.f 5296 int UNUSED written = abuf->written; 5297 IADDR UNUSED pc = abuf->addr; 5298 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 5299 5300 SET_H_ACCUMS (FLD (f_accs), OPRND (accs)); 5301 5302#undef OPRND 5303#undef FLD 5304 } 5305 NEXT (vpc); 5306 5307 CASE (sem, INSN_PAR_MVTC) : /* mvtc $sr,$dcr */ 5308{ 5309 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5310 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5311#define FLD(f) abuf->fields.sfmt_ld_plus.f 5312#define OPRND(f) par_exec->operands.sfmt_mvtc.f 5313 int UNUSED written = 0; 5314 IADDR UNUSED pc = abuf->addr; 5315 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5316 5317 { 5318 USI opval = * FLD (i_sr); 5319 OPRND (dcr) = opval; 5320 TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval); 5321 } 5322 5323#undef OPRND 5324#undef FLD 5325} 5326 NEXT (vpc); 5327 5328CASE (sem, INSN_WRITE_MVTC) : /* mvtc $sr,$dcr */ 5329 { 5330 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5331 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 5332#define FLD(f) abuf->fields.sfmt_ld_plus.f 5333#define OPRND(f) par_exec->operands.sfmt_mvtc.f 5334 int UNUSED written = abuf->written; 5335 IADDR UNUSED pc = abuf->addr; 5336 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 5337 5338 SET_H_CR (FLD (f_r1), OPRND (dcr)); 5339 5340#undef OPRND 5341#undef FLD 5342 } 5343 NEXT (vpc); 5344 5345 CASE (sem, INSN_PAR_NEG) : /* neg $dr,$sr */ 5346{ 5347 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5348 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5349#define FLD(f) abuf->fields.sfmt_ld_plus.f 5350#define OPRND(f) par_exec->operands.sfmt_mv.f 5351 int UNUSED written = 0; 5352 IADDR UNUSED pc = abuf->addr; 5353 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5354 5355 { 5356 SI opval = NEGSI (* FLD (i_sr)); 5357 OPRND (dr) = opval; 5358 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5359 } 5360 5361#undef OPRND 5362#undef FLD 5363} 5364 NEXT (vpc); 5365 5366CASE (sem, INSN_WRITE_NEG) : /* neg $dr,$sr */ 5367 { 5368 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5369 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 5370#define FLD(f) abuf->fields.sfmt_ld_plus.f 5371#define OPRND(f) par_exec->operands.sfmt_mv.f 5372 int UNUSED written = abuf->written; 5373 IADDR UNUSED pc = abuf->addr; 5374 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 5375 5376 * FLD (i_dr) = OPRND (dr); 5377 5378#undef OPRND 5379#undef FLD 5380 } 5381 NEXT (vpc); 5382 5383 CASE (sem, INSN_PAR_NOP) : /* nop */ 5384{ 5385 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5386 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5387#define FLD(f) abuf->fields.fmt_empty.f 5388#define OPRND(f) par_exec->operands.sfmt_nop.f 5389 int UNUSED written = 0; 5390 IADDR UNUSED pc = abuf->addr; 5391 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5392 5393PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr); 5394 5395#undef OPRND 5396#undef FLD 5397} 5398 NEXT (vpc); 5399 5400CASE (sem, INSN_WRITE_NOP) : /* nop */ 5401 { 5402 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5403 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 5404#define FLD(f) abuf->fields.fmt_empty.f 5405#define OPRND(f) par_exec->operands.sfmt_nop.f 5406 int UNUSED written = abuf->written; 5407 IADDR UNUSED pc = abuf->addr; 5408 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 5409 5410 5411#undef OPRND 5412#undef FLD 5413 } 5414 NEXT (vpc); 5415 5416 CASE (sem, INSN_PAR_NOT) : /* not $dr,$sr */ 5417{ 5418 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5419 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5420#define FLD(f) abuf->fields.sfmt_ld_plus.f 5421#define OPRND(f) par_exec->operands.sfmt_mv.f 5422 int UNUSED written = 0; 5423 IADDR UNUSED pc = abuf->addr; 5424 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5425 5426 { 5427 SI opval = INVSI (* FLD (i_sr)); 5428 OPRND (dr) = opval; 5429 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5430 } 5431 5432#undef OPRND 5433#undef FLD 5434} 5435 NEXT (vpc); 5436 5437CASE (sem, INSN_WRITE_NOT) : /* not $dr,$sr */ 5438 { 5439 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5440 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 5441#define FLD(f) abuf->fields.sfmt_ld_plus.f 5442#define OPRND(f) par_exec->operands.sfmt_mv.f 5443 int UNUSED written = abuf->written; 5444 IADDR UNUSED pc = abuf->addr; 5445 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 5446 5447 * FLD (i_dr) = OPRND (dr); 5448 5449#undef OPRND 5450#undef FLD 5451 } 5452 NEXT (vpc); 5453 5454 CASE (sem, INSN_PAR_RAC_DSI) : /* rac $accd,$accs,$imm1 */ 5455{ 5456 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5457 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5458#define FLD(f) abuf->fields.sfmt_rac_dsi.f 5459#define OPRND(f) par_exec->operands.sfmt_rac_dsi.f 5460 int UNUSED written = 0; 5461 IADDR UNUSED pc = abuf->addr; 5462 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5463 5464{ 5465 DI tmp_tmp1; 5466 tmp_tmp1 = SLLDI (GET_H_ACCUMS (FLD (f_accs)), FLD (f_imm1)); 5467 tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 32768)); 5468 { 5469 DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0xffff0000))) ? (MAKEDI (32767, 0xffff0000)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0xffff0000))); 5470 OPRND (accd) = opval; 5471 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 5472 } 5473} 5474 5475#undef OPRND 5476#undef FLD 5477} 5478 NEXT (vpc); 5479 5480CASE (sem, INSN_WRITE_RAC_DSI) : /* rac $accd,$accs,$imm1 */ 5481 { 5482 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5483 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 5484#define FLD(f) abuf->fields.sfmt_rac_dsi.f 5485#define OPRND(f) par_exec->operands.sfmt_rac_dsi.f 5486 int UNUSED written = abuf->written; 5487 IADDR UNUSED pc = abuf->addr; 5488 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 5489 5490 SET_H_ACCUMS (FLD (f_accd), OPRND (accd)); 5491 5492#undef OPRND 5493#undef FLD 5494 } 5495 NEXT (vpc); 5496 5497 CASE (sem, INSN_PAR_RACH_DSI) : /* rach $accd,$accs,$imm1 */ 5498{ 5499 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5500 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5501#define FLD(f) abuf->fields.sfmt_rac_dsi.f 5502#define OPRND(f) par_exec->operands.sfmt_rac_dsi.f 5503 int UNUSED written = 0; 5504 IADDR UNUSED pc = abuf->addr; 5505 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5506 5507{ 5508 DI tmp_tmp1; 5509 tmp_tmp1 = SLLDI (GET_H_ACCUMS (FLD (f_accs)), FLD (f_imm1)); 5510 tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 0x80000000)); 5511 { 5512 DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0))) ? (MAKEDI (32767, 0)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0))); 5513 OPRND (accd) = opval; 5514 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 5515 } 5516} 5517 5518#undef OPRND 5519#undef FLD 5520} 5521 NEXT (vpc); 5522 5523CASE (sem, INSN_WRITE_RACH_DSI) : /* rach $accd,$accs,$imm1 */ 5524 { 5525 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5526 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 5527#define FLD(f) abuf->fields.sfmt_rac_dsi.f 5528#define OPRND(f) par_exec->operands.sfmt_rac_dsi.f 5529 int UNUSED written = abuf->written; 5530 IADDR UNUSED pc = abuf->addr; 5531 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 5532 5533 SET_H_ACCUMS (FLD (f_accd), OPRND (accd)); 5534 5535#undef OPRND 5536#undef FLD 5537 } 5538 NEXT (vpc); 5539 5540 CASE (sem, INSN_PAR_RTE) : /* rte */ 5541{ 5542 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5543 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5544#define FLD(f) abuf->fields.fmt_empty.f 5545#define OPRND(f) par_exec->operands.sfmt_rte.f 5546 int UNUSED written = 0; 5547 IADDR UNUSED pc = abuf->addr; 5548 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5549 5550{ 5551 { 5552 USI opval = ANDSI (GET_H_CR (((UINT) 6)), -4); 5553 OPRND (pc) = opval; 5554 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 5555 } 5556 { 5557 USI opval = GET_H_CR (((UINT) 14)); 5558 OPRND (h_cr_USI_6) = opval; 5559 TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval); 5560 } 5561 { 5562 UQI opval = CPU (h_bpsw); 5563 OPRND (h_psw_UQI) = opval; 5564 TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval); 5565 } 5566 { 5567 UQI opval = CPU (h_bbpsw); 5568 OPRND (h_bpsw_UQI) = opval; 5569 TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval); 5570 } 5571} 5572 5573#undef OPRND 5574#undef FLD 5575} 5576 NEXT (vpc); 5577 5578CASE (sem, INSN_WRITE_RTE) : /* rte */ 5579 { 5580 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5581 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 5582#define FLD(f) abuf->fields.fmt_empty.f 5583#define OPRND(f) par_exec->operands.sfmt_rte.f 5584 int UNUSED written = abuf->written; 5585 IADDR UNUSED pc = abuf->addr; 5586 SEM_BRANCH_INIT 5587 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 5588 5589 CPU (h_bpsw) = OPRND (h_bpsw_UQI); 5590 SET_H_CR (((UINT) 6), OPRND (h_cr_USI_6)); 5591 SET_H_PSW (OPRND (h_psw_UQI)); 5592 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc); 5593 5594 SEM_BRANCH_FINI (vpc); 5595#undef OPRND 5596#undef FLD 5597 } 5598 NEXT (vpc); 5599 5600 CASE (sem, INSN_PAR_SLL) : /* sll $dr,$sr */ 5601{ 5602 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5603 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5604#define FLD(f) abuf->fields.sfmt_add.f 5605#define OPRND(f) par_exec->operands.sfmt_add.f 5606 int UNUSED written = 0; 5607 IADDR UNUSED pc = abuf->addr; 5608 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5609 5610 { 5611 SI opval = SLLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31)); 5612 OPRND (dr) = opval; 5613 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5614 } 5615 5616#undef OPRND 5617#undef FLD 5618} 5619 NEXT (vpc); 5620 5621CASE (sem, INSN_WRITE_SLL) : /* sll $dr,$sr */ 5622 { 5623 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5624 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 5625#define FLD(f) abuf->fields.sfmt_add.f 5626#define OPRND(f) par_exec->operands.sfmt_add.f 5627 int UNUSED written = abuf->written; 5628 IADDR UNUSED pc = abuf->addr; 5629 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 5630 5631 * FLD (i_dr) = OPRND (dr); 5632 5633#undef OPRND 5634#undef FLD 5635 } 5636 NEXT (vpc); 5637 5638 CASE (sem, INSN_PAR_SLLI) : /* slli $dr,$uimm5 */ 5639{ 5640 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5641 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5642#define FLD(f) abuf->fields.sfmt_slli.f 5643#define OPRND(f) par_exec->operands.sfmt_slli.f 5644 int UNUSED written = 0; 5645 IADDR UNUSED pc = abuf->addr; 5646 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5647 5648 { 5649 SI opval = SLLSI (* FLD (i_dr), FLD (f_uimm5)); 5650 OPRND (dr) = opval; 5651 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5652 } 5653 5654#undef OPRND 5655#undef FLD 5656} 5657 NEXT (vpc); 5658 5659CASE (sem, INSN_WRITE_SLLI) : /* slli $dr,$uimm5 */ 5660 { 5661 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5662 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 5663#define FLD(f) abuf->fields.sfmt_slli.f 5664#define OPRND(f) par_exec->operands.sfmt_slli.f 5665 int UNUSED written = abuf->written; 5666 IADDR UNUSED pc = abuf->addr; 5667 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 5668 5669 * FLD (i_dr) = OPRND (dr); 5670 5671#undef OPRND 5672#undef FLD 5673 } 5674 NEXT (vpc); 5675 5676 CASE (sem, INSN_PAR_SRA) : /* sra $dr,$sr */ 5677{ 5678 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5679 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5680#define FLD(f) abuf->fields.sfmt_add.f 5681#define OPRND(f) par_exec->operands.sfmt_add.f 5682 int UNUSED written = 0; 5683 IADDR UNUSED pc = abuf->addr; 5684 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5685 5686 { 5687 SI opval = SRASI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31)); 5688 OPRND (dr) = opval; 5689 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5690 } 5691 5692#undef OPRND 5693#undef FLD 5694} 5695 NEXT (vpc); 5696 5697CASE (sem, INSN_WRITE_SRA) : /* sra $dr,$sr */ 5698 { 5699 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5700 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 5701#define FLD(f) abuf->fields.sfmt_add.f 5702#define OPRND(f) par_exec->operands.sfmt_add.f 5703 int UNUSED written = abuf->written; 5704 IADDR UNUSED pc = abuf->addr; 5705 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 5706 5707 * FLD (i_dr) = OPRND (dr); 5708 5709#undef OPRND 5710#undef FLD 5711 } 5712 NEXT (vpc); 5713 5714 CASE (sem, INSN_PAR_SRAI) : /* srai $dr,$uimm5 */ 5715{ 5716 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5717 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5718#define FLD(f) abuf->fields.sfmt_slli.f 5719#define OPRND(f) par_exec->operands.sfmt_slli.f 5720 int UNUSED written = 0; 5721 IADDR UNUSED pc = abuf->addr; 5722 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5723 5724 { 5725 SI opval = SRASI (* FLD (i_dr), FLD (f_uimm5)); 5726 OPRND (dr) = opval; 5727 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5728 } 5729 5730#undef OPRND 5731#undef FLD 5732} 5733 NEXT (vpc); 5734 5735CASE (sem, INSN_WRITE_SRAI) : /* srai $dr,$uimm5 */ 5736 { 5737 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5738 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 5739#define FLD(f) abuf->fields.sfmt_slli.f 5740#define OPRND(f) par_exec->operands.sfmt_slli.f 5741 int UNUSED written = abuf->written; 5742 IADDR UNUSED pc = abuf->addr; 5743 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 5744 5745 * FLD (i_dr) = OPRND (dr); 5746 5747#undef OPRND 5748#undef FLD 5749 } 5750 NEXT (vpc); 5751 5752 CASE (sem, INSN_PAR_SRL) : /* srl $dr,$sr */ 5753{ 5754 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5755 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5756#define FLD(f) abuf->fields.sfmt_add.f 5757#define OPRND(f) par_exec->operands.sfmt_add.f 5758 int UNUSED written = 0; 5759 IADDR UNUSED pc = abuf->addr; 5760 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5761 5762 { 5763 SI opval = SRLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31)); 5764 OPRND (dr) = opval; 5765 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5766 } 5767 5768#undef OPRND 5769#undef FLD 5770} 5771 NEXT (vpc); 5772 5773CASE (sem, INSN_WRITE_SRL) : /* srl $dr,$sr */ 5774 { 5775 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5776 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 5777#define FLD(f) abuf->fields.sfmt_add.f 5778#define OPRND(f) par_exec->operands.sfmt_add.f 5779 int UNUSED written = abuf->written; 5780 IADDR UNUSED pc = abuf->addr; 5781 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 5782 5783 * FLD (i_dr) = OPRND (dr); 5784 5785#undef OPRND 5786#undef FLD 5787 } 5788 NEXT (vpc); 5789 5790 CASE (sem, INSN_PAR_SRLI) : /* srli $dr,$uimm5 */ 5791{ 5792 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5793 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5794#define FLD(f) abuf->fields.sfmt_slli.f 5795#define OPRND(f) par_exec->operands.sfmt_slli.f 5796 int UNUSED written = 0; 5797 IADDR UNUSED pc = abuf->addr; 5798 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5799 5800 { 5801 SI opval = SRLSI (* FLD (i_dr), FLD (f_uimm5)); 5802 OPRND (dr) = opval; 5803 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5804 } 5805 5806#undef OPRND 5807#undef FLD 5808} 5809 NEXT (vpc); 5810 5811CASE (sem, INSN_WRITE_SRLI) : /* srli $dr,$uimm5 */ 5812 { 5813 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5814 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 5815#define FLD(f) abuf->fields.sfmt_slli.f 5816#define OPRND(f) par_exec->operands.sfmt_slli.f 5817 int UNUSED written = abuf->written; 5818 IADDR UNUSED pc = abuf->addr; 5819 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 5820 5821 * FLD (i_dr) = OPRND (dr); 5822 5823#undef OPRND 5824#undef FLD 5825 } 5826 NEXT (vpc); 5827 5828 CASE (sem, INSN_PAR_ST) : /* st $src1,@$src2 */ 5829{ 5830 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5831 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5832#define FLD(f) abuf->fields.sfmt_st_plus.f 5833#define OPRND(f) par_exec->operands.sfmt_st.f 5834 int UNUSED written = 0; 5835 IADDR UNUSED pc = abuf->addr; 5836 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5837 5838 { 5839 SI opval = * FLD (i_src1); 5840 OPRND (h_memory_SI_src2_idx) = * FLD (i_src2); 5841 OPRND (h_memory_SI_src2) = opval; 5842 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 5843 } 5844 5845#undef OPRND 5846#undef FLD 5847} 5848 NEXT (vpc); 5849 5850CASE (sem, INSN_WRITE_ST) : /* st $src1,@$src2 */ 5851 { 5852 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5853 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 5854#define FLD(f) abuf->fields.sfmt_st_plus.f 5855#define OPRND(f) par_exec->operands.sfmt_st.f 5856 int UNUSED written = abuf->written; 5857 IADDR UNUSED pc = abuf->addr; 5858 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 5859 5860 SETMEMSI (current_cpu, pc, OPRND (h_memory_SI_src2_idx), OPRND (h_memory_SI_src2)); 5861 5862#undef OPRND 5863#undef FLD 5864 } 5865 NEXT (vpc); 5866 5867 CASE (sem, INSN_PAR_STB) : /* stb $src1,@$src2 */ 5868{ 5869 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5870 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5871#define FLD(f) abuf->fields.sfmt_st_plus.f 5872#define OPRND(f) par_exec->operands.sfmt_stb.f 5873 int UNUSED written = 0; 5874 IADDR UNUSED pc = abuf->addr; 5875 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5876 5877 { 5878 QI opval = * FLD (i_src1); 5879 OPRND (h_memory_QI_src2_idx) = * FLD (i_src2); 5880 OPRND (h_memory_QI_src2) = opval; 5881 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 5882 } 5883 5884#undef OPRND 5885#undef FLD 5886} 5887 NEXT (vpc); 5888 5889CASE (sem, INSN_WRITE_STB) : /* stb $src1,@$src2 */ 5890 { 5891 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5892 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 5893#define FLD(f) abuf->fields.sfmt_st_plus.f 5894#define OPRND(f) par_exec->operands.sfmt_stb.f 5895 int UNUSED written = abuf->written; 5896 IADDR UNUSED pc = abuf->addr; 5897 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 5898 5899 SETMEMQI (current_cpu, pc, OPRND (h_memory_QI_src2_idx), OPRND (h_memory_QI_src2)); 5900 5901#undef OPRND 5902#undef FLD 5903 } 5904 NEXT (vpc); 5905 5906 CASE (sem, INSN_PAR_STH) : /* sth $src1,@$src2 */ 5907{ 5908 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5909 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5910#define FLD(f) abuf->fields.sfmt_st_plus.f 5911#define OPRND(f) par_exec->operands.sfmt_sth.f 5912 int UNUSED written = 0; 5913 IADDR UNUSED pc = abuf->addr; 5914 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5915 5916 { 5917 HI opval = * FLD (i_src1); 5918 OPRND (h_memory_HI_src2_idx) = * FLD (i_src2); 5919 OPRND (h_memory_HI_src2) = opval; 5920 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 5921 } 5922 5923#undef OPRND 5924#undef FLD 5925} 5926 NEXT (vpc); 5927 5928CASE (sem, INSN_WRITE_STH) : /* sth $src1,@$src2 */ 5929 { 5930 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5931 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 5932#define FLD(f) abuf->fields.sfmt_st_plus.f 5933#define OPRND(f) par_exec->operands.sfmt_sth.f 5934 int UNUSED written = abuf->written; 5935 IADDR UNUSED pc = abuf->addr; 5936 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 5937 5938 SETMEMHI (current_cpu, pc, OPRND (h_memory_HI_src2_idx), OPRND (h_memory_HI_src2)); 5939 5940#undef OPRND 5941#undef FLD 5942 } 5943 NEXT (vpc); 5944 5945 CASE (sem, INSN_PAR_ST_PLUS) : /* st $src1,@+$src2 */ 5946{ 5947 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5948 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5949#define FLD(f) abuf->fields.sfmt_st_plus.f 5950#define OPRND(f) par_exec->operands.sfmt_st_plus.f 5951 int UNUSED written = 0; 5952 IADDR UNUSED pc = abuf->addr; 5953 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5954 5955{ 5956 SI tmp_new_src2; 5957 tmp_new_src2 = ADDSI (* FLD (i_src2), 4); 5958 { 5959 SI opval = * FLD (i_src1); 5960 OPRND (h_memory_SI_new_src2_idx) = tmp_new_src2; 5961 OPRND (h_memory_SI_new_src2) = opval; 5962 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 5963 } 5964 { 5965 SI opval = tmp_new_src2; 5966 OPRND (src2) = opval; 5967 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 5968 } 5969} 5970 5971#undef OPRND 5972#undef FLD 5973} 5974 NEXT (vpc); 5975 5976CASE (sem, INSN_WRITE_ST_PLUS) : /* st $src1,@+$src2 */ 5977 { 5978 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5979 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 5980#define FLD(f) abuf->fields.sfmt_st_plus.f 5981#define OPRND(f) par_exec->operands.sfmt_st_plus.f 5982 int UNUSED written = abuf->written; 5983 IADDR UNUSED pc = abuf->addr; 5984 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 5985 5986 SETMEMSI (current_cpu, pc, OPRND (h_memory_SI_new_src2_idx), OPRND (h_memory_SI_new_src2)); 5987 * FLD (i_src2) = OPRND (src2); 5988 5989#undef OPRND 5990#undef FLD 5991 } 5992 NEXT (vpc); 5993 5994 CASE (sem, INSN_PAR_STH_PLUS) : /* sth $src1,@$src2+ */ 5995{ 5996 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5997 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5998#define FLD(f) abuf->fields.sfmt_st_plus.f 5999#define OPRND(f) par_exec->operands.sfmt_sth_plus.f 6000 int UNUSED written = 0; 6001 IADDR UNUSED pc = abuf->addr; 6002 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 6003 6004{ 6005 HI tmp_new_src2; 6006 { 6007 HI opval = * FLD (i_src1); 6008 OPRND (h_memory_HI_new_src2_idx) = tmp_new_src2; 6009 OPRND (h_memory_HI_new_src2) = opval; 6010 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 6011 } 6012 tmp_new_src2 = ADDSI (* FLD (i_src2), 2); 6013 { 6014 SI opval = tmp_new_src2; 6015 OPRND (src2) = opval; 6016 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 6017 } 6018} 6019 6020#undef OPRND 6021#undef FLD 6022} 6023 NEXT (vpc); 6024 6025CASE (sem, INSN_WRITE_STH_PLUS) : /* sth $src1,@$src2+ */ 6026 { 6027 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6028 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 6029#define FLD(f) abuf->fields.sfmt_st_plus.f 6030#define OPRND(f) par_exec->operands.sfmt_sth_plus.f 6031 int UNUSED written = abuf->written; 6032 IADDR UNUSED pc = abuf->addr; 6033 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 6034 6035 SETMEMHI (current_cpu, pc, OPRND (h_memory_HI_new_src2_idx), OPRND (h_memory_HI_new_src2)); 6036 * FLD (i_src2) = OPRND (src2); 6037 6038#undef OPRND 6039#undef FLD 6040 } 6041 NEXT (vpc); 6042 6043 CASE (sem, INSN_PAR_STB_PLUS) : /* stb $src1,@$src2+ */ 6044{ 6045 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6046 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6047#define FLD(f) abuf->fields.sfmt_st_plus.f 6048#define OPRND(f) par_exec->operands.sfmt_stb_plus.f 6049 int UNUSED written = 0; 6050 IADDR UNUSED pc = abuf->addr; 6051 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 6052 6053{ 6054 QI tmp_new_src2; 6055 { 6056 QI opval = * FLD (i_src1); 6057 OPRND (h_memory_QI_new_src2_idx) = tmp_new_src2; 6058 OPRND (h_memory_QI_new_src2) = opval; 6059 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 6060 } 6061 tmp_new_src2 = ADDSI (* FLD (i_src2), 1); 6062 { 6063 SI opval = tmp_new_src2; 6064 OPRND (src2) = opval; 6065 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 6066 } 6067} 6068 6069#undef OPRND 6070#undef FLD 6071} 6072 NEXT (vpc); 6073 6074CASE (sem, INSN_WRITE_STB_PLUS) : /* stb $src1,@$src2+ */ 6075 { 6076 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6077 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 6078#define FLD(f) abuf->fields.sfmt_st_plus.f 6079#define OPRND(f) par_exec->operands.sfmt_stb_plus.f 6080 int UNUSED written = abuf->written; 6081 IADDR UNUSED pc = abuf->addr; 6082 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 6083 6084 SETMEMQI (current_cpu, pc, OPRND (h_memory_QI_new_src2_idx), OPRND (h_memory_QI_new_src2)); 6085 * FLD (i_src2) = OPRND (src2); 6086 6087#undef OPRND 6088#undef FLD 6089 } 6090 NEXT (vpc); 6091 6092 CASE (sem, INSN_PAR_ST_MINUS) : /* st $src1,@-$src2 */ 6093{ 6094 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6095 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6096#define FLD(f) abuf->fields.sfmt_st_plus.f 6097#define OPRND(f) par_exec->operands.sfmt_st_plus.f 6098 int UNUSED written = 0; 6099 IADDR UNUSED pc = abuf->addr; 6100 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 6101 6102{ 6103 SI tmp_new_src2; 6104 tmp_new_src2 = SUBSI (* FLD (i_src2), 4); 6105 { 6106 SI opval = * FLD (i_src1); 6107 OPRND (h_memory_SI_new_src2_idx) = tmp_new_src2; 6108 OPRND (h_memory_SI_new_src2) = opval; 6109 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 6110 } 6111 { 6112 SI opval = tmp_new_src2; 6113 OPRND (src2) = opval; 6114 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 6115 } 6116} 6117 6118#undef OPRND 6119#undef FLD 6120} 6121 NEXT (vpc); 6122 6123CASE (sem, INSN_WRITE_ST_MINUS) : /* st $src1,@-$src2 */ 6124 { 6125 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6126 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 6127#define FLD(f) abuf->fields.sfmt_st_plus.f 6128#define OPRND(f) par_exec->operands.sfmt_st_plus.f 6129 int UNUSED written = abuf->written; 6130 IADDR UNUSED pc = abuf->addr; 6131 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 6132 6133 SETMEMSI (current_cpu, pc, OPRND (h_memory_SI_new_src2_idx), OPRND (h_memory_SI_new_src2)); 6134 * FLD (i_src2) = OPRND (src2); 6135 6136#undef OPRND 6137#undef FLD 6138 } 6139 NEXT (vpc); 6140 6141 CASE (sem, INSN_PAR_SUB) : /* sub $dr,$sr */ 6142{ 6143 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6144 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6145#define FLD(f) abuf->fields.sfmt_add.f 6146#define OPRND(f) par_exec->operands.sfmt_add.f 6147 int UNUSED written = 0; 6148 IADDR UNUSED pc = abuf->addr; 6149 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 6150 6151 { 6152 SI opval = SUBSI (* FLD (i_dr), * FLD (i_sr)); 6153 OPRND (dr) = opval; 6154 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 6155 } 6156 6157#undef OPRND 6158#undef FLD 6159} 6160 NEXT (vpc); 6161 6162CASE (sem, INSN_WRITE_SUB) : /* sub $dr,$sr */ 6163 { 6164 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6165 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 6166#define FLD(f) abuf->fields.sfmt_add.f 6167#define OPRND(f) par_exec->operands.sfmt_add.f 6168 int UNUSED written = abuf->written; 6169 IADDR UNUSED pc = abuf->addr; 6170 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 6171 6172 * FLD (i_dr) = OPRND (dr); 6173 6174#undef OPRND 6175#undef FLD 6176 } 6177 NEXT (vpc); 6178 6179 CASE (sem, INSN_PAR_SUBV) : /* subv $dr,$sr */ 6180{ 6181 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6182 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6183#define FLD(f) abuf->fields.sfmt_add.f 6184#define OPRND(f) par_exec->operands.sfmt_addv.f 6185 int UNUSED written = 0; 6186 IADDR UNUSED pc = abuf->addr; 6187 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 6188 6189{ 6190 SI temp0;BI temp1; 6191 temp0 = SUBSI (* FLD (i_dr), * FLD (i_sr)); 6192 temp1 = SUBOFSI (* FLD (i_dr), * FLD (i_sr), 0); 6193 { 6194 SI opval = temp0; 6195 OPRND (dr) = opval; 6196 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 6197 } 6198 { 6199 BI opval = temp1; 6200 OPRND (condbit) = opval; 6201 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 6202 } 6203} 6204 6205#undef OPRND 6206#undef FLD 6207} 6208 NEXT (vpc); 6209 6210CASE (sem, INSN_WRITE_SUBV) : /* subv $dr,$sr */ 6211 { 6212 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6213 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 6214#define FLD(f) abuf->fields.sfmt_add.f 6215#define OPRND(f) par_exec->operands.sfmt_addv.f 6216 int UNUSED written = abuf->written; 6217 IADDR UNUSED pc = abuf->addr; 6218 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 6219 6220 CPU (h_cond) = OPRND (condbit); 6221 * FLD (i_dr) = OPRND (dr); 6222 6223#undef OPRND 6224#undef FLD 6225 } 6226 NEXT (vpc); 6227 6228 CASE (sem, INSN_PAR_SUBX) : /* subx $dr,$sr */ 6229{ 6230 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6231 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6232#define FLD(f) abuf->fields.sfmt_add.f 6233#define OPRND(f) par_exec->operands.sfmt_addx.f 6234 int UNUSED written = 0; 6235 IADDR UNUSED pc = abuf->addr; 6236 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 6237 6238{ 6239 SI temp0;BI temp1; 6240 temp0 = SUBCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond)); 6241 temp1 = SUBCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond)); 6242 { 6243 SI opval = temp0; 6244 OPRND (dr) = opval; 6245 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 6246 } 6247 { 6248 BI opval = temp1; 6249 OPRND (condbit) = opval; 6250 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 6251 } 6252} 6253 6254#undef OPRND 6255#undef FLD 6256} 6257 NEXT (vpc); 6258 6259CASE (sem, INSN_WRITE_SUBX) : /* subx $dr,$sr */ 6260 { 6261 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6262 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 6263#define FLD(f) abuf->fields.sfmt_add.f 6264#define OPRND(f) par_exec->operands.sfmt_addx.f 6265 int UNUSED written = abuf->written; 6266 IADDR UNUSED pc = abuf->addr; 6267 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 6268 6269 CPU (h_cond) = OPRND (condbit); 6270 * FLD (i_dr) = OPRND (dr); 6271 6272#undef OPRND 6273#undef FLD 6274 } 6275 NEXT (vpc); 6276 6277 CASE (sem, INSN_PAR_TRAP) : /* trap $uimm4 */ 6278{ 6279 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6280 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6281#define FLD(f) abuf->fields.sfmt_trap.f 6282#define OPRND(f) par_exec->operands.sfmt_trap.f 6283 int UNUSED written = 0; 6284 IADDR UNUSED pc = abuf->addr; 6285 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 6286 6287{ 6288 { 6289 USI opval = GET_H_CR (((UINT) 6)); 6290 OPRND (h_cr_USI_14) = opval; 6291 TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval); 6292 } 6293 { 6294 USI opval = ADDSI (pc, 4); 6295 OPRND (h_cr_USI_6) = opval; 6296 TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval); 6297 } 6298 { 6299 UQI opval = CPU (h_bpsw); 6300 OPRND (h_bbpsw_UQI) = opval; 6301 TRACE_RESULT (current_cpu, abuf, "bbpsw", 'x', opval); 6302 } 6303 { 6304 UQI opval = GET_H_PSW (); 6305 OPRND (h_bpsw_UQI) = opval; 6306 TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval); 6307 } 6308 { 6309 UQI opval = ANDQI (GET_H_PSW (), 128); 6310 OPRND (h_psw_UQI) = opval; 6311 TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval); 6312 } 6313 { 6314 SI opval = m32r_trap (current_cpu, pc, FLD (f_uimm4)); 6315 OPRND (pc) = opval; 6316 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 6317 } 6318} 6319 6320#undef OPRND 6321#undef FLD 6322} 6323 NEXT (vpc); 6324 6325CASE (sem, INSN_WRITE_TRAP) : /* trap $uimm4 */ 6326 { 6327 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6328 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 6329#define FLD(f) abuf->fields.sfmt_trap.f 6330#define OPRND(f) par_exec->operands.sfmt_trap.f 6331 int UNUSED written = abuf->written; 6332 IADDR UNUSED pc = abuf->addr; 6333 SEM_BRANCH_INIT 6334 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 6335 6336 CPU (h_bbpsw) = OPRND (h_bbpsw_UQI); 6337 CPU (h_bpsw) = OPRND (h_bpsw_UQI); 6338 SET_H_CR (((UINT) 14), OPRND (h_cr_USI_14)); 6339 SET_H_CR (((UINT) 6), OPRND (h_cr_USI_6)); 6340 SET_H_PSW (OPRND (h_psw_UQI)); 6341 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc); 6342 6343 SEM_BRANCH_FINI (vpc); 6344#undef OPRND 6345#undef FLD 6346 } 6347 NEXT (vpc); 6348 6349 CASE (sem, INSN_PAR_UNLOCK) : /* unlock $src1,@$src2 */ 6350{ 6351 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6352 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6353#define FLD(f) abuf->fields.sfmt_st_plus.f 6354#define OPRND(f) par_exec->operands.sfmt_unlock.f 6355 int UNUSED written = 0; 6356 IADDR UNUSED pc = abuf->addr; 6357 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 6358 6359{ 6360if (CPU (h_lock)) { 6361 { 6362 SI opval = * FLD (i_src1); 6363 OPRND (h_memory_SI_src2_idx) = * FLD (i_src2); 6364 OPRND (h_memory_SI_src2) = opval; 6365 written |= (1 << 4); 6366 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 6367 } 6368} 6369 { 6370 BI opval = 0; 6371 OPRND (h_lock_BI) = opval; 6372 TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval); 6373 } 6374} 6375 6376 abuf->written = written; 6377#undef OPRND 6378#undef FLD 6379} 6380 NEXT (vpc); 6381 6382CASE (sem, INSN_WRITE_UNLOCK) : /* unlock $src1,@$src2 */ 6383 { 6384 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6385 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 6386#define FLD(f) abuf->fields.sfmt_st_plus.f 6387#define OPRND(f) par_exec->operands.sfmt_unlock.f 6388 int UNUSED written = abuf->written; 6389 IADDR UNUSED pc = abuf->addr; 6390 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 6391 6392 CPU (h_lock) = OPRND (h_lock_BI); 6393 if (written & (1 << 4)) 6394 { 6395 SETMEMSI (current_cpu, pc, OPRND (h_memory_SI_src2_idx), OPRND (h_memory_SI_src2)); 6396 } 6397 6398#undef OPRND 6399#undef FLD 6400 } 6401 NEXT (vpc); 6402 6403 CASE (sem, INSN_PAR_PCMPBZ) : /* pcmpbz $src2 */ 6404{ 6405 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6406 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6407#define FLD(f) abuf->fields.sfmt_st_plus.f 6408#define OPRND(f) par_exec->operands.sfmt_cmpz.f 6409 int UNUSED written = 0; 6410 IADDR UNUSED pc = abuf->addr; 6411 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 6412 6413 { 6414 BI opval = (EQSI (ANDSI (* FLD (i_src2), 255), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 65280), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 16711680), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 0xff000000), 0)) ? (1) : (0); 6415 OPRND (condbit) = opval; 6416 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 6417 } 6418 6419#undef OPRND 6420#undef FLD 6421} 6422 NEXT (vpc); 6423 6424CASE (sem, INSN_WRITE_PCMPBZ) : /* pcmpbz $src2 */ 6425 { 6426 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6427 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 6428#define FLD(f) abuf->fields.sfmt_st_plus.f 6429#define OPRND(f) par_exec->operands.sfmt_cmpz.f 6430 int UNUSED written = abuf->written; 6431 IADDR UNUSED pc = abuf->addr; 6432 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 6433 6434 CPU (h_cond) = OPRND (condbit); 6435 6436#undef OPRND 6437#undef FLD 6438 } 6439 NEXT (vpc); 6440 6441 CASE (sem, INSN_PAR_SADD) : /* sadd */ 6442{ 6443 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6444 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6445#define FLD(f) abuf->fields.fmt_empty.f 6446#define OPRND(f) par_exec->operands.sfmt_sadd.f 6447 int UNUSED written = 0; 6448 IADDR UNUSED pc = abuf->addr; 6449 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 6450 6451 { 6452 DI opval = ADDDI (SRADI (GET_H_ACCUMS (((UINT) 1)), 16), GET_H_ACCUMS (((UINT) 0))); 6453 OPRND (h_accums_DI_0) = opval; 6454 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 6455 } 6456 6457#undef OPRND 6458#undef FLD 6459} 6460 NEXT (vpc); 6461 6462CASE (sem, INSN_WRITE_SADD) : /* sadd */ 6463 { 6464 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6465 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 6466#define FLD(f) abuf->fields.fmt_empty.f 6467#define OPRND(f) par_exec->operands.sfmt_sadd.f 6468 int UNUSED written = abuf->written; 6469 IADDR UNUSED pc = abuf->addr; 6470 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 6471 6472 SET_H_ACCUMS (((UINT) 0), OPRND (h_accums_DI_0)); 6473 6474#undef OPRND 6475#undef FLD 6476 } 6477 NEXT (vpc); 6478 6479 CASE (sem, INSN_PAR_MACWU1) : /* macwu1 $src1,$src2 */ 6480{ 6481 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6482 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6483#define FLD(f) abuf->fields.sfmt_st_plus.f 6484#define OPRND(f) par_exec->operands.sfmt_macwu1.f 6485 int UNUSED written = 0; 6486 IADDR UNUSED pc = abuf->addr; 6487 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 6488 6489 { 6490 DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (((UINT) 1)), MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535)))), 8), 8); 6491 OPRND (h_accums_DI_1) = opval; 6492 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 6493 } 6494 6495#undef OPRND 6496#undef FLD 6497} 6498 NEXT (vpc); 6499 6500CASE (sem, INSN_WRITE_MACWU1) : /* macwu1 $src1,$src2 */ 6501 { 6502 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6503 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 6504#define FLD(f) abuf->fields.sfmt_st_plus.f 6505#define OPRND(f) par_exec->operands.sfmt_macwu1.f 6506 int UNUSED written = abuf->written; 6507 IADDR UNUSED pc = abuf->addr; 6508 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 6509 6510 SET_H_ACCUMS (((UINT) 1), OPRND (h_accums_DI_1)); 6511 6512#undef OPRND 6513#undef FLD 6514 } 6515 NEXT (vpc); 6516 6517 CASE (sem, INSN_PAR_MSBLO) : /* msblo $src1,$src2 */ 6518{ 6519 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6520 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6521#define FLD(f) abuf->fields.sfmt_st_plus.f 6522#define OPRND(f) par_exec->operands.sfmt_msblo.f 6523 int UNUSED written = 0; 6524 IADDR UNUSED pc = abuf->addr; 6525 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 6526 6527 { 6528 DI opval = SRADI (SLLDI (SUBDI (GET_H_ACCUM (), SRADI (SLLDI (MULDI (EXTHIDI (TRUNCSIHI (* FLD (i_src1))), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 32), 16)), 8), 8); 6529 OPRND (accum) = opval; 6530 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval); 6531 } 6532 6533#undef OPRND 6534#undef FLD 6535} 6536 NEXT (vpc); 6537 6538CASE (sem, INSN_WRITE_MSBLO) : /* msblo $src1,$src2 */ 6539 { 6540 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6541 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 6542#define FLD(f) abuf->fields.sfmt_st_plus.f 6543#define OPRND(f) par_exec->operands.sfmt_msblo.f 6544 int UNUSED written = abuf->written; 6545 IADDR UNUSED pc = abuf->addr; 6546 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 6547 6548 SET_H_ACCUM (OPRND (accum)); 6549 6550#undef OPRND 6551#undef FLD 6552 } 6553 NEXT (vpc); 6554 6555 CASE (sem, INSN_PAR_MULWU1) : /* mulwu1 $src1,$src2 */ 6556{ 6557 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6558 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6559#define FLD(f) abuf->fields.sfmt_st_plus.f 6560#define OPRND(f) par_exec->operands.sfmt_mulwu1.f 6561 int UNUSED written = 0; 6562 IADDR UNUSED pc = abuf->addr; 6563 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 6564 6565 { 6566 DI opval = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535))), 16), 16); 6567 OPRND (h_accums_DI_1) = opval; 6568 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 6569 } 6570 6571#undef OPRND 6572#undef FLD 6573} 6574 NEXT (vpc); 6575 6576CASE (sem, INSN_WRITE_MULWU1) : /* mulwu1 $src1,$src2 */ 6577 { 6578 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6579 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 6580#define FLD(f) abuf->fields.sfmt_st_plus.f 6581#define OPRND(f) par_exec->operands.sfmt_mulwu1.f 6582 int UNUSED written = abuf->written; 6583 IADDR UNUSED pc = abuf->addr; 6584 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 6585 6586 SET_H_ACCUMS (((UINT) 1), OPRND (h_accums_DI_1)); 6587 6588#undef OPRND 6589#undef FLD 6590 } 6591 NEXT (vpc); 6592 6593 CASE (sem, INSN_PAR_MACLH1) : /* maclh1 $src1,$src2 */ 6594{ 6595 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6596 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6597#define FLD(f) abuf->fields.sfmt_st_plus.f 6598#define OPRND(f) par_exec->operands.sfmt_macwu1.f 6599 int UNUSED written = 0; 6600 IADDR UNUSED pc = abuf->addr; 6601 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 6602 6603 { 6604 DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (((UINT) 1)), SLLDI (EXTSIDI (MULSI (EXTHISI (TRUNCSIHI (* FLD (i_src1))), SRASI (* FLD (i_src2), 16))), 16)), 8), 8); 6605 OPRND (h_accums_DI_1) = opval; 6606 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); 6607 } 6608 6609#undef OPRND 6610#undef FLD 6611} 6612 NEXT (vpc); 6613 6614CASE (sem, INSN_WRITE_MACLH1) : /* maclh1 $src1,$src2 */ 6615 { 6616 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6617 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 6618#define FLD(f) abuf->fields.sfmt_st_plus.f 6619#define OPRND(f) par_exec->operands.sfmt_macwu1.f 6620 int UNUSED written = abuf->written; 6621 IADDR UNUSED pc = abuf->addr; 6622 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 6623 6624 SET_H_ACCUMS (((UINT) 1), OPRND (h_accums_DI_1)); 6625 6626#undef OPRND 6627#undef FLD 6628 } 6629 NEXT (vpc); 6630 6631 CASE (sem, INSN_PAR_SC) : /* sc */ 6632{ 6633 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6634 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6635#define FLD(f) abuf->fields.fmt_empty.f 6636#define OPRND(f) par_exec->operands.sfmt_sc.f 6637 int UNUSED written = 0; 6638 IADDR UNUSED pc = abuf->addr; 6639 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 6640 6641if (ZEXTBISI (CPU (h_cond))) 6642 SEM_SKIP_INSN (current_cpu, sem_arg, vpc); 6643 6644#undef OPRND 6645#undef FLD 6646} 6647 NEXT (vpc); 6648 6649CASE (sem, INSN_WRITE_SC) : /* sc */ 6650 { 6651 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6652 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 6653#define FLD(f) abuf->fields.fmt_empty.f 6654#define OPRND(f) par_exec->operands.sfmt_sc.f 6655 int UNUSED written = abuf->written; 6656 IADDR UNUSED pc = abuf->addr; 6657 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 6658 6659 6660#undef OPRND 6661#undef FLD 6662 } 6663 NEXT (vpc); 6664 6665 CASE (sem, INSN_PAR_SNC) : /* snc */ 6666{ 6667 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6668 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6669#define FLD(f) abuf->fields.fmt_empty.f 6670#define OPRND(f) par_exec->operands.sfmt_sc.f 6671 int UNUSED written = 0; 6672 IADDR UNUSED pc = abuf->addr; 6673 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 6674 6675if (ZEXTBISI (NOTBI (CPU (h_cond)))) 6676 SEM_SKIP_INSN (current_cpu, sem_arg, vpc); 6677 6678#undef OPRND 6679#undef FLD 6680} 6681 NEXT (vpc); 6682 6683CASE (sem, INSN_WRITE_SNC) : /* snc */ 6684 { 6685 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6686 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 6687#define FLD(f) abuf->fields.fmt_empty.f 6688#define OPRND(f) par_exec->operands.sfmt_sc.f 6689 int UNUSED written = abuf->written; 6690 IADDR UNUSED pc = abuf->addr; 6691 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 6692 6693 6694#undef OPRND 6695#undef FLD 6696 } 6697 NEXT (vpc); 6698 6699 CASE (sem, INSN_PAR_CLRPSW) : /* clrpsw $uimm8 */ 6700{ 6701 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6702 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6703#define FLD(f) abuf->fields.sfmt_clrpsw.f 6704#define OPRND(f) par_exec->operands.sfmt_clrpsw.f 6705 int UNUSED written = 0; 6706 IADDR UNUSED pc = abuf->addr; 6707 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 6708 6709 { 6710 SI opval = ANDSI (GET_H_CR (((UINT) 0)), ORSI (INVBI (FLD (f_uimm8)), 65280)); 6711 OPRND (h_cr_USI_0) = opval; 6712 TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval); 6713 } 6714 6715#undef OPRND 6716#undef FLD 6717} 6718 NEXT (vpc); 6719 6720CASE (sem, INSN_WRITE_CLRPSW) : /* clrpsw $uimm8 */ 6721 { 6722 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6723 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 6724#define FLD(f) abuf->fields.sfmt_clrpsw.f 6725#define OPRND(f) par_exec->operands.sfmt_clrpsw.f 6726 int UNUSED written = abuf->written; 6727 IADDR UNUSED pc = abuf->addr; 6728 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 6729 6730 SET_H_CR (((UINT) 0), OPRND (h_cr_USI_0)); 6731 6732#undef OPRND 6733#undef FLD 6734 } 6735 NEXT (vpc); 6736 6737 CASE (sem, INSN_PAR_SETPSW) : /* setpsw $uimm8 */ 6738{ 6739 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6740 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6741#define FLD(f) abuf->fields.sfmt_clrpsw.f 6742#define OPRND(f) par_exec->operands.sfmt_setpsw.f 6743 int UNUSED written = 0; 6744 IADDR UNUSED pc = abuf->addr; 6745 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 6746 6747 { 6748 SI opval = FLD (f_uimm8); 6749 OPRND (h_cr_USI_0) = opval; 6750 TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval); 6751 } 6752 6753#undef OPRND 6754#undef FLD 6755} 6756 NEXT (vpc); 6757 6758CASE (sem, INSN_WRITE_SETPSW) : /* setpsw $uimm8 */ 6759 { 6760 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6761 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 6762#define FLD(f) abuf->fields.sfmt_clrpsw.f 6763#define OPRND(f) par_exec->operands.sfmt_setpsw.f 6764 int UNUSED written = abuf->written; 6765 IADDR UNUSED pc = abuf->addr; 6766 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 6767 6768 SET_H_CR (((UINT) 0), OPRND (h_cr_USI_0)); 6769 6770#undef OPRND 6771#undef FLD 6772 } 6773 NEXT (vpc); 6774 6775 CASE (sem, INSN_PAR_BTST) : /* btst $uimm3,$sr */ 6776{ 6777 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6778 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 6779#define FLD(f) abuf->fields.sfmt_bset.f 6780#define OPRND(f) par_exec->operands.sfmt_btst.f 6781 int UNUSED written = 0; 6782 IADDR UNUSED pc = abuf->addr; 6783 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 6784 6785 { 6786 BI opval = ANDQI (SRLSI (* FLD (i_sr), SUBSI (7, FLD (f_uimm3))), 1); 6787 OPRND (condbit) = opval; 6788 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 6789 } 6790 6791#undef OPRND 6792#undef FLD 6793} 6794 NEXT (vpc); 6795 6796CASE (sem, INSN_WRITE_BTST) : /* btst $uimm3,$sr */ 6797 { 6798 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 6799 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; 6800#define FLD(f) abuf->fields.sfmt_bset.f 6801#define OPRND(f) par_exec->operands.sfmt_btst.f 6802 int UNUSED written = abuf->written; 6803 IADDR UNUSED pc = abuf->addr; 6804 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 6805 6806 CPU (h_cond) = OPRND (condbit); 6807 6808#undef OPRND 6809#undef FLD 6810 } 6811 NEXT (vpc); 6812 6813 6814 } 6815 ENDSWITCH (sem) /* End of semantic switch. */ 6816 6817 /* At this point `vpc' contains the next insn to execute. */ 6818} 6819 6820#undef DEFINE_SWITCH 6821#endif /* DEFINE_SWITCH */ 6822