Searched hist:5 (Results 376 - 400 of 9460) sorted by relevance
| /freebsd-10.0-release/share/syscons/fonts/ | ||
| H A D | iso05-8x8.fnt | 88757 Tue Jan 01 04:44:36 MST 2002 ache Add 8859-5 fonts PR: 32448 Submitted by: Alexey Klimov <klim@unique.kiev.ua> |
| /freebsd-10.0-release/sys/boot/pc98/pc98boot/ | ||
| H A D | Makefile | 218557 Fri Feb 11 11:19:17 MST 2011 nyan Add the pc98boot image which concatenates boot0 and boot0.5. It's required by the gpart to write bootcode. |
| /freebsd-10.0-release/sys/dev/ath/ath_hal/ | ||
| H A D | ah_eeprom.h | diff 224519 Sat Jul 30 11:54:52 MDT 2011 adrian Introduce the FRAC_5G EEPROM parameter. This seems to indicate whether to program the NIC for fractional 5ghz mode (ie, 5mhz spaced channels, rather than 10 or 20mhz spacing) or not. The default (0) seems to mean "only program fractional mode if needed". A different value (eg 1) seems to always enable fractional 5ghz mode regardless of the frequency. Obtained from: Atheros Approved by: re (kib) diff 224519 Sat Jul 30 11:54:52 MDT 2011 adrian Introduce the FRAC_5G EEPROM parameter. This seems to indicate whether to program the NIC for fractional 5ghz mode (ie, 5mhz spaced channels, rather than 10 or 20mhz spacing) or not. The default (0) seems to mean "only program fractional mode if needed". A different value (eg 1) seems to always enable fractional 5ghz mode regardless of the frequency. Obtained from: Atheros Approved by: re (kib) diff 224519 Sat Jul 30 11:54:52 MDT 2011 adrian Introduce the FRAC_5G EEPROM parameter. This seems to indicate whether to program the NIC for fractional 5ghz mode (ie, 5mhz spaced channels, rather than 10 or 20mhz spacing) or not. The default (0) seems to mean "only program fractional mode if needed". A different value (eg 1) seems to always enable fractional 5ghz mode regardless of the frequency. Obtained from: Atheros Approved by: re (kib) diff 219318 Sat Mar 05 22:46:42 MST 2011 adrian Add an EEPROM op that extracts out the power table offset. It defaults to -5 dBm for eeproms earlier than v21. This apparently only applies to Merlin (AR9280) or later, earlier 11n chipsets have a power table offset of 0. All the code in ath9k which checks the power table offset and takes it into account first ensures the chip is Merlin or later. |
| /freebsd-10.0-release/sys/dev/ath/ath_hal/ar9002/ | ||
| H A D | ar9280.h | diff 219393 Tue Mar 08 05:10:35 MST 2011 adrian Implement open-loop TX power control (OLC) for Merlin (AR9280) and generally tidy up the TX power programming code. Enforce that the TX power offset for Merlin is -5 dBm, rather than any other value programmable in the EEPROM. This requires some further code to be ported over from ath9k, so until that is done and tested, fail to attach NICs whose TX power offset isn't -5 dBm. This improves both legacy and HT transmission on my merlin board. It allows for stable MCS TX up to MCS15. Specifics: * Refactor out a bunch of the TX power calibration code - setting/obtaining the power detector / gain boundaries, programming the PDADC * Take the -5 dBm TX power offset into account on Merlin - "0" in the per-rate TX power register means -5 dBm, not 0 dBm * When doing OLC * Enforce min (0) and max (AR5416_MAX_RATE_POWER) when fiddling with the TX power, to avoid the TX power values from wrapping when low. * Implement the 1 dBm cck power offset when doing OLC * Implement temperature compensation for 2.4ghz mode when doing OLC * Implement an AR9280 specific TX power calibration routine which includes the OLC twiddles, leaving the earlier chipset path (AR5416, AR9160) alone Whilst here, use these refactored routines for the AR9285 TX power calibration/programming code and enforce correct overflow/underflow handling when fiddling with TX power values. Obtained from: linux ath9k diff 219393 Tue Mar 08 05:10:35 MST 2011 adrian Implement open-loop TX power control (OLC) for Merlin (AR9280) and generally tidy up the TX power programming code. Enforce that the TX power offset for Merlin is -5 dBm, rather than any other value programmable in the EEPROM. This requires some further code to be ported over from ath9k, so until that is done and tested, fail to attach NICs whose TX power offset isn't -5 dBm. This improves both legacy and HT transmission on my merlin board. It allows for stable MCS TX up to MCS15. Specifics: * Refactor out a bunch of the TX power calibration code - setting/obtaining the power detector / gain boundaries, programming the PDADC * Take the -5 dBm TX power offset into account on Merlin - "0" in the per-rate TX power register means -5 dBm, not 0 dBm * When doing OLC * Enforce min (0) and max (AR5416_MAX_RATE_POWER) when fiddling with the TX power, to avoid the TX power values from wrapping when low. * Implement the 1 dBm cck power offset when doing OLC * Implement temperature compensation for 2.4ghz mode when doing OLC * Implement an AR9280 specific TX power calibration routine which includes the OLC twiddles, leaving the earlier chipset path (AR5416, AR9160) alone Whilst here, use these refactored routines for the AR9285 TX power calibration/programming code and enforce correct overflow/underflow handling when fiddling with TX power values. Obtained from: linux ath9k diff 219393 Tue Mar 08 05:10:35 MST 2011 adrian Implement open-loop TX power control (OLC) for Merlin (AR9280) and generally tidy up the TX power programming code. Enforce that the TX power offset for Merlin is -5 dBm, rather than any other value programmable in the EEPROM. This requires some further code to be ported over from ath9k, so until that is done and tested, fail to attach NICs whose TX power offset isn't -5 dBm. This improves both legacy and HT transmission on my merlin board. It allows for stable MCS TX up to MCS15. Specifics: * Refactor out a bunch of the TX power calibration code - setting/obtaining the power detector / gain boundaries, programming the PDADC * Take the -5 dBm TX power offset into account on Merlin - "0" in the per-rate TX power register means -5 dBm, not 0 dBm * When doing OLC * Enforce min (0) and max (AR5416_MAX_RATE_POWER) when fiddling with the TX power, to avoid the TX power values from wrapping when low. * Implement the 1 dBm cck power offset when doing OLC * Implement temperature compensation for 2.4ghz mode when doing OLC * Implement an AR9280 specific TX power calibration routine which includes the OLC twiddles, leaving the earlier chipset path (AR5416, AR9160) alone Whilst here, use these refactored routines for the AR9285 TX power calibration/programming code and enforce correct overflow/underflow handling when fiddling with TX power values. Obtained from: linux ath9k diff 219393 Tue Mar 08 05:10:35 MST 2011 adrian Implement open-loop TX power control (OLC) for Merlin (AR9280) and generally tidy up the TX power programming code. Enforce that the TX power offset for Merlin is -5 dBm, rather than any other value programmable in the EEPROM. This requires some further code to be ported over from ath9k, so until that is done and tested, fail to attach NICs whose TX power offset isn't -5 dBm. This improves both legacy and HT transmission on my merlin board. It allows for stable MCS TX up to MCS15. Specifics: * Refactor out a bunch of the TX power calibration code - setting/obtaining the power detector / gain boundaries, programming the PDADC * Take the -5 dBm TX power offset into account on Merlin - "0" in the per-rate TX power register means -5 dBm, not 0 dBm * When doing OLC * Enforce min (0) and max (AR5416_MAX_RATE_POWER) when fiddling with the TX power, to avoid the TX power values from wrapping when low. * Implement the 1 dBm cck power offset when doing OLC * Implement temperature compensation for 2.4ghz mode when doing OLC * Implement an AR9280 specific TX power calibration routine which includes the OLC twiddles, leaving the earlier chipset path (AR5416, AR9160) alone Whilst here, use these refactored routines for the AR9285 TX power calibration/programming code and enforce correct overflow/underflow handling when fiddling with TX power values. Obtained from: linux ath9k |
| H A D | ar9280_olc.c | 219393 Tue Mar 08 05:10:35 MST 2011 adrian Implement open-loop TX power control (OLC) for Merlin (AR9280) and generally tidy up the TX power programming code. Enforce that the TX power offset for Merlin is -5 dBm, rather than any other value programmable in the EEPROM. This requires some further code to be ported over from ath9k, so until that is done and tested, fail to attach NICs whose TX power offset isn't -5 dBm. This improves both legacy and HT transmission on my merlin board. It allows for stable MCS TX up to MCS15. Specifics: * Refactor out a bunch of the TX power calibration code - setting/obtaining the power detector / gain boundaries, programming the PDADC * Take the -5 dBm TX power offset into account on Merlin - "0" in the per-rate TX power register means -5 dBm, not 0 dBm * When doing OLC * Enforce min (0) and max (AR5416_MAX_RATE_POWER) when fiddling with the TX power, to avoid the TX power values from wrapping when low. * Implement the 1 dBm cck power offset when doing OLC * Implement temperature compensation for 2.4ghz mode when doing OLC * Implement an AR9280 specific TX power calibration routine which includes the OLC twiddles, leaving the earlier chipset path (AR5416, AR9160) alone Whilst here, use these refactored routines for the AR9285 TX power calibration/programming code and enforce correct overflow/underflow handling when fiddling with TX power values. Obtained from: linux ath9k 219393 Tue Mar 08 05:10:35 MST 2011 adrian Implement open-loop TX power control (OLC) for Merlin (AR9280) and generally tidy up the TX power programming code. Enforce that the TX power offset for Merlin is -5 dBm, rather than any other value programmable in the EEPROM. This requires some further code to be ported over from ath9k, so until that is done and tested, fail to attach NICs whose TX power offset isn't -5 dBm. This improves both legacy and HT transmission on my merlin board. It allows for stable MCS TX up to MCS15. Specifics: * Refactor out a bunch of the TX power calibration code - setting/obtaining the power detector / gain boundaries, programming the PDADC * Take the -5 dBm TX power offset into account on Merlin - "0" in the per-rate TX power register means -5 dBm, not 0 dBm * When doing OLC * Enforce min (0) and max (AR5416_MAX_RATE_POWER) when fiddling with the TX power, to avoid the TX power values from wrapping when low. * Implement the 1 dBm cck power offset when doing OLC * Implement temperature compensation for 2.4ghz mode when doing OLC * Implement an AR9280 specific TX power calibration routine which includes the OLC twiddles, leaving the earlier chipset path (AR5416, AR9160) alone Whilst here, use these refactored routines for the AR9285 TX power calibration/programming code and enforce correct overflow/underflow handling when fiddling with TX power values. Obtained from: linux ath9k 219393 Tue Mar 08 05:10:35 MST 2011 adrian Implement open-loop TX power control (OLC) for Merlin (AR9280) and generally tidy up the TX power programming code. Enforce that the TX power offset for Merlin is -5 dBm, rather than any other value programmable in the EEPROM. This requires some further code to be ported over from ath9k, so until that is done and tested, fail to attach NICs whose TX power offset isn't -5 dBm. This improves both legacy and HT transmission on my merlin board. It allows for stable MCS TX up to MCS15. Specifics: * Refactor out a bunch of the TX power calibration code - setting/obtaining the power detector / gain boundaries, programming the PDADC * Take the -5 dBm TX power offset into account on Merlin - "0" in the per-rate TX power register means -5 dBm, not 0 dBm * When doing OLC * Enforce min (0) and max (AR5416_MAX_RATE_POWER) when fiddling with the TX power, to avoid the TX power values from wrapping when low. * Implement the 1 dBm cck power offset when doing OLC * Implement temperature compensation for 2.4ghz mode when doing OLC * Implement an AR9280 specific TX power calibration routine which includes the OLC twiddles, leaving the earlier chipset path (AR5416, AR9160) alone Whilst here, use these refactored routines for the AR9285 TX power calibration/programming code and enforce correct overflow/underflow handling when fiddling with TX power values. Obtained from: linux ath9k 219393 Tue Mar 08 05:10:35 MST 2011 adrian Implement open-loop TX power control (OLC) for Merlin (AR9280) and generally tidy up the TX power programming code. Enforce that the TX power offset for Merlin is -5 dBm, rather than any other value programmable in the EEPROM. This requires some further code to be ported over from ath9k, so until that is done and tested, fail to attach NICs whose TX power offset isn't -5 dBm. This improves both legacy and HT transmission on my merlin board. It allows for stable MCS TX up to MCS15. Specifics: * Refactor out a bunch of the TX power calibration code - setting/obtaining the power detector / gain boundaries, programming the PDADC * Take the -5 dBm TX power offset into account on Merlin - "0" in the per-rate TX power register means -5 dBm, not 0 dBm * When doing OLC * Enforce min (0) and max (AR5416_MAX_RATE_POWER) when fiddling with the TX power, to avoid the TX power values from wrapping when low. * Implement the 1 dBm cck power offset when doing OLC * Implement temperature compensation for 2.4ghz mode when doing OLC * Implement an AR9280 specific TX power calibration routine which includes the OLC twiddles, leaving the earlier chipset path (AR5416, AR9160) alone Whilst here, use these refactored routines for the AR9285 TX power calibration/programming code and enforce correct overflow/underflow handling when fiddling with TX power values. Obtained from: linux ath9k |
| /freebsd-10.0-release/sys/dev/ips/ | ||
| H A D | ips_ioctl.h | 114902 Sun May 11 04:36:49 MDT 2003 scottl Add the 'ips' driver for the IBM (now Adaptec) ServeRAID controller series. This driver was generously developed and released by David Jeffreys and Adaptec. I've updated it to work with 5.x and fixed a few bugs. MFC After: 1 week |
| /freebsd-10.0-release/sys/dev/mii/ | ||
| H A D | smscphy.c | 239275 Wed Aug 15 02:08:24 MDT 2012 gonzo Merging of projects/armv6, part 5 - Driver for SMSC LAN95XX and LAN8710A ethernet controllers - Driver for LAN8710A PHY Submitted by: Ben Gray, Damjan Marion, Tim Kientzle |
| /freebsd-10.0-release/sys/dev/usb/net/ | ||
| H A D | if_smscreg.h | 239275 Wed Aug 15 02:08:24 MDT 2012 gonzo Merging of projects/armv6, part 5 - Driver for SMSC LAN95XX and LAN8710A ethernet controllers - Driver for LAN8710A PHY Submitted by: Ben Gray, Damjan Marion, Tim Kientzle |
| /freebsd-10.0-release/sys/modules/3dfx_linux/ | ||
| H A D | Makefile | 156260 Fri Mar 03 19:37:38 MST 2006 yar Take the functionality contained in the former "options TDFX_LINUX" into a separate module. Accordingly, convert the option into a device named similarly. Note for MFC: Perhaps the option should stay in RELENG_6 for POLA reasons. Suggested by: scottl Reviewed by: cokane MFC after: 5 days |
| /freebsd-10.0-release/sys/modules/ips/ | ||
| H A D | Makefile | 114902 Sun May 11 04:36:49 MDT 2003 scottl Add the 'ips' driver for the IBM (now Adaptec) ServeRAID controller series. This driver was generously developed and released by David Jeffreys and Adaptec. I've updated it to work with 5.x and fixed a few bugs. MFC After: 1 week |
| /freebsd-10.0-release/sys/modules/netgraph/split/ | ||
| H A D | Makefile | 72909 Thu Feb 22 15:14:36 MST 2001 julian Add a 'splitter' node to separate a bidirectional packet flow into two unidirectional flows. Part of a suite of nodes developed for packet flow control. More to follow as I have time to port them to 5.x or as others do so. The ipfw node will be the hardest.. Submitted by: "Vitaly V. Belekhov" <vitaly@riss-telecom.ru> |
| /freebsd-10.0-release/sys/modules/sound/driver/envy24ht/ | ||
| H A D | Makefile | diff 162892 Sat Sep 30 16:12:33 MDT 2006 netchild Respect style.Makefile(5). Cluebat waving by: ru |
| /freebsd-10.0-release/sys/modules/sound/driver/spicds/ | ||
| H A D | Makefile | diff 162892 Sat Sep 30 16:12:33 MDT 2006 netchild Respect style.Makefile(5). Cluebat waving by: ru |
| /freebsd-10.0-release/sys/modules/usb/smsc/ | ||
| H A D | Makefile | 239275 Wed Aug 15 02:08:24 MDT 2012 gonzo Merging of projects/armv6, part 5 - Driver for SMSC LAN95XX and LAN8710A ethernet controllers - Driver for LAN8710A PHY Submitted by: Ben Gray, Damjan Marion, Tim Kientzle |
| /freebsd-10.0-release/sys/sys/ | ||
| H A D | param.h | diff 259067 Sat Dec 07 11:03:27 MST 2013 gjb When stable/10 was branched from head/, __FreeBSD_version was bumped to 1000500 from 1000055 when it should not have been bumped yet. At the risk of having non-standard '5XX' __FreeBSD_version suffix in a -RELEASE, bump __FreeBSD_version in releng/10.0 from 1000100 to 1000510 to prevent the value from going backwards as part of the stable/10 -> releng/10.0 branch. A commit to bump __FreeBSD_version in stable/10 will follow. Approved by: re (implicit) Sponsored by: The FreeBSD Foundation diff 259067 Sat Dec 07 11:03:27 MST 2013 gjb When stable/10 was branched from head/, __FreeBSD_version was bumped to 1000500 from 1000055 when it should not have been bumped yet. At the risk of having non-standard '5XX' __FreeBSD_version suffix in a -RELEASE, bump __FreeBSD_version in releng/10.0 from 1000100 to 1000510 to prevent the value from going backwards as part of the stable/10 -> releng/10.0 branch. A commit to bump __FreeBSD_version in stable/10 will follow. Approved by: re (implicit) Sponsored by: The FreeBSD Foundation |
| /freebsd-10.0-release/tools/build/options/ | ||
| H A D | WITHOUT_CAPSICUM | 229319 Mon Jan 02 20:13:12 MST 2012 rwatson Add WITHOUT_CAPSICUM src.conf(5) define, which can be used to compile out use of Capsicum by userspace applications. MFC after: 3 weeks Sponsored by: Google, Inc. |
| H A D | WITHOUT_CLANG_FULL | 246259 Sat Feb 02 20:38:41 MST 2013 dim Pull in r170135 from upstream clang trunk: Dont use/link ARCMT, StaticAnalyzer and Rewriter to clang when the user specifies not to. Dont build ASTMatchers with Rewriter disabled and StaticAnalyzer when it's disabled. Without all those three, the clang binary shrinks (x86_64) from ~36MB to ~32MB (unstripped). To disable these clang components, and get a smaller clang binary built and installed, set WITHOUT_CLANG_FULL in src.conf(5). During the initial stages of buildworld, those extra components are already disabled automatically, to save some build time. MFC after: 1 week |
| H A D | WITHOUT_GNU | 160851 Mon Jul 31 11:08:47 MDT 2006 yar Document some more src.conf(5) options: WITHOUT_GNU, WITHOUT_NS_CACHING, WITHOUT_PAM. Noticed by: src/tools/build/options/makeman |
| H A D | WITHOUT_GROFF | 156932 Tue Mar 21 05:50:50 MST 2006 ru Prepare to autogenerate the src.conf(5) manpage. |
| H A D | WITHOUT_GSSAPI | 174548 Wed Dec 12 14:39:32 MST 2007 ru - Fix setting of MK_GSSAPI option by bsd.own.mk; its value should default to the value of MK_KERBEROS unless set explicitly by WITH_GSSAPI/WITHOUT_GSSAPI. (This introduces another type of MK_* variables which itself is questionable.) - Teach tools/build/options/makeman script that generates the src.conf(5) manpage about the new type of MK_* variables. - Fix broken logic in lib/Makefile. |
| H A D | WITHOUT_KERBEROS_SUPPORT | 156932 Tue Mar 21 05:50:50 MST 2006 ru Prepare to autogenerate the src.conf(5) manpage. |
| H A D | WITHOUT_NS_CACHING | 160851 Mon Jul 31 11:08:47 MDT 2006 yar Document some more src.conf(5) options: WITHOUT_GNU, WITHOUT_NS_CACHING, WITHOUT_PAM. Noticed by: src/tools/build/options/makeman |
| H A D | WITHOUT_PAM | 160851 Mon Jul 31 11:08:47 MDT 2006 yar Document some more src.conf(5) options: WITHOUT_GNU, WITHOUT_NS_CACHING, WITHOUT_PAM. Noticed by: src/tools/build/options/makeman |
| H A D | WITHOUT_PROFILE | 156932 Tue Mar 21 05:50:50 MST 2006 ru Prepare to autogenerate the src.conf(5) manpage. |
| H A D | WITHOUT_TOOLCHAIN | 156932 Tue Mar 21 05:50:50 MST 2006 ru Prepare to autogenerate the src.conf(5) manpage. |
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