Searched hist:285090 (Results 1 - 3 of 3) sorted by relevance
| /freebsd-11-stable/sys/arm/allwinner/ | ||
| H A D | a10_ahci.c | 285090 Fri Jul 03 12:18:04 MDT 2015 loos Add AHCI attachment code for Allwinner A10/A20 SoCs. The Allwinner SoC has an AHCI device on its internal main bus rather than the PCI bus. This SoC is somewhat underdocumented, and its SATA controller is no exception. The methods to support this chip were harvested from the Linux Allwinner SDK, and then constants invented to describe what's going on based on low-level constants contained in the SATA standard and guess work. This SoC requires a specific AHCI channel setup in order to start the operations on the channel properly. Clock setup and AHCI channel setup idea came from NetBSD. Tested on Cubieboard 2 and Banana pi (and attachment on Cubieboard by Pratik Singhal). Differential Revision: https://reviews.freebsd.org/D737 Submitted by: imp Reviewed by: imp, ganbold, mav, andrew |
| H A D | files.allwinner | diff 285090 Fri Jul 03 12:18:04 MDT 2015 loos Add AHCI attachment code for Allwinner A10/A20 SoCs. The Allwinner SoC has an AHCI device on its internal main bus rather than the PCI bus. This SoC is somewhat underdocumented, and its SATA controller is no exception. The methods to support this chip were harvested from the Linux Allwinner SDK, and then constants invented to describe what's going on based on low-level constants contained in the SATA standard and guess work. This SoC requires a specific AHCI channel setup in order to start the operations on the channel properly. Clock setup and AHCI channel setup idea came from NetBSD. Tested on Cubieboard 2 and Banana pi (and attachment on Cubieboard by Pratik Singhal). Differential Revision: https://reviews.freebsd.org/D737 Submitted by: imp Reviewed by: imp, ganbold, mav, andrew |
| /freebsd-11-stable/sys/dev/ahci/ | ||
| H A D | ahci.h | diff 285090 Fri Jul 03 12:18:04 MDT 2015 loos Add AHCI attachment code for Allwinner A10/A20 SoCs. The Allwinner SoC has an AHCI device on its internal main bus rather than the PCI bus. This SoC is somewhat underdocumented, and its SATA controller is no exception. The methods to support this chip were harvested from the Linux Allwinner SDK, and then constants invented to describe what's going on based on low-level constants contained in the SATA standard and guess work. This SoC requires a specific AHCI channel setup in order to start the operations on the channel properly. Clock setup and AHCI channel setup idea came from NetBSD. Tested on Cubieboard 2 and Banana pi (and attachment on Cubieboard by Pratik Singhal). Differential Revision: https://reviews.freebsd.org/D737 Submitted by: imp Reviewed by: imp, ganbold, mav, andrew |
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