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350793 |
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08-Aug-2019 |
mav |
MFC r349321: Improve AHCI Enclosure Management and SES interoperation.
Since SES specs do not define mechanism to map enclosure slots to SATA disks, AHCI EM code I written many years ago appeared quite useless, that always bugged me. I was thinking whether it was a good idea, but if LSI HBAs do that, why I shouldn't?
This change introduces simple non-standard mechanism for the mapping into both AHCI EM and SES code, that makes AHCI EM on capable controllers (most of Intel's) a first-class SES citizen, allowing it to report disk physical path to GEOM, show devices inserted into each enclosure slot in `sesutil map` and `getencstat`, control locate and fault LEDs for specific devices with `sesutil locate adaX on` and `sesutil fault adaX on`, etc.
I've successfully tested this on Supermicro X10DRH-i motherboard connected with sideband cable of its S-SATA Mini-SAS connector to SAS815TQ backplane. It can indicate with LEDs Locate, Fault and Rebuild/Remap SES statuses for each disk identical to real SES of Supermicro SAS2 backplanes.
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350792 |
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08-Aug-2019 |
mav |
MFC r340092 (by imp): Implement ability to turn on/off PHYs for AHCI devices.
As part of Chuck's work on fixing kernel crashes caused by disk I/O errors, it is useful to be able to trigger various kinds of errors. This patch allows causing an AHCI-attached disk to disappear, by having the driver keep the PHY disabled when the driver would otherwise enable the PHY. It also allows making the disk reappear by having the driver go back to setting the PHY enable/disable state as it normal would and simulating the hardware event that causes a bus rescan.
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331722 |
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29-Mar-2018 |
eadler |
Revert r330897:
This was intended to be a non-functional change. It wasn't. The commit message was thus wrong. In addition it broke arm, and merged crypto related code.
Revert with prejudice.
This revert skips files touched in r316370 since that commit was since MFCed. This revert also skips files that require $FreeBSD$ property changes.
Thank you to those who helped me get out of this mess including but not limited to gonzo, kevans, rgrimes.
Requested by: gjb (re)
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331493 |
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24-Mar-2018 |
ian |
MFC r324186:
Define a single instance of ahci_devclass and reference it from all the attachment code for various SOCs and busses. Remove all the static and should-have-been-static and named-differently instances of it.
This should eliminate the recently-grown build warnings about multiple definitions when building arm kernels.
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330897 |
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14-Mar-2018 |
eadler |
Partial merge of the SPDX changes
These changes are incomplete but are making it difficult to determine what other changes can/should be merged.
No objections from: pfg
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317673 |
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02-May-2017 |
mav |
MFC r317080: Block FPDMA TRIM for ASMedia HBAs.
Experiments show FPDMA TRIM command timeouts on ASMedia HBAs, while the same SSDs working fine on Intel HBAs.
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313445 |
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08-Feb-2017 |
mav |
MFC r312767: Partially workaround ASMedia HBA error recovery.
Taking closer look on my ASM1062 I found that it has bunch of issues around error recovery: reported wrong CCS, failed commands reported as completed, READ LOG EXT times out after NCQ error. This patch workarounds first two problems, that were making ATAPI devices close to unusable on these HBAs.
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302408 |
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07-Jul-2016 |
gjb |
Copy head@r302406 to stable/11 as part of the 11.0-RELEASE cycle. Prune svn:mergeinfo from the new branch, as nothing has been merged here.
Additional commits post-branch will follow.
Approved by: re (implicit) Sponsored by: The FreeBSD Foundation |
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302402 |
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07-Jul-2016 |
mav |
Fix ahci(4) driver attach to controller with 32 ports.
Incorrect sign expansion in variables that supposed to be a bit fields caused infinite loop. Fixing this allows system properly detect maximal possible 32 devices configured on AHCI HBA of BHyVe. That case did not happen in a wild before due to lack of hardware AHCI HBAs with 32 ports.
Approved by: re (gjb@) MFC after: 1 week
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298955 |
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03-May-2016 |
pfg |
sys/dev: minor spelling fixes.
Most affect comments, very few have user-visible effects.
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297447 |
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31-Mar-2016 |
zbb |
Disable MSI-x for AHCI on Alpine plattform
Changes introduced to AHCI code adding support for MSI-x caused interrupt storm on Alpine boards. This is unintended behaviour so added quirk to omit this functionality.
Reviewed by: mav Submitted by: Marcin Mazurek <mma@semihalf.com> Obtained from: Semihalf Sponsored by: Annapurna Labs Differential Revision: https://reviews.freebsd.org/D4301
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294883 |
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27-Jan-2016 |
jhibbits |
Convert rman to use rman_res_t instead of u_long
Summary: Migrate to using the semi-opaque type rman_res_t to specify rman resources. For now, this is still compatible with u_long.
This is step one in migrating rman to use uintmax_t for resources instead of u_long.
Going forward, this could feasibly be used to specify architecture-specific definitions of resource ranges, rather than baking a specific integer type into the API.
This change has been broken out to facilitate MFC'ing drivers back to 10 without breaking ABI.
Reviewed By: jhb Sponsored by: Alex Perez/Inertial Computing Differential Revision: https://reviews.freebsd.org/D5075
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291444 |
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29-Nov-2015 |
mmel |
AHCI: Fix AHCI driver for ARM. On ARM, we must ensure proper interdevice write ordering. The AHCI interrupt status register must be updated in HW before registers in interrupt controller. Unfortunately, only way how we can do it is readback.
Discussed with: mav Approved by: kib (mentor) Differential Revision: https://reviews.freebsd.org/D4240
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285789 |
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22-Jul-2015 |
zbb |
Introduce support for MSI-X interrupts in AHCI
- Allocate resources for MSI-X table and PBA if necessary - Add function ahci_free_mem() to free all resources
Reviewed by: jhb, mav Obtained from: Semihalf Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D3009
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285200 |
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06-Jul-2015 |
smh |
Correct bit offsets for ahci quirks
Fix bit offsets causing incorrect quirks being reported on boot for ahci introduced by r280184.
MFC after: 3 days Sponsored by: Multiplay
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285090 |
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03-Jul-2015 |
loos |
Add AHCI attachment code for Allwinner A10/A20 SoCs.
The Allwinner SoC has an AHCI device on its internal main bus rather than the PCI bus. This SoC is somewhat underdocumented, and its SATA controller is no exception. The methods to support this chip were harvested from the Linux Allwinner SDK, and then constants invented to describe what's going on based on low-level constants contained in the SATA standard and guess work.
This SoC requires a specific AHCI channel setup in order to start the operations on the channel properly.
Clock setup and AHCI channel setup idea came from NetBSD.
Tested on Cubieboard 2 and Banana pi (and attachment on Cubieboard by Pratik Singhal).
Differential Revision: https://reviews.freebsd.org/D737 Submitted by: imp Reviewed by: imp, ganbold, mav, andrew
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283936 |
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02-Jun-2015 |
mav |
Restore AHCI quirks printing as base16.
smh@ at r278034 made it base17, that is somewhat odd. :)
MFC after: 3 days
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280184 |
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17-Mar-2015 |
zbb |
Introduce Annapurna Labs AHCI support
Overview: * implemented quirk for forcing SATA interface enable * restore value to status register - this enables link autonegotiation
Modifications: * devid:vendorid field * quirk for forcing PI setting (BIOS is doing that on PC-like systems) * write to capabilites field to enable phy link initialization
Submitted by: Wojciech Macek <wma@semihalf.com> Reviewed by: imp, mav Obtained from: Semihalf
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279963 |
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13-Mar-2015 |
mav |
Fix SATA Gen3 speed constants.
MFC after: 1 week
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278034 |
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01-Feb-2015 |
smh |
Add a quirk to limit AHCI MSI vectors to one
In 10.1-RELEASE the default number of MSI vectors used was changed from one to as many vectors as the HW supports.
This change resulted in an ahci timeouts regression when running on AMD SB7x0/SB8x0/SB9x0 hardware, so its now limited to 1 MSI by default using this new quirk.
MFC after: 2 weeks Sponsored by: Multiplay
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277126 |
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13-Jan-2015 |
kib |
Complete r277100: add AHCI_Q_ABAR0 tp AHCI_Q_BIT_STRING.
Noted and reviewed by: smh MFC after: 6 days
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277100 |
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12-Jan-2015 |
kib |
Add quirk to override default BAR(5) rid for AHCI. Use it for Cavium AHCI.
Submitted by: Michaе┌ Stanek Reviewed by: imp (previous version) MFC after: 1 week
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276012 |
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21-Dec-2014 |
smh |
Add a constant AHCI_MAX_IRQS removing magic number
Sponsored by: Multiplay
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271261 |
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08-Sep-2014 |
mav |
Bunch of microoptimizations to reduce dereferences and cache collisions.
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271146 |
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04-Sep-2014 |
imp |
Separate out PCI attachment from the main AHCI driver. Move checks of PCI IDs into quirks, which mostly fit (though you'd get no argument from me that AHCI_Q_SATA1_UNIT0 is oddly specific). Set these quirks in the PCI attachment. Make some shared functions public so that PCI and possibly other bus attachments can use them.
The split isn't perfect yet, but it is functional. The split will be perfected as other bus attachments for AHCI are written.
Sponsored by: Netflix Reviewed by: kan, mav Differential Revision: https://reviews.freebsd.org/D699
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258780 |
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30-Nov-2013 |
eadler |
Fix undefined behavior: (1 << 31) is not defined as 1 is an int and this shifts into the sign bit. Instead use (1U << 31) which gets the expected result.
This fix is not ideal as it assumes a 32 bit int, but does fix the issue for most cases.
A similar change was made in OpenBSD.
Discussed with: -arch, rdivacky Reviewed by: cperciva
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258173 |
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15-Nov-2013 |
mav |
Add few more minor parts of DevSleep support from AHCI 1.3.1 proposal.
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256843 |
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21-Oct-2013 |
mav |
Merge CAM locking changes from the projects/camlock branch to radically reduce lock congestion and improve SMP scalability of the SCSI/ATA stack, preparing the ground for the coming next GEOM direct dispatch support.
Replace big per-SIM locks with bunch of smaller ones: - per-LUN locks to protect device and peripheral drivers state; - per-target locks to protect list of LUNs on target; - per-bus locks to protect reference counting; - per-send queue locks to protect queue of CCBs to be sent; - per-done queue locks to protect queue of completed CCBs; - remaining per-SIM locks now protect only HBA driver internals.
While holding LUN lock it is allowed (while not recommended for performance reasons) to take SIM lock. The opposite acquisition order is forbidden. All the other locks are leaf locks, that can be taken anywhere, but should not be cascaded. Many functions, such as: xpt_action(), xpt_done(), xpt_async(), xpt_create_path(), etc. are no longer require (but allow) SIM lock to be held.
To keep compatibility and solve cases where SIM lock can't be dropped, all xpt_async() calls in addition to xpt_done() calls are queued to completion threads for async processing in clean environment without SIM lock held.
Instead of single CAM SWI thread, used for commands completion processing before, use multiple (depending on number of CPUs) threads. Load balanced between them using "hash" of the device B:T:L address.
HBA drivers that can drop SIM lock during completion processing and have sufficient number of completion threads to efficiently scale to multiple CPUs can use new function xpt_done_direct() to avoid extra context switch. Make ahci(4) driver to use this mechanism depending on hardware setup.
Sponsored by: iXsystems, Inc. MFC after: 2 months
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253647 |
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25-Jul-2013 |
mav |
Decode some bits defined in AHCI 1.3.1 Device Sleep Technical Proposal. For now this is only conmetics to report HBA capabilities (Haswell?).
Submitted by: Dmitry Luhtionov <dmitryluhtionov@gmail.com>
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249346 |
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10-Apr-2013 |
mav |
Create controller-level DMA tag, handling range of supported addresses. That simplifies logic for channels and gives the bus information about what device actually allocated the tag.
Submitted by: jhb@
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238805 |
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26-Jul-2012 |
mav |
Refactor enclosure manegement support in ahci(4). Move it out into separate subdevice ahciem. Emulate SEMB SES device from AHCI LED interface to expose it to users in form of ses(4) CAM device. If we ever see AHCI controllers supporting SES of SAF-TE over I2C as described by specification, they should fit well into this new picture.
Sponsored by: iXsystems, Inc.
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230132 |
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15-Jan-2012 |
uqs |
Convert files to UTF-8
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224498 |
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29-Jul-2011 |
mav |
In some cases, at least on Marvell 88SE912x controllers, Current Command Slot field of the PxCMD register may point to an empty command slot. That breaks command timeout detection logic, making impossible to find what command actually caused timeout, and leading to infinite wait. Workaround that by checking whether pointed command slot is really used and can timeout in its time. And if not, fallback to the dumb algorithm used with FBS -- let all commands to time out and then fail all of them.
Approved by: re (kib) MFC after: 1 week
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222039 |
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17-May-2011 |
mav |
Add support for "LED" enclosure management messages, defined by the AHCI.
When supported by hardware, this allows to control per-port activity, locate and fault LEDs via the led(4) API for localization and status reporting purposes. Supporting AHCI controllers may transmit that information to the backplane controllers via SGPIO interface. Backplane controllers interpret received statuses in some way (IBPI standard) to report them using present indicators.
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220830 |
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19-Apr-2011 |
mav |
Fix some English grammar.
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220789 |
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18-Apr-2011 |
mav |
Handle ready timeout during polled operation same as done in mvs(4) before.
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220657 |
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15-Apr-2011 |
mav |
Some changes around hot-plug and interface power-management: - use ATA_SE_EXCHANGED (SError.DIAG.X) bit to detect hot-plug events when power-management enabled and ATA_SE_PHY_CHANGED (SError.DIAG.N) can't be trusted; - on controllers supporting staggered spin-up (SS) put unused channels into Listen state instead of Off. It should still save some power, but allow plug-in events to be detected; - on controllers supporting cold presence detection (CPD), when power management enabled, use CPD events to detect hot-plug in addition to PHY events.
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220576 |
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12-Apr-2011 |
mav |
Refactor hard-reset implementation in ahci(4).
Instead of spinning in a tight loop for up to 15 seconds, polling for device readiness while it spins up, return reset completion just after PHY reports "connect well" or 100ms connection timeout. If device was found, use callout for checking device readiness with 100ms period up to full 31 second timeout.
This fixes system freeze for 5-10 seconds on drives hot plug-in.
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220565 |
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12-Apr-2011 |
mav |
Implement automatic SCSI sense fetching for ahci(4).
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207499 |
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02-May-2010 |
mav |
Make SATA XPT negotiate and enable some additional SATA features, such as: - device initiated power management (some devices support only this way); - Automatic Partial to Slumber Transition (more power saving); - DMA auto-activation (expected to slightly improve performance). More features could be added later, when hardware supports.
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203873 |
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14-Feb-2010 |
mav |
MFp4: With FBS enabled, we have no idea what command caused timeout. Implement same logic as in siis(4) - wait for other commands complete or timeout and then give some more time.
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203376 |
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02-Feb-2010 |
mav |
- Give ATA/SATA SIMs info about ATAPI packet size, supported by device. - Make ATA XPT to reject longer SCSI CDBs then supported by device, or any SCSI CDBs, if device doesn't support ATAPI.
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203123 |
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28-Jan-2010 |
mav |
Add FIS-based switching support. If controller supports FBS, it allows several devices beyond Port Multiplier to work simultaneously, substantially increasing performance.
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203108 |
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28-Jan-2010 |
mav |
MFp4: Large set of CAM inprovements.
- Unify bus reset/probe sequence. Whenever bus attached at boot or later, CAM will automatically reset and scan it. It allows to remove duplicate code from many drivers. - Any bus, attached before CAM completed it's boot-time initialization, will equally join to the process, delaying boot if needed. - New kern.cam.boot_delay loader tunable should help controllers that are still unable to register their buses in time (such as slow USB/ PCCard/ CardBus devices), by adding one more event to wait on boot. - To allow synchronization between different CAM levels, concept of requests priorities was extended. Priorities now split between several "run levels". Device can be freezed at specified level, allowing higher priority requests to pass. For example, no payload requests allowed, until PMP driver enable port. ATA XPT negotiate transfer parameters, periph driver configure caching and so on. - Frozen requests are no more counted by request allocation scheduler. It fixes deadlocks, when frozen low priority payload requests occupying slots, required by higher levels to manage theit execution. - Two last changes were holding proper ATA reinitialization and error recovery implementation. Now it is done: SATA controllers and Port Multipliers now implement automatic hot-plug and should correctly recover from timeouts and bus resets. - Improve SCSI error recovery for devices on buses without automatic sense reporting, such as ATAPI or USB. For example, it allows CAM to wait, while CD drive loads disk, instead of immediately return error status. - Decapitalize diagnostic messages and make them more readable and sensible. - Teach PMP driver to limit maximum speed on fan-out ports. - Make boot wait for PMP scan completes, and make rescan more reliable. - Fix pass driver, to return CCB to user level in case of error. - Increase number of retries in cd driver, as device may return several UAs.
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199821 |
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26-Nov-2009 |
mav |
MFp4: Improve ATA mode/SATA revision control.
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199747 |
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24-Nov-2009 |
mav |
MFp4: - Extend XPT-SIM transfer settings control API. Now it allows to report to SATA SIM number of tags supported by each device, implement ATA mode and SATA revision negotiation for both SATA and PATA SIMs. - Make ahci(4) and siis(4) to use submitted maximum tag number, when scheduling requests. It allows to support NCQ on devices with lower tags count then controller supports. - Make PMP driver to report attached devices connection speeds. - Implement ATA mode negotiation between user settings, device and controller capabilities.
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199322 |
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16-Nov-2009 |
mav |
Change the way in which AHCI+PATA combined controllers, such as JMicron and Marvell handled. Instead of trying to attach two different drivers to single device, wrapping each call, make one of them (atajmicron, atamarvell) attach do device solely, but create child device for AHCI driver, passing it all required resources. It is quite easy, as none of resources are shared, except IRQ.
As result, it: - makes drivers operation more independent and straitforward, - allows to use new ahci(4) driver with such devices, adding support for new features, such as PMP and NCQ, same time keeping legacy PATA support, - will allow to just drop old ataahci driver, when it's time come.
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198851 |
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03-Nov-2009 |
mav |
MFp4: - Handle timeouts and fatal errors with port hard-reset. The rest of recovery will be done by XPT on receiving async event. More gracefull per-device soft-reset recovery can be implemented later. - Add workaround for ATI SB600/SB700 PMP probe related bug, to speedup boot.
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198319 |
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21-Oct-2009 |
mav |
MFp4: On error, freeze device queue, to allow periph driver to do proper recovery. Freeze SIM queue only in some cases, when it is needed to protect SIM.
Implement better command timeout detection logic for non-queued commands. This fixes false positives when command with short timeout waiting for the long one. For example, when hald tastes CD during burning process.
Read and clear SERR register on interrupt.
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196656 |
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30-Aug-2009 |
mav |
MFp4: - Add Command Completion Coalescing support. - Add SNTF support. - Add two more power management modes (4, 5), implemented on driver level. - Fix interface mode setting. - Reduce interface reset time. - Do not report meaningless protocol/transport versions. - Report CAP2 register content. - Some performance optimizations.
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195534 |
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10-Jul-2009 |
scottl |
Separate the parallel scsi knowledge out of the core of the XPT, and modularize it so that new transports can be created.
Add a transport for SATA
Add a periph+protocol layer for ATA
Add a driver for AHCI-compliant hardware.
Add a maxio field to CAM so that drivers can advertise their max I/O capability. Modify various drivers so that they are insulated from the value of MAXPHYS.
The new ATA/SATA code supports AHCI-compliant hardware, and will override the classic ATA driver if it is loaded as a module at boot time or compiled into the kernel. The stack now support NCQ (tagged queueing) for increased performance on modern SATA drives. It also supports port multipliers.
ATA drives are accessed via 'ada' device nodes. ATAPI drives are accessed via 'cd' device nodes. They can all be enumerated and manipulated via camcontrol, just like SCSI drives. SCSI commands are not translated to their ATA equivalents; ATA native commands are used throughout the entire stack, including camcontrol. See the camcontrol manpage for further details. Testing this code may require that you update your fstab, and possibly modify your BIOS to enable AHCI functionality, if available.
This code is very experimental at the moment. The userland ABI/API has changed, so applications will need to be recompiled. It may change further in the near future. The 'ada' device name may also change as more infrastructure is completed in this project. The goal is to eventually put all CAM busses and devices until newbus, allowing for interesting topology and management options.
Few functional changes will be seen with existing SCSI/SAS/FC drivers, though the userland ABI has still changed. In the future, transports specific modules for SAS and FC may appear in order to better support the topologies and capabilities of these technologies.
The modularization of CAM and the addition of the ATA/SATA modules is meant to break CAM out of the mold of being specific to SCSI, letting it grow to be a framework for arbitrary transports and protocols. It also allows drivers to be written to support discrete hardware without jeopardizing the stability of non-related hardware. While only an AHCI driver is provided now, a Silicon Image driver is also in the works. Drivers for ICH1-4, ICH5-6, PIIX, classic IDE, and any other hardware is possible and encouraged. Help with new transports is also encouraged.
Submitted by: scottl, mav Approved by: re
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