Searched hist:214946 (Results 1 - 5 of 5) sorted by relevance
| /freebsd-11.0-release/sys/arm/xscale/ixp425/ | ||
| H A D | avila_gpio.c | 214946 Sun Nov 07 20:45:07 MST 2010 thompsa Hook up the five gpio pins on the Avila board to the gpio framework. There are actually 16 I/O lines but the other ones are used for system devices and interrupts. The IXP4XX platform can set interrupts on these pins for high/low/rising/falling/transitional but this is not implemented yet. The Cambria has the same interface but as all the pins are assigned to system functions the gpio header is toggled via a PLD on the i2c bus and is not supported by this commit. |
| H A D | files.avila | diff 214946 Sun Nov 07 20:45:07 MST 2010 thompsa Hook up the five gpio pins on the Avila board to the gpio framework. There are actually 16 I/O lines but the other ones are used for system devices and interrupts. The IXP4XX platform can set interrupts on these pins for high/low/rising/falling/transitional but this is not implemented yet. The Cambria has the same interface but as all the pins are assigned to system functions the gpio header is toggled via a PLD on the i2c bus and is not supported by this commit. |
| H A D | ixp425reg.h | diff 214946 Sun Nov 07 20:45:07 MST 2010 thompsa Hook up the five gpio pins on the Avila board to the gpio framework. There are actually 16 I/O lines but the other ones are used for system devices and interrupts. The IXP4XX platform can set interrupts on these pins for high/low/rising/falling/transitional but this is not implemented yet. The Cambria has the same interface but as all the pins are assigned to system functions the gpio header is toggled via a PLD on the i2c bus and is not supported by this commit. |
| /freebsd-11.0-release/sys/arm/conf/ | ||
| H A D | AVILA.hints | diff 214946 Sun Nov 07 20:45:07 MST 2010 thompsa Hook up the five gpio pins on the Avila board to the gpio framework. There are actually 16 I/O lines but the other ones are used for system devices and interrupts. The IXP4XX platform can set interrupts on these pins for high/low/rising/falling/transitional but this is not implemented yet. The Cambria has the same interface but as all the pins are assigned to system functions the gpio header is toggled via a PLD on the i2c bus and is not supported by this commit. |
| H A D | AVILA | diff 214946 Sun Nov 07 20:45:07 MST 2010 thompsa Hook up the five gpio pins on the Avila board to the gpio framework. There are actually 16 I/O lines but the other ones are used for system devices and interrupts. The IXP4XX platform can set interrupts on these pins for high/low/rising/falling/transitional but this is not implemented yet. The Cambria has the same interface but as all the pins are assigned to system functions the gpio header is toggled via a PLD on the i2c bus and is not supported by this commit. |
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