Searched hist:125441 (Results 1 - 1 of 1) sorted by relevance
| /freebsd-11-stable/sys/powerpc/aim/ | ||
| H A D | trap_subr32.S | diff 125441 Wed Feb 04 11:10:25 MST 2004 grehan Major overhaul of common trap code - remove unused 601 and tlb exception code - remove interrupt-time PTE spill code. The pmap code will now take care of pinning kernel PTEs, and there are no longer issues about physical mapping of PTE data structures - All segment registers are switched on kernel entry/exit, allowing the kernel to have more virtual space and for user virtual space to extend to 4G. - The temporary register save area has been shifted from unused exception vector space to the per-cpu data area. This allows interrupts to be delivered to multiple CPUs - ISI traps no longer spill to BAT tables. It is assumed that all of kernel instruction memory is pinned. - shift from 'ldmw/stmw' instructions to individual register loads/stores when saving context. All PPC manuals indicate this should be much faster. - use '%r' for register names throughout. TODO: need to test if DSI traps were the result of kernel stack guard-page hits. Reworked from: NetBSD |
Completed in 62 milliseconds