Searched defs:regVGA_SRC_SPLIT_CNTL (Results 1 - 6 of 6) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_6_offset.h1771 #define regVGA_SRC_SPLIT_CNTL 0x033e macro
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H A Ddcn_3_1_4_offset.h2452 #define regVGA_SRC_SPLIT_CNTL 0x033e macro
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H A Ddcn_3_1_5_offset.h1318 #define regVGA_SRC_SPLIT_CNTL 0x033e macro
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H A Ddcn_3_2_0_offset.h1176 #define regVGA_SRC_SPLIT_CNTL 0x033e macro
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H A Ddcn_3_1_2_offset.h1555 #define regVGA_SRC_SPLIT_CNTL 0x033e macro
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H A Ddcn_3_2_1_offset.h1176 #define regVGA_SRC_SPLIT_CNTL 0x033e macro
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