Searched defs:regPWRSEQ0_DC_GPIO_PWRSEQ_MASK (Results 1 - 8 of 8) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dpcs/
H A Ddpcs_3_1_4_offset.h7154 #define regPWRSEQ0_DC_GPIO_PWRSEQ_MASK 0x2f12 macro
H A Ddpcs_4_2_0_offset.h72 #define regPWRSEQ0_DC_GPIO_PWRSEQ_MASK 0x2f12 macro
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H A Ddpcs_4_2_3_offset.h76 #define regPWRSEQ0_DC_GPIO_PWRSEQ_MASK 0x2f12 macro
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H A Ddpcs_4_2_2_offset.h59 #define regPWRSEQ0_DC_GPIO_PWRSEQ_MASK 0x2f12 macro
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/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_6_offset.h13003 #define regPWRSEQ0_DC_GPIO_PWRSEQ_MASK macro
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H A Ddcn_3_1_4_offset.h11520 #define regPWRSEQ0_DC_GPIO_PWRSEQ_MASK macro
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H A Ddcn_3_1_5_offset.h12272 #define regPWRSEQ0_DC_GPIO_PWRSEQ_MASK macro
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H A Ddcn_3_1_2_offset.h12407 #define regPWRSEQ0_DC_GPIO_PWRSEQ_MASK macro
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