Searched defs:regPHYPLLA_PIXCLK_RESYNC_CNTL (Results 1 - 6 of 6) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_6_offset.h443 #define regPHYPLLA_PIXCLK_RESYNC_CNTL 0x0040 macro
[all...]
H A Ddcn_3_1_4_offset.h1329 #define regPHYPLLA_PIXCLK_RESYNC_CNTL 0x0040 macro
[all...]
H A Ddcn_3_1_5_offset.h34 #define regPHYPLLA_PIXCLK_RESYNC_CNTL 0x0040 macro
[all...]
H A Ddcn_3_2_0_offset.h34 #define regPHYPLLA_PIXCLK_RESYNC_CNTL 0x0040 macro
[all...]
H A Ddcn_3_1_2_offset.h247 #define regPHYPLLA_PIXCLK_RESYNC_CNTL 0x0040 macro
[all...]
H A Ddcn_3_2_1_offset.h34 #define regPHYPLLA_PIXCLK_RESYNC_CNTL 0x0040 macro
[all...]

Completed in 1662 milliseconds