Searched defs:regOTG1_OTG_GSL_VSYNC_GAP (Results 1 - 6 of 6) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_6_offset.h9341 #define regOTG1_OTG_GSL_VSYNC_GAP 0x1c04 macro
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H A Ddcn_3_1_4_offset.h8172 #define regOTG1_OTG_GSL_VSYNC_GAP 0x1c03 macro
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H A Ddcn_3_1_5_offset.h8876 #define regOTG1_OTG_GSL_VSYNC_GAP 0x1c04 macro
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H A Ddcn_3_2_0_offset.h8247 #define regOTG1_OTG_GSL_VSYNC_GAP 0x1c03 macro
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H A Ddcn_3_1_2_offset.h9117 #define regOTG1_OTG_GSL_VSYNC_GAP 0x1c04 macro
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H A Ddcn_3_2_1_offset.h8246 #define regOTG1_OTG_GSL_VSYNC_GAP 0x1c03 macro
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