Searched defs:regOTG0_OTG_H_TIMING_CNTL (Results 1 - 6 of 6) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_6_offset.h8985 #define regOTG0_OTG_H_TIMING_CNTL 0x1b2e macro
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H A Ddcn_3_1_4_offset.h7820 #define regOTG0_OTG_H_TIMING_CNTL 0x1b2e macro
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H A Ddcn_3_1_5_offset.h8524 #define regOTG0_OTG_H_TIMING_CNTL 0x1b2e macro
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H A Ddcn_3_2_0_offset.h7895 #define regOTG0_OTG_H_TIMING_CNTL 0x1b2e macro
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H A Ddcn_3_1_2_offset.h8761 #define regOTG0_OTG_H_TIMING_CNTL 0x1b2e macro
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H A Ddcn_3_2_1_offset.h7894 #define regOTG0_OTG_H_TIMING_CNTL 0x1b2e macro
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