Searched defs:regMPCC1_MPCC_MEM_PWR_CTRL_BASE_IDX (Results 1 - 6 of 6) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_6_offset.h6730 #define regMPCC1_MPCC_MEM_PWR_CTRL_BASE_IDX 3 macro
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H A Ddcn_3_1_4_offset.h13275 #define regMPCC1_MPCC_MEM_PWR_CTRL_BASE_IDX macro
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H A Ddcn_3_1_5_offset.h6269 #define regMPCC1_MPCC_MEM_PWR_CTRL_BASE_IDX 3 macro
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H A Ddcn_3_2_0_offset.h4816 #define regMPCC1_MPCC_MEM_PWR_CTRL_BASE_IDX 3 macro
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H A Ddcn_3_1_2_offset.h6510 #define regMPCC1_MPCC_MEM_PWR_CTRL_BASE_IDX 3 macro
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H A Ddcn_3_2_1_offset.h4815 #define regMPCC1_MPCC_MEM_PWR_CTRL_BASE_IDX 3 macro
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