Searched defs:regDWB_OGAM_RAMB_START_SLOPE_CNTL_G (Results 1 - 6 of 6) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_6_offset.h1467 #define regDWB_OGAM_RAMB_START_SLOPE_CNTL_G 0x32d0 macro
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H A Ddcn_3_1_4_offset.h12300 #define regDWB_OGAM_RAMB_START_SLOPE_CNTL_G macro
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H A Ddcn_3_1_5_offset.h966 #define regDWB_OGAM_RAMB_START_SLOPE_CNTL_G 0x32d0 macro
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H A Ddcn_3_2_0_offset.h874 #define regDWB_OGAM_RAMB_START_SLOPE_CNTL_G 0x32d0 macro
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H A Ddcn_3_1_2_offset.h1263 #define regDWB_OGAM_RAMB_START_SLOPE_CNTL_G 0x32d0 macro
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H A Ddcn_3_2_1_offset.h874 #define regDWB_OGAM_RAMB_START_SLOPE_CNTL_G 0x32d0 macro
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