Searched defs:regDWB_OGAM_RAMA_START_CNTL_G (Results 1 - 6 of 6) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_6_offset.h1387 #define regDWB_OGAM_RAMA_START_CNTL_G 0x32a8 macro
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H A Ddcn_3_1_4_offset.h12220 #define regDWB_OGAM_RAMA_START_CNTL_G macro
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H A Ddcn_3_1_5_offset.h886 #define regDWB_OGAM_RAMA_START_CNTL_G 0x32a8 macro
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H A Ddcn_3_2_0_offset.h794 #define regDWB_OGAM_RAMA_START_CNTL_G 0x32a8 macro
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H A Ddcn_3_1_2_offset.h1183 #define regDWB_OGAM_RAMA_START_CNTL_G 0x32a8 macro
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H A Ddcn_3_2_1_offset.h794 #define regDWB_OGAM_RAMA_START_CNTL_G 0x32a8 macro
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