Searched defs:regDIG0_TMDS_STEREOSYNC_CTL_SEL (Results 1 - 6 of 6) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_6_offset.h10187 #define regDIG0_TMDS_STEREOSYNC_CTL_SEL 0x20da macro
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H A Ddcn_3_1_4_offset.h9272 #define regDIG0_TMDS_STEREOSYNC_CTL_SEL 0x20db macro
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H A Ddcn_3_1_5_offset.h9718 #define regDIG0_TMDS_STEREOSYNC_CTL_SEL 0x20da macro
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H A Ddcn_3_2_0_offset.h9077 #define regDIG0_TMDS_STEREOSYNC_CTL_SEL 0x20db macro
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H A Ddcn_3_1_2_offset.h9963 #define regDIG0_TMDS_STEREOSYNC_CTL_SEL 0x20da macro
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H A Ddcn_3_2_1_offset.h9076 #define regDIG0_TMDS_STEREOSYNC_CTL_SEL 0x20db macro
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