Searched defs:regCM1_CM_GAMCOR_RAMA_OFFSET_G_BASE_IDX (Results 1 - 6 of 6) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_6_offset.h4846 #define regCM1_CM_GAMCOR_RAMA_OFFSET_G_BASE_IDX 2 macro
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H A Ddcn_3_1_4_offset.h5539 #define regCM1_CM_GAMCOR_RAMA_OFFSET_G_BASE_IDX 2 macro
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H A Ddcn_3_1_5_offset.h4385 #define regCM1_CM_GAMCOR_RAMA_OFFSET_G_BASE_IDX 2 macro
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H A Ddcn_3_2_0_offset.h3846 #define regCM1_CM_GAMCOR_RAMA_OFFSET_G_BASE_IDX 2 macro
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H A Ddcn_3_1_2_offset.h4626 #define regCM1_CM_GAMCOR_RAMA_OFFSET_G_BASE_IDX 2 macro
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H A Ddcn_3_2_1_offset.h3845 #define regCM1_CM_GAMCOR_RAMA_OFFSET_G_BASE_IDX 2 macro
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