Searched defs:regCM0_CM_GAMCOR_RAMA_REGION_24_25 (Results 1 - 6 of 6) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_6_offset.h4181 #define regCM0_CM_GAMCOR_RAMA_REGION_24_25 0x0d5f macro
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H A Ddcn_3_1_4_offset.h4874 #define regCM0_CM_GAMCOR_RAMA_REGION_24_25 0x0d5f macro
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H A Ddcn_3_1_5_offset.h3720 #define regCM0_CM_GAMCOR_RAMA_REGION_24_25 0x0d5f macro
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H A Ddcn_3_2_0_offset.h3487 #define regCM0_CM_GAMCOR_RAMA_REGION_24_25 0x0d5f macro
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H A Ddcn_3_1_2_offset.h3961 #define regCM0_CM_GAMCOR_RAMA_REGION_24_25 0x0d5f macro
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H A Ddcn_3_2_1_offset.h3486 #define regCM0_CM_GAMCOR_RAMA_REGION_24_25 0x0d5f macro
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