Searched defs:regAZCONTROLLER0_RESPONSE_INTERRUPT_COUNT_BASE_IDX (Results 1 - 3 of 3) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_6_offset.h82 #define regAZCONTROLLER0_RESPONSE_INTERRUPT_COUNT_BASE_IDX 3 macro
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H A Ddcn_3_1_4_offset.h49 #define regAZCONTROLLER0_RESPONSE_INTERRUPT_COUNT_BASE_IDX 0 macro
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H A Ddcn_3_1_2_offset.h79 #define regAZCONTROLLER0_RESPONSE_INTERRUPT_COUNT_BASE_IDX 3 macro
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