Searched defs:mmDCCG_GTC_CNTL (Results 1 - 14 of 14) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h1141 #define mmDCCG_GTC_CNTL 0x0120 macro
H A Ddce_8_0_d.h1009 #define mmDCCG_GTC_CNTL 0x120 macro
H A Ddce_10_0_d.h1166 #define mmDCCG_GTC_CNTL 0x120 macro
H A Ddce_11_2_d.h1046 #define mmDCCG_GTC_CNTL 0x120 macro
H A Ddce_11_0_d.h975 #define mmDCCG_GTC_CNTL 0x120 macro
H A Ddce_12_0_offset.h708 #define mmDCCG_GTC_CNTL 0x0060 macro
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/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h54 #define mmDCCG_GTC_CNTL 0x0060 macro
H A Ddcn_3_0_3_offset.h143 #define mmDCCG_GTC_CNTL 0x0060 macro
H A Ddcn_1_0_offset.h516 #define mmDCCG_GTC_CNTL 0x0060 macro
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H A Ddcn_2_0_0_offset.h170 #define mmDCCG_GTC_CNTL 0x0060 macro
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H A Ddcn_2_1_0_offset.h184 #define mmDCCG_GTC_CNTL 0x0060 macro
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H A Ddcn_3_0_1_offset.h230 #define mmDCCG_GTC_CNTL 0x0060 macro
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H A Ddcn_3_0_2_offset.h168 #define mmDCCG_GTC_CNTL 0x0060 macro
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H A Ddcn_3_0_0_offset.h152 #define mmDCCG_GTC_CNTL 0x0060 macro
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