| /linux-master/drivers/gpu/drm/amd/display/dc/dcn201/ |
| H A D | dcn201_dpp.c | 44 dpp201_cnv_setup( struct dpp *dpp_base, enum surface_pixel_format format, enum expansion_mode mode, struct dc_csc_transform input_csc_color_matrix, enum dc_color_space input_color_space, struct cnv_alpha_2bit_lut *alpha_2bit_lut) argument
|
| /linux-master/drivers/gpu/drm/amd/display/dc/dcn20/ |
| H A D | dcn20_dpp.c | 51 void dpp20_read_state(struct dpp *dpp_base, argument
77 dpp2_power_on_obuf( struct dpp *dpp_base, bool power_on) argument
92 dpp2_dummy_program_input_lut( struct dpp *dpp_base, const struct dc_gamma *gamma) argument
97 dpp2_cnv_setup( struct dpp *dpp_base, enum surface_pixel_format format, enum expansion_mode mode, struct dc_csc_transform input_csc_color_matrix, enum dc_color_space input_color_space, struct cnv_alpha_2bit_lut *alpha_2bit_lut) argument
316 dpp2_cnv_set_alpha_keyer( struct dpp *dpp_base, struct cnv_color_keyer_params *color_keyer) argument
339 dpp2_set_cursor_attributes( struct dpp *dpp_base, struct dc_cursor_attributes *cursor_attributes) argument
[all...] |
| H A D | dcn20_dpp_cm.c | 50 dpp2_enable_cm_block( struct dpp *dpp_base) argument
64 dpp2_degamma_ram_inuse( struct dpp *dpp_base, bool *ram_a_inuse) argument
85 dpp2_program_degamma_lut( struct dpp *dpp_base, const struct pwl_result_data *rgb, uint32_t num, bool is_ram_a) argument
116 dpp2_set_degamma_pwl( struct dpp *dpp_base, const struct pwl_params *params) argument
134 dpp2_set_degamma( struct dpp *dpp_base, enum ipp_degamma_mode mode) argument
213 dpp2_cm_set_gamut_remap( struct dpp *dpp_base, const struct dpp_grph_csc_adjustment *adjust) argument
273 dpp2_cm_get_gamut_remap(struct dpp *dpp_base, struct dpp_grph_csc_adjustment *adjust) argument
292 dpp2_program_input_csc( struct dpp *dpp_base, enum dc_color_space color_space, enum dcn20_input_csc_select input_select, const struct out_csc_color_matrix *tbl_entry) argument
365 dpp20_power_on_blnd_lut( struct dpp *dpp_base, bool power_on) argument
376 dpp20_configure_blnd_lut( struct dpp *dpp_base, bool is_ram_a) argument
389 dpp20_program_blnd_pwl( struct dpp *dpp_base, const struct pwl_result_data *rgb, uint32_t num) argument
441 dpp20_program_blnd_luta_settings( struct dpp *dpp_base, const struct pwl_params *params) argument
469 dpp20_program_blnd_lutb_settings( struct dpp *dpp_base, const struct pwl_params *params) argument
496 dpp20_get_blndgam_current(struct dpp *dpp_base) argument
522 dpp20_program_blnd_lut( struct dpp *dpp_base, const struct pwl_params *params) argument
557 dpp20_program_shaper_lut( struct dpp *dpp_base, const struct pwl_result_data *rgb, uint32_t num) argument
589 dpp20_get_shaper_current(struct dpp *dpp_base) argument
615 dpp20_configure_shaper_lut( struct dpp *dpp_base, bool is_ram_a) argument
630 dpp20_program_shaper_luta_settings( struct dpp *dpp_base, const struct pwl_params *params) argument
780 dpp20_program_shaper_lutb_settings( struct dpp *dpp_base, const struct pwl_params *params) argument
931 dpp20_program_shaper( struct dpp *dpp_base, const struct pwl_params *params) argument
967 get3dlut_config( struct dpp *dpp_base, bool *is_17x17x17, bool *is_12bits_color_channel) argument
1013 dpp20_set_3dlut_mode( struct dpp *dpp_base, enum dc_lut_mode mode, bool is_color_channel_12bits, bool is_lut_size17x17x17) argument
1034 dpp20_select_3dlut_ram( struct dpp *dpp_base, enum dc_lut_mode mode, bool is_color_channel_12bits) argument
1049 dpp20_set3dlut_ram12( struct dpp *dpp_base, const struct dc_rgb *lut, uint32_t entries) argument
1083 dpp20_set3dlut_ram10( struct dpp *dpp_base, const struct dc_rgb *lut, uint32_t entries) argument
1104 dpp20_select_3dlut_ram_mask( struct dpp *dpp_base, uint32_t ram_selection_mask) argument
1115 dpp20_program_3dlut( struct dpp *dpp_base, struct tetrahedral_params *params) argument
1195 dpp2_set_hdr_multiplier( struct dpp *dpp_base, uint32_t multiplier) argument
[all...] |
| /linux-master/drivers/gpu/drm/amd/display/dc/dcn30/ |
| H A D | dcn30_dpp_cm.c | 57 static enum dc_lut_mode dpp30_get_gamcor_current(struct dpp *dpp_base) argument
43 dpp3_enable_cm_block( struct dpp *dpp_base) argument
77 dpp3_program_gammcor_lut( struct dpp *dpp_base, const struct pwl_result_data *rgb, uint32_t num, bool is_ram_a) argument
126 dpp3_power_on_gamcor_lut( struct dpp *dpp_base, bool power_on) argument
145 dpp3_program_cm_dealpha( struct dpp *dpp_base, uint32_t enable, uint32_t additive_blending) argument
156 dpp3_program_cm_bias( struct dpp *dpp_base, struct CM_bias_params *bias_params) argument
201 dpp3_configure_gamcor_lut( struct dpp *dpp_base, bool is_ram_a) argument
215 dpp3_program_gamcor_lut( struct dpp *dpp_base, const struct pwl_params *params) argument
304 dpp3_set_hdr_multiplier( struct dpp *dpp_base, uint32_t multiplier) argument
373 dpp3_cm_set_gamut_remap( struct dpp *dpp_base, const struct dpp_grph_csc_adjustment *adjust) argument
444 dpp3_cm_get_gamut_remap(struct dpp *dpp_base, struct dpp_grph_csc_adjustment *adjust) argument
[all...] |
| H A D | dcn30_dpp.c | 44 void dpp30_read_state(struct dpp *dpp_base, struct dcn_dpp_state *s) argument
161 void dpp3_set_pre_degam(struct dpp *dpp_base, enum dc_transfer_func_predefined tr) argument
87 dpp3_program_post_csc( struct dpp *dpp_base, enum dc_color_space color_space, enum dcn10_input_csc_select input_select, const struct out_csc_color_matrix *tbl_entry) argument
203 dpp3_cnv_setup( struct dpp *dpp_base, enum surface_pixel_format format, enum expansion_mode mode, struct dc_csc_transform input_csc_color_matrix, enum dc_color_space input_color_space, struct cnv_alpha_2bit_lut *alpha_2bit_lut) argument
384 dpp3_set_cursor_attributes( struct dpp *dpp_base, struct dc_cursor_attributes *cursor_attributes) argument
519 dpp3_deferred_update(struct dpp *dpp_base) argument
566 dpp3_power_on_blnd_lut( struct dpp *dpp_base, bool power_on) argument
586 dpp3_power_on_hdr3dlut( struct dpp *dpp_base, bool power_on) argument
603 dpp3_power_on_shaper( struct dpp *dpp_base, bool power_on) argument
620 dpp3_configure_blnd_lut( struct dpp *dpp_base, bool is_ram_a) argument
633 dpp3_program_blnd_pwl( struct dpp *dpp_base, const struct pwl_result_data *rgb, uint32_t num) argument
697 dpp3_program_blnd_luta_settings( struct dpp *dpp_base, const struct pwl_params *params) argument
725 dpp3_program_blnd_lutb_settings( struct dpp *dpp_base, const struct pwl_params *params) argument
752 dpp3_get_blndgam_current(struct dpp *dpp_base) argument
783 dpp3_program_blnd_lut(struct dpp *dpp_base, const struct pwl_params *params) argument
822 dpp3_program_shaper_lut( struct dpp *dpp_base, const struct pwl_result_data *rgb, uint32_t num) argument
854 dpp3_get_shaper_current(struct dpp *dpp_base) argument
880 dpp3_configure_shaper_lut( struct dpp *dpp_base, bool is_ram_a) argument
895 dpp3_program_shaper_luta_settings( struct dpp *dpp_base, const struct pwl_params *params) argument
1045 dpp3_program_shaper_lutb_settings( struct dpp *dpp_base, const struct pwl_params *params) argument
1196 dpp3_program_shaper(struct dpp *dpp_base, const struct pwl_params *params) argument
1237 get3dlut_config( struct dpp *dpp_base, bool *is_17x17x17, bool *is_12bits_color_channel) argument
1284 dpp3_set_3dlut_mode( struct dpp *dpp_base, enum dc_lut_mode mode, bool is_color_channel_12bits, bool is_lut_size17x17x17) argument
1305 dpp3_select_3dlut_ram( struct dpp *dpp_base, enum dc_lut_mode mode, bool is_color_channel_12bits) argument
1320 dpp3_set3dlut_ram12( struct dpp *dpp_base, const struct dc_rgb *lut, uint32_t entries) argument
1354 dpp3_set3dlut_ram10( struct dpp *dpp_base, const struct dc_rgb *lut, uint32_t entries) argument
1375 dpp3_select_3dlut_ram_mask( struct dpp *dpp_base, uint32_t ram_selection_mask) argument
1386 dpp3_program_3dlut(struct dpp *dpp_base, struct tetrahedral_params *params) argument
[all...] |
| /linux-master/drivers/gpu/drm/amd/display/dc/dcn10/ |
| H A D | dcn10_dpp_dscl.c | 613 void dpp1_dscl_set_scaler_manual_scale(struct dpp *dpp_base, argument
123 dpp1_dscl_get_dscl_mode( struct dpp *dpp_base, const struct scaler_data *data, bool dbg_always_scale) argument
157 dpp1_power_on_dscl( struct dpp *dpp_base, bool power_on) argument
[all...] |
| H A D | dcn10_dpp_cm.c | 233 void dpp1_cm_get_gamut_remap(struct dpp *dpp_base, argument
386 void dpp1_cm_power_on_regamma_lut(struct dpp *dpp_base, argument
160 dpp1_cm_set_gamut_remap( struct dpp *dpp_base, const struct dpp_grph_csc_adjustment *adjust) argument
307 dpp1_cm_set_output_csc_default( struct dpp *dpp_base, enum dc_color_space colorspace) argument
377 dpp1_cm_set_output_csc_adjustment( struct dpp *dpp_base, const uint16_t *regval) argument
396 dpp1_cm_program_regamma_lut(struct dpp *dpp_base, const struct pwl_result_data *rgb, uint32_t num) argument
418 dpp1_cm_configure_regamma_lut( struct dpp *dpp_base, bool is_ram_a) argument
432 dpp1_cm_program_regamma_luta_settings( struct dpp *dpp_base, const struct pwl_params *params) argument
461 dpp1_cm_program_regamma_lutb_settings( struct dpp *dpp_base, const struct pwl_params *params) argument
488 dpp1_program_input_csc( struct dpp *dpp_base, enum dc_color_space color_space, enum dcn10_input_csc_select input_select, const struct out_csc_color_matrix *tbl_entry) argument
564 dpp1_program_bias_and_scale( struct dpp *dpp_base, struct dc_bias_and_scale *params) argument
585 dpp1_program_degamma_lutb_settings( struct dpp *dpp_base, const struct pwl_params *params) argument
614 dpp1_program_degamma_luta_settings( struct dpp *dpp_base, const struct pwl_params *params) argument
641 dpp1_power_on_degamma_lut( struct dpp *dpp_base, bool power_on) argument
652 dpp1_enable_cm_block( struct dpp *dpp_base) argument
661 dpp1_set_degamma( struct dpp *dpp_base, enum ipp_degamma_mode mode) argument
691 dpp1_degamma_ram_select( struct dpp *dpp_base, bool use_ram_a) argument
704 dpp1_degamma_ram_inuse( struct dpp *dpp_base, bool *ram_a_inuse) argument
725 dpp1_program_degamma_lut( struct dpp *dpp_base, const struct pwl_result_data *rgb, uint32_t num, bool is_ram_a) argument
755 dpp1_set_degamma_pwl(struct dpp *dpp_base, const struct pwl_params *params) argument
773 dpp1_full_bypass(struct dpp *dpp_base) argument
797 dpp1_ingamma_ram_inuse(struct dpp *dpp_base, bool *ram_a_inuse) argument
828 dpp1_program_input_lut( struct dpp *dpp_base, const struct dc_gamma *gamma) argument
877 dpp1_set_hdr_multiplier( struct dpp *dpp_base, uint32_t multiplier) argument
[all...] |
| H A D | dcn10_dpp.c | 94 void dpp_read_state(struct dpp *dpp_base, argument
188 void dpp_reset(struct dpp *dpp_base) argument
203 dpp1_cm_set_regamma_pwl( struct dpp *dpp_base, const struct pwl_params *params, enum opp_regamma mode) argument
259 dpp1_set_degamma_format_float( struct dpp *dpp_base, bool is_float) argument
274 dpp1_cnv_setup( struct dpp *dpp_base, enum surface_pixel_format format, enum expansion_mode mode, struct dc_csc_transform input_csc_color_matrix, enum dc_color_space input_color_space, struct cnv_alpha_2bit_lut *alpha_2bit_lut) argument
410 dpp1_set_cursor_attributes( struct dpp *dpp_base, struct dc_cursor_attributes *cursor_attributes) argument
431 dpp1_set_cursor_position( struct dpp *dpp_base, const struct dc_cursor_position *pos, const struct dc_cursor_mi_param *param, uint32_t width, uint32_t height) argument
489 dpp1_cnv_set_optional_cursor_attributes( struct dpp *dpp_base, struct dpp_cursor_attributes *attr) argument
501 dpp1_dppclk_control( struct dpp *dpp_base, bool dppclk_div, bool enable) argument
[all...] |
| /linux-master/drivers/gpu/drm/amd/display/dc/hwss/dcn30/ |
| H A D | dcn30_hwseq.c | 224 struct dpp *dpp_base = pipe_ctx->plane_res.dpp; local
245 struct dpp *dpp_base = pipe_ctx->plane_res.dpp; local
300 struct dpp *dpp_base = pipe_ctx->plane_res.dpp; local
[all...] |
| /linux-master/drivers/gpu/drm/amd/display/dc/hwss/dcn32/ |
| H A D | dcn32_hwseq.c | 438 struct dpp *dpp_base = pipe_ctx->plane_res.dpp; local
474 struct dpp *dpp_base = pipe_ctx->plane_res.dpp; local
523 struct dpp *dpp_base local
[all...] |
| /linux-master/drivers/gpu/drm/amd/display/dc/hwss/dcn20/ |
| H A D | dcn20_hwseq.c | 1051 struct dpp *dpp_base = pipe_ctx->plane_res.dpp; local
1073 struct dpp *dpp_base = pipe_ctx->plane_res.dpp; local
1104 struct dpp *dpp_base = pipe_ctx->plane_res.dpp; local
[all...] |
| /linux-master/drivers/gpu/drm/amd/display/dc/hwss/dcn10/ |
| H A D | dcn10_hwseq.c | 1809 struct dpp *dpp_base = pipe_ctx->plane_res.dpp; local
[all...] |