dc/dcn20/dcn20_dpp_cm.c

51 		struct dpp *dpp_base)
53 	struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);
57 	if (dpp_base->ctx->dc->debug.cm_in_bypass)
65 		struct dpp *dpp_base,
70 	struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);
86 		struct dpp *dpp_base,
93 	struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);
117 		struct dpp *dpp_base,
122 	dpp1_power_on_degamma_lut(dpp_base, true);
123 	dpp2_enable_cm_block(dpp_base);
124 	dpp2_degamma_ram_inuse(dpp_base, &is_ram_a);
126 		dpp1_program_degamma_lutb_settings(dpp_base, params);
128 		dpp1_program_degamma_luta_settings(dpp_base, params);
130 	dpp2_program_degamma_lut(dpp_base, params->rgb_resulted, params->hw_points_num, !is_ram_a);
131 	dpp1_degamma_ram_select(dpp_base, !is_ram_a);
135 		struct dpp *dpp_base,
138 	struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);
139 	dpp2_enable_cm_block(dpp_base);
214 	struct dpp *dpp_base,
217 	struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);
273 void dpp2_cm_get_gamut_remap(struct dpp *dpp_base,
276 	struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);
293 		struct dpp *dpp_base,
298 	struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);
366 	struct dpp *dpp_base,
369 	struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);
377 		struct dpp *dpp_base,
380 	struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);
390 		struct dpp *dpp_base,
395 	struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);
442 		struct dpp *dpp_base,
445 	struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);
470 		struct dpp *dpp_base,
473 	struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);
496 static enum dc_lut_mode dpp20_get_blndgam_current(struct dpp *dpp_base)
500 	struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);
523 	struct dpp *dpp_base, const struct pwl_params *params)
527 	struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);
533 	current_mode = dpp20_get_blndgam_current(dpp_base);
539 	dpp20_power_on_blnd_lut(dpp_base, true);
540 	dpp20_configure_blnd_lut(dpp_base, next_mode == LUT_RAM_A);
543 		dpp20_program_blnd_luta_settings(dpp_base, params);
545 		dpp20_program_blnd_lutb_settings(dpp_base, params);
548 			dpp_base, params->rgb_resulted, params->hw_points_num);
558 		struct dpp *dpp_base,
566 	struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);
589 static enum dc_lut_mode dpp20_get_shaper_current(struct dpp *dpp_base)
593 	struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);
616 		struct dpp *dpp_base,
619 	struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);
631 		struct dpp *dpp_base,
635 	struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);
781 		struct dpp *dpp_base,
785 	struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);
932 		struct dpp *dpp_base,
938 	struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);
944 	current_mode = dpp20_get_shaper_current(dpp_base);
951 	dpp20_configure_shaper_lut(dpp_base, next_mode == LUT_RAM_A);
954 		dpp20_program_shaper_luta_settings(dpp_base, params);
956 		dpp20_program_shaper_lutb_settings(dpp_base, params);
959 			dpp_base, params->rgb_resulted, params->hw_points_num);
968 			struct dpp *dpp_base,
974 	struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);
1014 		struct dpp *dpp_base,
1020 	struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);
1035 		struct dpp *dpp_base,
1039 	struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);
1050 		struct dpp *dpp_base,
1055 	struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);
1084 		struct dpp *dpp_base,
1089 	struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);
1105 		struct dpp *dpp_base,
1108 	struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);
1116 		struct dpp *dpp_base,
1130 		dpp20_set_3dlut_mode(dpp_base, LUT_BYPASS, false, false);
1133 	mode = get3dlut_config(dpp_base, &is_17x17x17, &is_12bits_color_channel);
1162 	dpp20_select_3dlut_ram(dpp_base, mode,
1164 	dpp20_select_3dlut_ram_mask(dpp_base, 0x1);
1166 		dpp20_set3dlut_ram12(dpp_base, lut0, lut_size0);
1168 		dpp20_set3dlut_ram10(dpp_base, lut0, lut_size0);
1170 	dpp20_select_3dlut_ram_mask(dpp_base, 0x2);
1172 		dpp20_set3dlut_ram12(dpp_base, lut1, lut_size);
1174 		dpp20_set3dlut_ram10(dpp_base, lut1, lut_size);
1176 	dpp20_select_3dlut_ram_mask(dpp_base, 0x4);
1178 		dpp20_set3dlut_ram12(dpp_base, lut2, lut_size);
1180 		dpp20_set3dlut_ram10(dpp_base, lut2, lut_size);
1182 	dpp20_select_3dlut_ram_mask(dpp_base, 0x8);
1184 		dpp20_set3dlut_ram12(dpp_base, lut3, lut_size);
1186 		dpp20_set3dlut_ram10(dpp_base, lut3, lut_size);
1189 	dpp20_set_3dlut_mode(dpp_base, mode, is_12bits_color_channel,
1196 		struct dpp *dpp_base,
1199 	struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);