/freebsd-10.1-release/contrib/llvm/lib/CodeGen/ |
H A D | AllocationOrder.cpp | 29 AllocationOrder::AllocationOrder(unsigned VirtReg, argument
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H A D | LiveRegMatrix.cpp | 72 void LiveRegMatrix::assign(LiveInterval &VirtReg, unsigned PhysReg) { argument 86 void LiveRegMatrix::unassign(LiveInterval &VirtReg) { argument 99 checkRegMaskInterference(LiveInterval &VirtReg, unsigned PhysReg) argument 117 checkRegUnitInterference(LiveInterval &VirtReg, unsigned PhysReg) argument 130 query(LiveInterval &VirtReg, unsigned RegUnit) argument 138 checkInterference(LiveInterval &VirtReg, unsigned PhysReg) argument [all...] |
H A D | LiveIntervalUnion.cpp | 28 void LiveIntervalUnion::unify(LiveInterval &VirtReg) { argument 55 void LiveIntervalUnion::extract(LiveInterval &VirtReg) { argument [all...] |
H A D | RegisterCoalescer.h | 68 CoalescerPair(unsigned VirtReg, unsigned PhysReg, argument
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H A D | RegAllocBasic.cpp | 168 bool RABasic::spillInterferences(LiveInterval &VirtReg, unsigned PhysReg, argument 222 unsigned RABasic::selectOrSplit(LiveInterval &VirtReg, argument [all...] |
H A D | TargetRegisterInfo.cpp | 264 TargetRegisterInfo::getRegAllocationHints(unsigned VirtReg, argument
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H A D | VirtRegMap.cpp | 81 bool VirtRegMap::hasPreferredPhys(unsigned VirtReg) { argument 90 bool VirtRegMap::hasKnownPreference(unsigned VirtReg) { argument 240 unsigned VirtReg = TargetRegisterInfo::index2VirtReg(Idx); local 308 unsigned VirtReg local [all...] |
H A D | PHIElimination.cpp | 199 static bool isImplicitlyDefined(unsigned VirtReg, argument
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H A D | RegAllocFast.cpp | 72 unsigned VirtReg; // Virtual register number. member in struct:__anon2287::RAFast::LiveReg 180 LiveRegMap::iterator findLiveVirtReg(unsigned VirtReg) { argument 201 getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC) argument 256 killVirtReg(unsigned VirtReg) argument 266 spillVirtReg(MachineBasicBlock::iterator MI, unsigned VirtReg) argument 499 assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg) argument 510 const unsigned VirtReg = LRI->VirtReg; local 582 defineVirtReg(MachineInstr *MI, unsigned OpNum, unsigned VirtReg, unsigned Hint) argument 615 reloadVirtReg(MachineInstr *MI, unsigned OpNum, unsigned VirtReg, unsigned Hint) argument [all...] |
H A D | InlineSpiller.cpp | 835 bool InlineSpiller::reMaterializeFor(LiveInterval &VirtReg, argument
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H A D | LiveDebugVariables.cpp | 438 void LDVImpl::mapVirtReg(unsigned VirtReg, UserValue *EC) { argument 444 UserValue *LDVImpl::lookupVirtReg(unsigned VirtReg) { argument 879 unsigned VirtReg = Loc.getReg(); local [all...] |
H A D | MachineBasicBlock.cpp | 362 unsigned VirtReg = I->getOperand(0).getReg(); local 369 unsigned VirtReg = MRI.createVirtualRegister(RC); local
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H A D | RegAllocGreedy.cpp | 143 void setStage(const LiveInterval &VirtReg, LiveRangeStage Stage) { argument 359 bool RAGreedy::LRE_CanEraseVirtReg(unsigned VirtReg) { argument 369 void RAGreedy::LRE_WillShrinkVirtReg(unsigned VirtReg) { argument 456 tryAssign(LiveInterval &VirtReg, AllocationOrder &Order, SmallVectorImpl<unsigned> &NewVRegs) argument 499 canReassign(LiveInterval &VirtReg, unsigned PrevReg) argument 558 canEvictInterference(LiveInterval &VirtReg, unsigned PhysReg, bool IsHint, EvictionCost &MaxCost) argument 640 evictInterference(LiveInterval &VirtReg, unsigned PhysReg, SmallVectorImpl<unsigned> &NewVRegs) argument 681 tryEvict(LiveInterval &VirtReg, AllocationOrder &Order, SmallVectorImpl<unsigned> &NewVRegs, unsigned CostPerUseLimit) argument 1172 tryRegionSplit(LiveInterval &VirtReg, AllocationOrder &Order, SmallVectorImpl<unsigned> &NewVRegs) argument 1307 tryBlockSplit(LiveInterval &VirtReg, AllocationOrder &Order, SmallVectorImpl<unsigned> &NewVRegs) argument 1359 tryInstructionSplit(LiveInterval &VirtReg, AllocationOrder &Order, SmallVectorImpl<unsigned> &NewVRegs) argument 1493 tryLocalSplit(LiveInterval &VirtReg, AllocationOrder &Order, SmallVectorImpl<unsigned> &NewVRegs) argument [all...] |
/freebsd-10.1-release/contrib/llvm/include/llvm/CodeGen/ |
H A D | LiveIntervalUnion.h | 107 LiveInterval *VirtReg; member in class:llvm::LiveIntervalUnion::Query [all...] |
H A D | ScheduleDAGInstrs.h | 35 unsigned VirtReg; member in struct:llvm::VReg2SUnit
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/freebsd-10.1-release/contrib/llvm/lib/Target/ARM/ |
H A D | ARMBaseRegisterInfo.cpp | 210 ARMBaseRegisterInfo::getRegAllocationHints(unsigned VirtReg, argument
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