| /freebsd-10-stable/contrib/groff/src/roff/troff/ |
| H A D | number.cpp | 31 vunits V0; variable
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| /freebsd-10-stable/contrib/llvm/lib/Target/Mips/ |
| H A D | Mips16ISelDAGToDAG.cpp | 75 unsigned V0, V1, V2, GlobalBaseReg = MipsFI->getGlobalBaseReg(); local
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| H A D | MipsSEISelDAGToDAG.cpp | 133 unsigned V0, V1, GlobalBaseReg = MipsFI->getGlobalBaseReg(); local
[all...] |
| H A D | MipsISelLowering.cpp | 2755 unsigned V0 = IsN64 ? Mips::V0_64 : Mips::V0; local
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| /freebsd-10-stable/lib/msun/src/ |
| H A D | e_j1.c | 136 static const double V0[5] = { variable
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| H A D | e_j1f.c | 97 static const float V0[5] = { variable
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| /freebsd-10-stable/contrib/llvm/tools/clang/lib/Driver/ |
| H A D | ToolChains.h | 293 bool isIPhoneOSVersionLT(unsigned V0, unsigned V1=0, unsigned V2=0) const { argument
298 bool isMacosxVersionLT(unsigned V0, unsigned V1=0, unsigned V2=0) const { argument
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| /freebsd-10-stable/contrib/llvm/lib/Transforms/Scalar/ |
| H A D | Reassociate.cpp | 208 Value *V0 = I->getOperand(0); local
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| /freebsd-10-stable/sys/mips/include/ |
| H A D | regnum.h | 52 #define V0 2 macro
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| /freebsd-10-stable/contrib/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineAddSub.cpp | 393 Value *V0 = I->getOperand(0); local
543 Value *V0 = I->getOperand(0); local
|
| /freebsd-10-stable/sys/geom/raid/ |
| H A D | md_ddf.h | 267 uint8_t V0[32]; member in struct:ddf_vdc_record
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| /freebsd-10-stable/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeIntegerTypes.cpp | 2925 SDValue V0 = GetPromotedInteger(N->getOperand(0)); local
3016 SDValue V0 = GetPromotedInteger(N->getOperand(0)); local
3026 SDValue V0 = GetPromotedInteger(N->getOperand(0)); local
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| /freebsd-10-stable/contrib/llvm/lib/Target/ARM/ |
| H A D | ARMISelDAGToDAG.cpp | 1570 SDNode *ARMDAGToDAGISel::createGPRPairNode(EVT VT, SDValue V0, SDValue V1) { argument
1581 createSRegPairNode(EVT VT, SDValue V0, SDValue V1) argument
1592 createDRegPairNode(EVT VT, SDValue V0, SDValue V1) argument
1602 createQRegPairNode(EVT VT, SDValue V0, SDValue V1) argument
1612 createQuadSRegsNode(EVT VT, SDValue V0, SDValue V1, SDValue V2, SDValue V3) argument
1627 createQuadDRegsNode(EVT VT, SDValue V0, SDValue V1, SDValue V2, SDValue V3) argument
1641 createQuadQRegsNode(EVT VT, SDValue V0, SDValue V1, SDValue V2, SDValue V3) argument
1966 SDValue V0 = N->getOperand(Vec0Idx + 0); local
2019 SDValue V0 = N->getOperand(Vec0Idx + 0); local
2131 SDValue V0 = N->getOperand(Vec0Idx + 0); local
2267 SDValue V0 = N->getOperand(FirstTblReg + 0); local
3309 SDValue V0 = N->getOperand(0); local
3478 SDValue V0 = N->getOperand(i+1); local
[all...] |
| /freebsd-10-stable/contrib/llvm/lib/Transforms/Vectorize/ |
| H A D | SLPVectorizer.cpp | 250 Value *V0 = I->getOperand(0); local
|
| /freebsd-10-stable/contrib/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 3875 SDValue V0, V1; local
[all...] |
| /freebsd-10-stable/contrib/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 9630 SDValue V0 = DAG.getNode(ISD::TRUNCATE, dl, VT, WideVal.getOperand(0)); local
|