Searched defs:UART_CLK (Results 1 - 7 of 7) sorted by relevance

/asus-wl-520gu-7.0.1.45/src/linux/linux/arch/mips/au1000/common/
H A Ddbg_io.c48 #define UART_CLK 0x28 /* Baud Rat4e Clock Divider */ macro
/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm-sh/
H A Dsmc37c93x.h160 #define UART_CLK (1843200) /* 1.8432 MHz */ macro
/asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm-sh/
H A Dsmc37c93x.h160 #define UART_CLK (1843200) /* 1.8432 MHz */ macro
/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm-mips/
H A Dau1000.h596 #define UART_CLK 0x28 /* Baud Rate Clock Divider */ macro
/asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm-mips/
H A Dau1000.h596 #define UART_CLK 0x28 /* Baud Rate Clock Divider */ macro
/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm/
H A Dau1000.h596 #define UART_CLK 0x28 /* Baud Rate Clock Divider */ macro
/asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm/
H A Dau1000.h596 #define UART_CLK 0x28 /* Baud Rate Clock Divider */ macro

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