Searched defs:SrcOp (Results 1 - 19 of 19) sorted by relevance

/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonRDFOpt.cpp139 const MachineOperand &SrcOp = MI->getOperand(1); local
H A DHexagonExpandCondsets.cpp623 MachineInstr *HexagonExpandCondsets::genCondTfrFor(MachineOperand &SrcOp, argument
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H A DHexagonFrameLowering.cpp2454 MachineOperand &SrcOp = SI.getOperand(2); local
H A DHexagonInstrInfo.cpp1122 const MachineOperand &SrcOp = MI.getOperand(2); local
/freebsd-13-stable/contrib/llvm-project/llvm/utils/TableGen/
H A DCodeGenInstruction.cpp291 std::pair<unsigned,unsigned> SrcOp = (FirstIsDest ? RHSOp : LHSOp); local
/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DLegalizationArtifactCombiner.h523 unsigned SrcOp = SrcDef->getOpcode(); local
H A DMachineIRBuilder.h118 class SrcOp { class in namespace:llvm
128 SrcOp(Register R) : Reg(R), Ty(SrcType::Ty_Reg) {} function in class:llvm::SrcOp
129 SrcOp(const MachineOperand &Op) : Reg(Op.getReg()), Ty(SrcType::Ty_Reg) {} function in class:llvm::SrcOp
130 SrcOp(const MachineInstrBuilder &MIB) : SrcMIB(MIB), Ty(SrcType::Ty_MIB) {} function in class:llvm::SrcOp
131 SrcOp(const CmpInst::Predicate P) : Pred(P), Ty(SrcType::Ty_Predicate) {} function in class:llvm::SrcOp
137 SrcOp(uint64_t V) : Imm(V), Ty(SrcType::Ty_Imm) {} function in class:llvm::SrcOp
138 SrcOp(int64_t V) : Imm(V), Ty(SrcType::Ty_Imm) {} function in class:llvm::SrcOp
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Linker/
H A DIRMover.cpp1231 MDNode *SrcOp = SrcModFlags->getOperand(I); local
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DMachineVerifier.cpp1255 const MachineOperand &SrcOp = MI->getOperand(1); local
1277 const MachineOperand &SrcOp = MI->getOperand(2); local
1510 const MachineOperand &SrcOp = MI->getOperand(1); local
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H A DMachineScheduler.cpp1733 const MachineOperand &SrcOp = Copy->getOperand(1); local
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUInstructionSelector.cpp1560 MachineOperand &SrcOp = MI.getOperand(VAddrIdx + i); local
H A DSIInstrInfo.cpp1620 const MachineOperand &SrcOp = MI.getOperand(1); local
1793 const MachineOperand &SrcOp = MI.getOperand(I); local
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H A DSIISelLowering.cpp9321 SDValue SrcOp = Op.getOperand(i); local
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstructionCombining.cpp2301 Value *SrcOp = BCI->getOperand(0); local
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Analysis/
H A DInstructionSimplify.cpp3374 Value *SrcOp = LI->getOperand(0); local
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp2479 SDValue SrcOp = Op.getOperand(i); local
H A DDAGCombiner.cpp19372 SDValue SrcOp = V.getOperand(0); local
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp6881 SDValue SrcOp = Op.getOperand(1); local
6900 SDValue SrcOp = Op.getOperand(0); local
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp12809 MachineOperand SrcOp = MI.getOperand(1); local

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