| /freebsd-11.0-release/contrib/llvm/lib/Target/AMDGPU/ |
| H A D | SIShrinkInstructions.cpp | 112 const MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1); local
304 const MachineOperand *Src1 = local
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| H A D | R600ExpandSpecialInstrs.cpp | 225 unsigned Src1 = BMI->getOperand( local
276 unsigned Src1 = 0; local
[all...] |
| H A D | SIInstrInfo.cpp | 835 unsigned Src1 = MI->getOperand(2).getReg(); local
1063 MachineOperand *Src1 = getNamedOperand(*UseMI, AMDGPU::OpName::src1); local
[all...] |
| H A D | R600InstrInfo.cpp | 1266 MachineOperand &Src1 = MI->getOperand( local
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| /freebsd-11.0-release/contrib/llvm/lib/Target/Hexagon/ |
| H A D | HexagonPeephole.cpp | 159 MachineOperand &Src1 = MI->getOperand(1); local
176 MachineOperand &Src1 = MI->getOperand(1); local
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| H A D | HexagonGenMux.cpp | 171 unsigned HexagonGenMux::getMuxOpcode(const MachineOperand &Src1, argument
262 MachineOperand *Src1 = &Def1->getOperand(2), *Src2 = &Def2->getOperand(2); local
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| H A D | HexagonISelDAGToDAG.cpp | 1112 SDNode* Src1 = N->getOperand(0).getNode(); local
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| /freebsd-11.0-release/contrib/llvm/lib/ExecutionEngine/Interpreter/ |
| H A D | Execution.cpp | 55 static void executeFAddInst(GenericValue &Dest, GenericValue Src1, argument
66 static void executeFSubInst(GenericValue &Dest, GenericValue Src1, argument
77 static void executeFMulInst(GenericValue &Dest, GenericValue Src1, argument
88 static void executeFDivInst(GenericValue &Dest, GenericValue Src1, argument
99 static void executeFRemInst(GenericValue &Dest, GenericValue Src1, argument
138 executeICMP_EQ(GenericValue Src1, GenericValue Src2, Type *Ty) argument
152 executeICMP_NE(GenericValue Src1, GenericValue Src2, Type *Ty) argument
166 executeICMP_ULT(GenericValue Src1, GenericValue Src2, Type *Ty) argument
[all...] |
| /freebsd-11.0-release/contrib/llvm/lib/Target/AArch64/ |
| H A D | AArch64AdvSIMDScalarPass.cpp | 215 unsigned Src1 = 0, SubReg1; local
308 unsigned Src1 = 0, SubReg1; local
[all...] |
| H A D | AArch64FastISel.cpp | 4482 const Value *Src1 = I->getOperand(1); local
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| /freebsd-11.0-release/contrib/llvm/lib/Target/SystemZ/ |
| H A D | SystemZSelectionDAGInfo.cpp | 153 emitCLC(SelectionDAG &DAG, SDLoc DL, SDValue Chain, SDValue Src1, SDValue Src2, uint64_t Size) argument
187 EmitTargetCodeForMemcmp(SelectionDAG &DAG, SDLoc DL, SDValue Chain, SDValue Src1, SDValue Src2, SDValue Size, MachinePointerInfo Op1PtrInfo, MachinePointerInfo Op2PtrInfo) const argument
241 EmitTargetCodeForStrcmp(SelectionDAG &DAG, SDLoc DL, SDValue Chain, SDValue Src1, SDValue Src2, MachinePointerInfo Op1PtrInfo, MachinePointerInfo Op2PtrInfo) const argument
[all...] |
| /freebsd-11.0-release/contrib/llvm/lib/Target/X86/ |
| H A D | X86FixupLEAs.cpp | 369 const MachineOperand &Src1 = MI->getOperand(SrcR1 == DstR ? 1 : 3); local
|
| /freebsd-11.0-release/contrib/llvm/lib/Target/AArch64/InstPrinter/ |
| H A D | AArch64InstPrinter.cpp | 1051 unsigned Src1 = MI->getOperand(1).getReg(); local
|
| /freebsd-11.0-release/contrib/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 2817 SDValue Src1 = Op.getOperand(0); local
|
| /freebsd-11.0-release/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorTypes.cpp | 1476 SDValue Src1 = N->getOperand(2); local
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| /freebsd-11.0-release/contrib/llvm/tools/clang/lib/CodeGen/ |
| H A D | CGBuiltin.cpp | 6869 llvm::Value *Src1 = CGF.EmitScalarExpr(E->getArg(1)); local
6881 llvm::Value *Src1 = CGF.EmitScalarExpr(E->getArg(1)); local
6919 llvm::Value *Src1 = EmitScalarExpr(E->getArg(1)); local
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| /freebsd-11.0-release/contrib/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 9084 unsigned Src1 = MI->getOperand(1).getReg(); local
|