Searched defs:SRsrc (Results 1 - 3 of 3) sorted by relevance
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SILoadStoreOptimizer.cpp | 109 bool SRsrc = false; member in struct:__anon3979::AddressRegs
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H A D | AMDGPUISelDAGToDAG.cpp | 1410 bool AMDGPUDAGToDAGISel::SelectMUBUFAddr64(SDValue Addr, SDValue &SRsrc, argument 1440 bool AMDGPUDAGToDAGISel::SelectMUBUFAddr64(SDValue Addr, SDValue &SRsrc, argument 1546 SelectMUBUFScratchOffset(SDNode *Parent, SDValue Addr, SDValue &SRsrc, SDValue &SOffset, SDValue &Offset) const argument 1573 SelectMUBUFOffset(SDValue Addr, SDValue &SRsrc, SDValue &SOffset, SDValue &Offset, SDValue &GLC, SDValue &SLC, SDValue &TFE, SDValue &DLC, SDValue &SWZ) const argument 1602 SelectMUBUFOffset(SDValue Addr, SDValue &SRsrc, SDValue &Soffset, SDValue &Offset ) const argument 1609 SelectMUBUFOffset(SDValue Addr, SDValue &SRsrc, SDValue &Soffset, SDValue &Offset, SDValue &SLC) const argument 2220 SDValue SRsrc, VAddr, SOffset, Offset, SLC; local 2238 SDValue SRsrc, SOffset, Offset, SLC; local [all...] |
H A D | SIInstrInfo.cpp | 4685 Register SRsrc = MRI.createVirtualRegister(&AMDGPU::SGPR_128RegClass); local 4989 MachineOperand *SRsrc = getNamedOperand(MI, AMDGPU::OpName::srsrc); local [all...] |
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